1.增加S550 model

This commit is contained in:
payton 2023-09-14 11:31:34 +08:00
parent 0924de5678
commit cd39782efe
132 changed files with 37863 additions and 1 deletions

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NETWORK_SETUP_SCRIPT="/etc/init.d/net_init.sh" NETWORK_SETUP_SCRIPT="/etc/init.d/net_init.sh"
SF_BOOT_MODE=1
kernel_cmdline=$(cat /proc/cmdline)
SF_HUNTING_BOOT_MODE=`dmesg | grep -o 'Mode=[0-9]*' | cut -d'=' -f2`
echo SF_HUNTING_BOOT_MODE=${SF_HUNTING_BOOT_MODE}
do_wifi_init() do_wifi_init()
{ {
if [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_RTK" ]; then if [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_RTK" ]; then
#/etc/init.d/BS_Net_wifiap8189ftv #/etc/init.d/BS_Net_wifiap8189ftv
echo "Configuring BS_Net_wifiap8189ftv sf stop" if [ "${SF_BOOT_MODE}" = "${SF_HUNTING_BOOT_MODE}" ]; then
echo "Configuring BS_Net_wifiap8189ftv sf start"
/etc/init.d/BS_Net_wifiap8189ftv
else
echo "Configuring BS_Net_wifiap8189ftv sf stop"
fi
elif [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_BRCM" ]; then elif [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_BRCM" ]; then
modprobe bcmdhd modprobe bcmdhd
# TBD # TBD

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#!/bin/sh
#
# History:
# 2013/06/24 - [Tao Wu] Create file
# 2016/06/22 - [Tao Wu] Update file
#
# Copyright (c) 2015 Ambarella International LP
#
# This file and its contents ("Software") are protected by intellectual
# property rights including, without limitation, U.S. and/or foreign
# copyrights. This Software is also the confidential and proprietary
# information of Ambarella International LP and its licensors. You may not use, reproduce,
# disclose, distribute, modify, or otherwise prepare derivative works of this
# Software or any portion thereof except pursuant to a signed license agreement
# or nondisclosure agreement with Ambarella International LP or its authorized affiliates.
# In the absence of such an agreement, you agree to promptly notify and return
# this Software to Ambarella International LP.
#
# This file includes sample code and is only for internal testing and evaluation. If you
# distribute this sample code (whether in source, object, or binary code form), it will be
# without any warranty or indemnity protection from Ambarella International LP or its affiliates.
#
# THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF NON-INFRINGEMENT,
# MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL AMBARELLA INTERNATIONAL LP OR ITS AFFILIATES BE LIABLE FOR ANY DIRECT,
# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; COMPUTER FAILURE OR MALFUNCTION; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
HOSTAP_VERSION="1.1.2"
encryption=$1
ssid=$2
passwd=$3
channel=$4
DEVICE=$5
DIR_CONFIG=/tmp/config
############# HOSTAP CONFIG ###############
WOWLAN=1
HOSTAP_CTRL_INTERFACE=/var/run/hostapd
HOST_CONFIG=$DIR_CONFIG/hostapd.conf
DEFAULT_CHANNEL=1
HOST_MAX_STA=1
AP_PIN=12345670
DRIVER=nl80211
wpa_group_rekey=120
############# DHCP Server ###############
LOCAL_IP=192.168.1.1
LOCAL_NETMASK=255.255.255.0
DHCP_IP_START=192.168.1.20
DHCP_IP_END=192.168.1.100
############# Exit Error Number ###############
ERRNO_OK=0
ERRNO_PARAM=1
ERRNO_ENV=2
#ERRNO_SSID_NOT_FOUND=3
#ERRNO_PASSWORD_WRONG=4
#####################################
usages()
{
echo "Version: ${HOSTAP_VERSION}"
echo "This script used to Setup/Stop WiFi AP mode with hostapd"
echo "usage: $0 [open|wpa3|wpa2|wpa|wpawpa2|wps] <SSID> <Password> <Channel>"
echo ""
echo "Example:"
echo "Setup AP[Open]: $0 open <SSID> 0 <Channel>"
echo "Setup AP[Encrypt]: $0 [wpa3|wpa2|wpa|wpawpa2] <SSID> <Password> <Channel>"
echo "Setup AP[WPA2+WPS]:$0 wps <SSID> <Password> <Channel>"
echo " [Control AP] # hostapd_cli -i<interface> [wps_pbc | wps_pin any <PIN>] (PIN:${AP_PIN})"
echo "Stop AP mode: $0 stop"
echo ""
echo "NOTICE: Using interface AP[${DEVICE}] by default, change it if necessary."
exit $ERRNO_OK
}
# kill process
kill_apps()
{
#the max times to kill app
local KILL_NUM_MAX=10
for app in "$@"
do
local kill_num=0
while [ "$(pgrep "${app}")" != "" ]
do
if [ $kill_num -ge $KILL_NUM_MAX ]; then
echo "Please try execute \"killall ${app}\" by yourself"
exit $ERRNO_ENV
else
killall -9 "${app}"
sleep 1
fi
kill_num=$((kill_num + 1));
done
done
}
stop_wifi_app()
{
kill_apps udhcpc dnsmasq NetworkManager hostapd_cli hostapd
ifconfig ${DEVICE} down
}
################ AP Mode #####################
check_encrypt()
{
if [ "${encryption}" != "open" ]; then
len=${#passwd}
if [ "$len" -lt 8 ]; then
echo "Password length at least 8"
exit 1
fi
fi
}
check_channel()
{
if [ ${#channel} -gt 0 ]; then
if [ "${channel}" -gt 196 ] || [ "${channel}" -lt 1 ]; then
echo "Your Channel is wrong(1 ~ 196), using Channel ${DEFAULT_CHANNEL} by default."
channel=$DEFAULT_CHANNEL
fi
else
echo "No specified channel, using default channel ${DEFAULT_CHANNEL}."
channel=$DEFAULT_CHANNEL
fi
}
generate_hostapd_conf()
{
if [ -f ${HOST_CONFIG} ]; then
## Use the saved config, Do not need generate new config except failed to connect.
return ;
fi
mkdir -p $DIR_CONFIG
check_encrypt
check_channel
echo "AP: SSID[${ssid}], Password[${passwd}], Encryption[${encryption}], Channel[${channel}]."
echo "interface=${DEVICE}" > ${HOST_CONFIG}
echo "ctrl_interface=${HOSTAP_CTRL_INTERFACE}" >> ${HOST_CONFIG}
echo "driver=${DRIVER}" >> ${HOST_CONFIG}
echo "ctrl_interface_group=0" >> ${HOST_CONFIG}
echo "ignore_broadcast_ssid=0" >> ${HOST_CONFIG}
echo "auth_algs=1" >> ${HOST_CONFIG}
# echo "country_code=CN" >> ${HOST_CONFIG}
## This for WiFi suspend/resume
#if [ $WOWLAN -eq 1 ]; then
#echo "wowlan_triggers=any" >> ${HOST_CONFIG}
#fi
{
echo "beacon_int=100"
echo "dtim_period=1"
echo "preamble=0"
echo "ssid=${ssid}"
echo "max_num_sta=${HOST_MAX_STA}"
} >> ${HOST_CONFIG}
if [ ${channel} -gt 14 ]; then
echo "hw_mode=a" >> ${HOST_CONFIG}
fi
echo "channel=${channel}" >> ${HOST_CONFIG}
if [ "${encryption}" != "open" ]; then
local len_passwd=${#passwd}
local local_passwd_value=""
if [ "$len_passwd" -eq 64 ]; then
echo "passphrase length is 64, using hex type"
local_passwd_value="${passwd}"
elif [ "$len_passwd" -ge 8 ] && [ "$len_passwd" -le 63 ]; then
local_passwd_value="${passwd}"
else
echo "Invalid passphrase length ${len_passwd} (expected: 8..63 or 64 hex)"
rm -rf ${HOST_CONFIG}
exit $ERRNO_PARAM
fi
fi
case ${encryption} in
open)
;;
wpa3)
echo "wpa=2" >> ${HOST_CONFIG}
echo "wpa_key_mgmt=SAE" >> ${HOST_CONFIG}
echo "rsn_pairwise=CCMP" >> ${HOST_CONFIG}
echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG}
echo "ieee80211w=2" >> ${HOST_CONFIG}
# echo "sae_password=${local_passwd_value}" >> ${HOST_CONFIG}
;;
wpa2)
echo "wpa=2" >> ${HOST_CONFIG}
echo "wpa_key_mgmt=WPA-PSK" >> ${HOST_CONFIG}
echo "wpa_pairwise=CCMP" >> ${HOST_CONFIG}
echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG}
;;
wpa)
echo "wpa=1" >> ${HOST_CONFIG}
echo "wpa_key_mgmt=WPA-PSK" >> ${HOST_CONFIG}
echo "wpa_pairwise=TKIP" >> ${HOST_CONFIG}
echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG}
;;
wpawpa2)
echo "wpa=2" >> ${HOST_CONFIG}
echo "wpa_key_mgmt=WPA-PSK" >> ${HOST_CONFIG}
echo "wpa_pairwise=CCMP" >> ${HOST_CONFIG}
echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG}
;;
wps)
echo "wpa=2" >> ${HOST_CONFIG}
echo "wpa_key_mgmt=WPA-PSK" >> ${HOST_CONFIG}
echo "wpa_pairwise=CCMP" >> ${HOST_CONFIG}
echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG}
echo "wps_state=2" >> ${HOST_CONFIG}
echo "eap_server=1" >> ${HOST_CONFIG}
echo "ap_pin=${AP_PIN}" >> ${HOST_CONFIG}
echo "config_methods=label display push_button keypad ethernet" >> ${HOST_CONFIG}
echo "wps_pin_requests=/var/run/hostapd.pin-req" >> ${HOST_CONFIG}
;;
*)
echo "Not support encryption [$encryption]"
exit $ERRNO_PARAM
;;
esac
#echo "wpa_group_rekey=$wpa_group_rekey" >> ${HOST_CONFIG}
#echo "ignore_broadcast_ssid=0" >> ${HOST_CONFIG}
#echo "ap_setup_locked=0" >> ${HOST_CONFIG}
echo "hw_mode=g" >> ${HOST_CONFIG}
echo "ieee80211n=1">>${HOST_CONFIG}
}
start_dhcp_server()
{
## Start DHCP Server ##
#mkdir -p /var/lib/misc
#mkdir -p /etc/dnsmasq.d
#dnsmasq -i${DEVICE} --no-daemon --no-resolv --no-poll --dhcp-range=${DHCP_IP_START},${DHCP_IP_END},1h &
udhcpd /appfs/etc/udhcpd.conf &
}
hostapd_start_ap()
{
## Setup interface and set IP,gateway##
echo "Using Interface AP:[${DEVICE}]"
ifconfig ${DEVICE} ${LOCAL_IP} up
route add default netmask ${LOCAL_NETMASK} gw ${LOCAL_IP}
## Start Hostapd ##
CMD="hostapd ${HOST_CONFIG} -e /appfs/etc/bpi/entropy.bin -B"
echo "CMD=${CMD}"
$CMD
#start_dhcp_server
echo "HostAP Setup Finished."
}
clear_config()
{
rm -rf ${HOST_CONFIG}
}
################ Main ###################
## Show usage when no parameter
if [ $# -eq 0 ]; then
usages
fi
## Start WiFi
if [ $# -gt 1 ]; then
clear_config
fi
case ${encryption} in
"stop")
stop_wifi_app
;;
open|wpa3|wpa2|wpa|wpawpa2|wps)
generate_hostapd_conf
hostapd_start_ap
;;
*)
echo "Please Select Encryption [open|wpa3|wpa2|wpa|wpawpa2|wps] or stop"
exit $ERRNO_PARAM
;;
esac
########################################

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[MAP]
path_1 = 1 #Path 1 Enable
path_2 = 0 #Path 2 Disable
path_3 = 0 #Path 3 Disable
path_4 = 0 #Path 4 Disable
path_5 = 0 #Path 5 Disable
path_6 = 0 #Path 6 Disable
path_7 = 0 #Path 7 Disable
path_8 = 0 #Path 8 Disable
[PRESET]
id_0_expt_time = 10000 #10000us
id_0_gain_ratio = 1000 #1x gain
[DIRECTION]
id_0_mirror = 0 #no mirror
id_0_flip = 0 #no flip
[POWER]
id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_0_pwdn_pin = 0xFFFFFFFF #S_GPIO_9, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_time = 2 #2ms
id_0_stable_time = 2 #2ms
[I2C]
id_0_i2c_id = 0 #SEN_I2C_ID_1
id_0_i2c_addr = 0x29 #0x52 >> 1

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[MAP]
path_1 = 1 #Path 1 Enable
path_2 = 0 #Path 2 Disable
path_3 = 0 #Path 3 Disable
path_4 = 0 #Path 4 Disable
path_5 = 0 #Path 5 Disable
path_6 = 0 #Path 6 Disable
path_7 = 0 #Path 7 Disable
path_8 = 0 #Path 8 Disable
[PRESET]
id_0_expt_time = 10000 #10000us
id_0_gain_ratio = 1000 #1x gain
[DIRECTION]
id_0_mirror = 0 #no mirror
id_0_flip = 0 #no flip
[POWER]
id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_time = 1 #1ms
id_0_stable_time = 1 #1ms
[I2C]
id_0_i2c_id = 0 #SEN_I2C_ID_1
id_0_i2c_addr = 0x31 #0x62>> 1

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[MAP]
path_1 = 1 #Path 1 Enable
path_2 = 1 #Path 2 Enable
path_3 = 0 #Path 3 Disable
path_4 = 0 #Path 4 Disable
path_5 = 0 #Path 5 Disable
path_6 = 0 #Path 6 Disable
path_7 = 0 #Path 7 Disable
path_8 = 0 #Path 8 Disable
[PRESET]
id_0_expt_time = 10000 #10000us
id_0_gain_ratio = 1000 #1x gain
id_1_expt_time = 10000 #10000us
id_1_gain_ratio = 1000 #1x gain
[DIRECTION]
id_0_mirror = 0 #no mirror
id_0_flip = 0 #no flip
id_1_mirror = 0 #no mirror
id_1_flip = 0 #no flip
[POWER]
id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_time = 1 #1ms
id_0_stable_time = 1 #1ms
id_1_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_1_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_1_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_1_rst_time = 1 #1ms
id_1_stable_time = 1 #1ms
[I2C]
id_0_i2c_id = 0 #SEN_I2C_ID_1
id_0_i2c_addr = 0x1A #0x34 >> 1 = 0x1A
id_1_i2c_id = 1 #SEN_I2C_ID_2
id_1_i2c_addr = 0x1A #0x34 >> 1 = 0x1A

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[MAP]
path_1 = 1 #Path 1 Enable
path_2 = 1 #Path 2 Enable
path_3 = 0 #Path 3 Disable
path_4 = 0 #Path 4 Enable
path_5 = 0 #Path 5 Enable
path_6 = 0 #Path 6 Disable
path_7 = 0 #Path 7 Disable
path_8 = 0 #Path 8 Disable
[PRESET]
id_0_expt_time = 10000 #10000us
id_0_gain_ratio = 1000 #1x gain
id_1_expt_time = 10000 #10000us
id_1_gain_ratio = 1000 #1x gain
[DIRECTION]
id_0_mirror = 1 #mirror
id_0_flip = 0 #no flip
id_1_mirror = 1 #mirror
id_1_flip = 0 #no flip
[POWER]
id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_time = 1 #1ms
id_0_stable_time = 1 #1ms
id_1_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_1_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_1_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_1_rst_time = 1 #1ms
id_1_stable_time = 1 #1ms
[I2C]
id_0_i2c_id = 0 #SEN_I2C_ID_1
id_0_i2c_addr = 0x36 #0x6C >> 1 = 0x36
id_1_i2c_id = 1 #SEN_I2C_ID_2
id_1_i2c_addr = 0x36 #0x6C >> 1 = 0x36

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[MAP]
path_1 = 1 #Path 1 Enable
path_2 = 0 #Path 2 Disable
path_3 = 0 #Path 3 Disable
path_4 = 0 #Path 4 Disable
path_5 = 0 #Path 5 Disable
path_6 = 0 #Path 6 Disable
path_7 = 0 #Path 7 Disable
path_8 = 0 #Path 8 Disable
[PRESET]
id_0_expt_time = 10000 #10000us
id_0_gain_ratio = 1000 #1x gain
[DIRECTION]
id_0_mirror = 0 #no mirror
id_0_flip = 1 #flip
[POWER]
id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_time = 1 #1ms
id_0_stable_time = 1 #1ms
[I2C]
id_0_i2c_id = 0 #SEN_I2C_ID_1
id_0_i2c_addr = 0x36 #0x6C >> 1

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[MAP]
path_1 = 1 #Path 1 Enable
path_2 = 0 #Path 2 Disable
path_3 = 0 #Path 3 Disable
path_4 = 0 #Path 4 Disable
path_5 = 0 #Path 5 Disable
path_6 = 0 #Path 6 Disable
path_7 = 0 #Path 7 Disable
path_8 = 0 #Path 8 Disable
[PRESET]
id_0_expt_time = 10000 #10000us
id_0_gain_ratio = 1000 #1x gain
[DIRECTION]
id_0_mirror = 1 #no mirror
id_0_flip = 0 #flip
[POWER]
id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_time = 1 #1ms
id_0_stable_time = 1 #1ms
[I2C]
id_0_i2c_id = 0 #SEN_I2C_ID_1
id_0_i2c_addr = 0x36 #0x6C >> 1

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[MAP]
path_1 = 1 #Path 1 Enable
path_2 = 0 #Path 2 Disable
path_3 = 0 #Path 3 Disable
path_4 = 0 #Path 4 Disable
path_5 = 0 #Path 5 Disable
path_6 = 0 #Path 6 Disable
path_7 = 0 #Path 7 Disable
path_8 = 0 #Path 8 Disable
[PRESET]
id_0_expt_time = 10000 #10000us
id_0_gain_ratio = 1000 #1x gain
[DIRECTION]
id_0_mirror = 1 #mirror
id_0_flip = 1 #flip
[POWER]
id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK
id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60
id_0_rst_time = 1 #1ms
id_0_stable_time = 1 #1ms
[I2C]
id_0_i2c_id = 0 #SEN_I2C_ID_1
id_0_i2c_addr = 0x30 #0x60>> 1

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SAMPLE_PERIOD=0.1
PROCESS_ACCOUNTING="yes"

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SDK_VER="NVT_NT96660_Linux_V0.4.8"
BUILDDATE="Tue Mar 1 18:25:28 CST 2016"

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proc /proc proc defaults 0 0
sysfs /sys sysfs defaults 0 0
tmpfs /dev tmpfs defaults 0 0
tmpfs /tmp tmpfs defaults,noatime,nosuid,nodev,exec,mode=1777,size=5M 0 0
tmpfs /var/run tmpfs defaults,rw,nosuid,mode=0755 0 0
debugfs /sys/kernel/debug debugfs defaults 0 0

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root:x:0:

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NVTEVM

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127.0.0.1 localhost

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# /etc/inetd.conf: see inetd(8) for further informations.
#
# Internet server configuration database
#
#
# If you want to disable an entry so it isn't touched during
# package updates just comment it out with a single '#' character.
#
# If you make changes to this file, either reboot your machine or
# send the inetd process a HUP signal:
# Do a "ps x" as root and look up the pid of inetd. Then do a
# kill -HUP <pid of inetd>
# inetd will re-read this file whenever it gets that signal.
# <service_name> <sock_type> <proto> <flags> <user> <server_path> <args>
#
#:INTERNAL: Internal services
# It is generally considered safer to keep these off.
echo stream tcp nowait root internal
echo dgram udp wait root internal
#discard stream tcp nowait root internal
#discard dgram udp wait root internal
daytime stream tcp nowait root internal
daytime dgram udp wait root internal
#chargen stream tcp nowait root internal
#chargen dgram udp wait root internal
time stream tcp nowait root internal
time dgram udp wait root internal
# These are standard services.
#
#ftp stream tcp nowait root /usr/sbin/tcpd in.ftpd
#telnet stream tcp nowait root /sbin/telnetd /sbin/telnetd
#nntp stream tcp nowait root tcpd in.nntpd
#smtp stream tcp nowait root tcpd sendmail -v
#
# Shell, login, exec and talk are BSD protocols.
#
# If you run an ntalk daemon (such as netkit-ntalk) on the old talk
# port, that is, "talk" as opposed to "ntalk", it won't work and may
# cause certain broken talk clients to malfunction.
#
# The talkd from netkit-ntalk 0.12 and higher, however, can speak the
# old talk protocol and can be used safely.
#
#shell stream tcp nowait root /usr/sbin/tcpd in.rshd -L
#login stream tcp nowait root /usr/sbin/tcpd in.rlogind -L
#exec stream tcp nowait root /usr/sbin/tcpd in.rexecd
#talk dgram udp wait root /usr/sbin/tcpd in.talkd
#ntalk dgram udp wait root /usr/sbin/tcpd in.talkd
#
# Pop et al
# Leave these off unless you're using them.
#pop2 stream tcp nowait root /usr/sbin/tcpd in.pop2d
#pop3 stream tcp nowait root /usr/sbin/tcpd in.pop3d
#
# The Internet UUCP service.
# uucp stream tcp nowait uucp /usr/sbin/tcpd /usr/lib/uucp/uucico -l
#
# Tftp service is provided primarily for booting. Most sites
# run this only on machines acting as "boot servers." If you don't
# need it, don't use it.
#
#tftp dgram udp wait nobody /usr/sbin/tcpd in.tftpd
#bootps dgram udp wait root /usr/sbin/in.bootpd in.bootpd
#
# Finger, systat and netstat give out user information which may be
# valuable to potential "system crackers." Many sites choose to disable
# some or all of these services to improve security.
#
#finger stream tcp nowait nobody /usr/sbin/tcpd in.fingerd -w
#systat stream tcp nowait nobody /usr/sbin/tcpd /bin/ps -auwwx
#netstat stream tcp nowait root /bin/netstat /bin/netstat -a
#ident stream tcp nowait root /usr/sbin/in.identd in.identd
21 stream tcp nowait root ftpd ftpd -w /mnt/sd
69 dgram udp nowait root tftpd tftpd -l -c /home

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#!/bin/sh
NETWORK_SETUP_SCRIPT="/etc/init.d/net_init.sh"
echo "eth" > /proc/nvt_info/bootts
modprobe ntkimethmac
#FOR NVTIMETHMAC
ifconfig eth0 down
ifconfig eth0 hw ether 00:80:48:BA:D1:30
ifconfig eth0 up
if [ -f "$NETWORK_SETUP_SCRIPT" ]; then
$NETWORK_SETUP_SCRIPT
else
echo "Configuring loopback interface"
ifconfig lo 127.0.0.1
ifconfig eth0 192.168.0.3
#FOR WiFi Sample
# ifup wlan0
# hostapd -B -dd /etc/wifiap_wpa2.conf
#DHCP Deamon
udhcpd -fS /etc/udhcpd.conf &
#FTP
#inetd &
fi
echo "eth" > /proc/nvt_info/bootts
uctrl usys -notify net_init_ok

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#!/bin/sh
modprobe 8189es
#set essid,psk,...
wpa_supplicant -B -Dwext -d -i wlan0 -c /etc/wpa_supplicant.conf
#get an ip
udhcpc -i wlan0
#check got ip
ifconfig

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#!/bin/sh
modprobe 8189es
echo "Configuring loopback interface"
ifconfig lo 127.0.0.1
#FOR WiFi Sample
ifconfig wlan0 up
ifconfig wlan0 192.168.1.3
hostapd -B -dd /etc/wifiap_wpa2.conf
#DHCP Deamon
udhcpd -S /etc/udhcpdw.conf

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#!/bin/sh
modprobe 8189fs
echo "Configuring loopback interface 8189fs"
ifconfig lo 127.0.0.1
#FOR WiFi Sample
ifconfig wlan0 up
ifconfig wlan0 192.168.1.1
#hostapd -B -dd /etc/wifiap_wpa2.conf
#DHCP Deamon
#udhcpd -fS /etc/udhcpdw.conf &

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#!/bin/sh
echo "K00 power off"

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#!/bin/sh
umount /mnt/sd
echo "K99 power off end"

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device_node_create()
{
if [ ! -e /dev/$1 ]; then mknod /dev/$1 c `cat /sys/class/$1/$1/dev | sed "s/:/\ /g"`; fi
}
mkdir /var/run/lock
mkdir /dev/pts
mount -t devpts devpts /dev/pts

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#!/bin/sh
KERVER=`cat /proc/version | awk -F'version ' '{print $2}' | awk -F' ' '{print $1}'`
overlay_files()
{
if [ ! -f /mnt/overlay_rw0/rootfs/.fileexisted ]; then
mkdir /mnt/overlay_rw0/rootfs
cp -arf /etc /mnt/overlay_rw0/rootfs
cp -arf /var /mnt/overlay_rw0/rootfs
sync
mkdir /mnt/overlay_rw0/rootfs/lib
cp -arf /lib/modules /mnt/overlay_rw0/rootfs/lib/modules
sync;
touch /mnt/overlay_rw0/rootfs/.fileexisted
sync;
fi
mount /mnt/overlay_rw0/rootfs/etc /etc
mount /mnt/overlay_rw0/rootfs/var /var
mount /mnt/overlay_rw0/rootfs/lib/modules /lib/modules
}
wait_dev_or_exit()
{
x=0
timeout=5
while [ "$x" -lt "$timeout" -a ! -e $1 ]; do
x=$((x+1))
sleep .1
done
if [ "$x" -ge "$timeout" ]; then
echo "[app mount] $1 not found"
exit -1
fi
}
echo "/sbin/mdev" > /proc/sys/kernel/hotplug
mdev -s
if [ "$EMBMEM" == "EMBMEM_EMMC" ]; then
# if /proc/mtd not exist, exit
wait_dev_or_exit /proc/nvt_info/emmc
if [ ! -f /proc/nvt_info/emmc ]; then
echo "[fs overlay] /proc/nvt_info/emmc not ready"
exit -1
fi
mmcblkpn=`cat /proc/nvt_info/emmc | grep '^rootfs1 ' | awk -F' ' '{print $NF}'`;
mmcblkn=`echo $mmcblkpn | sed 's/.*\(mmcblk.\)p.*/\1/g'`
wait_dev_or_exit /sys/class/block/$mmcblkn/dev
mknod /dev/$mmcblkn b `cat /sys/class/block/$mmcblkn/dev | sed "s/:/\ /g"`
mknod /dev/$mmcblkpn b `cat /sys/class/block/$mmcblkpn/dev | sed "s/:/\ /g"`
else
# if /proc/mtd not exist, exit
if [ ! -f /proc/mtd ]; then
echo "[fs overlay] /proc/mtd not ready"
exit -1
fi
# if the partition not found, exit
num=`cat /proc/mtd | grep \"rootfs1\" | awk -F' ' '{print $1}' | tr -d 'mtd' | tr -d ':'`;
if [ -z "$num" ]; then
echo "[fs overlay] no rootfs1 partition"
exit 0
fi
mknod /dev/mtdblock$num b `cat /sys/block/mtdblock$num/dev | sed "s/:/\ /g"`
fi
if [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_NAND_UBI" ]; then
echo "[fs overlay] ubi mount rootfs1"
ubiattach /dev/ubi_ctrl -m $num
wait_dev_or_exit /dev/ubi1_0
mount -t ubifs /dev/ubi1_0 /mnt/overlay_rw0;
overlay_files;
sync
echo 1 > /proc/sys/vm/drop_caches
elif [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_SQUASH" ] && [ "$EMBMEM" != "EMBMEM_NONE" ]; then
echo "[fs overlay] squash mount rootfs1"
if [ "$EMBMEM" == "EMBMEM_SPI_NAND" ]; then
ubiattach /dev/ubi_ctrl -m $num
wait_dev_or_exit /dev/ubi1_0
mount -t ubifs /dev/ubi1_0 /lib/modules;
elif [ "$EMBMEM" == "EMBMEM_EMMC" ]; then
mount -t ext4 /dev/$mmcblkpn /lib/modules;
else
mount -t squashfs /dev/mtdblock$num /lib/modules;
fi
mount /lib/modules/usr/bin/ /usr/bin/;
mount /lib/modules/usr/lib/ /usr/lib/;
elif [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_RAMDISK" ] && [ "$EMBMEM" != "EMBMEM_NONE" ]; then
if [ "$EMBMEM" == "EMBMEM_SPI_NAND" ]; then
echo "[fs overlay] ubi mount rootfs1"
mknod /dev/ubi_ctrl c `cat /sys/class/misc/ubi_ctrl/dev | sed "s/:/\ /g"`
ubiattach /dev/ubi_ctrl -m $num
mknod /dev/ubi0_0 c `cat /sys/class/ubi/ubi0_0/dev | sed "s/:/\ /g"`
wait_dev_or_exit /dev/ubi0_0
mount -t ubifs /dev/ubi0_0 /lib/modules;
elif [ "$EMBMEM" == "EMBMEM_EMMC" ]; then
echo "[fs overlay] ext4 mount rootfs1"
mount -t ext4 /dev/$mmcblkpn /lib/modules;
else
echo "[fs overlay] squash mount rootfs1"
#echo "mount -t squashfs /dev/mtdblock$num /lib/modules"
mount -t squashfs /dev/mtdblock$num /lib/modules;
fi
mount /lib/modules/usr/bin/ /usr/bin/;
mount /lib/modules/usr/lib/ /usr/lib/;
else
echo "[fs overlay] jffs2 mount rootfs1"
mount -t jffs2 /dev/mtdblock$num /mnt/overlay_rw0
overlay_files;
fi

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#!/bin/sh
wait_dev_or_exit()
{
x=0
timeout=5
while [ "$x" -lt "$timeout" -a ! -e $1 ]; do
x=$((x+1))
sleep .1
done
if [ "$x" -ge "$timeout" ]; then
echo "[app overlay] $1 not found"
exit -1
fi
}
# if /proc/mtd not exist, exit
if [ ! -f /proc/mtd ]; then
echo "[app overlay] /proc/mtd not ready"
exit -1
fi
# if the partition not found, exit
num=`cat /proc/mtd | grep \"app\" | awk -F' ' '{print $1}' | tr -d 'mtd' | tr -d ':'`;
if [ -z "$num" ]; then
echo "[app overlay] no app partition"
exit 0
fi
# mount app partition by type
if [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_NAND_UBI" ]; then
echo "[app overlay] ubi mount app"
ubiattach /dev/ubi_ctrl -m $num
wait_dev_or_exit /dev/ubi1_0
mount -t ubifs /dev/ubi1_0 /mnt/app;
elif [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_SQUASH" ] && [ "$EMBMEM" != "EMBMEM_SPI_NOR" ]; then
echo "[app overlay] squash mount app"
ubiattach /dev/ubi_ctrl -m $num
wait_dev_or_exit /dev/ubi1_0
mount -t ubifs /dev/ubi1_0 /mnt/app;
elif [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_RAMDISK" ] && [ "$EMBMEM" != "EMBMEM_NONE" ]; then
if [ "$EMBMEM" == "EMBMEM_SPI_NAND" ]; then
echo "[app overlay] ubi mount app"
ubiattach /dev/ubi_ctrl -m $num
mknod /dev/ubi1_0 c `cat /sys/class/ubi/ubi1_0/dev | sed "s/:/\ /g"`
wait_dev_or_exit /dev/ubi1_0
mount -t ubifs /dev/ubi1_0 /mnt/app;
elif [ "$EMBMEM" == "EMBMEM_EMMC" ]; then
echo "[app overlay] ext4 mount app"
mount -t ext4 /dev/$mmcblkpn /mnt/app;
else
#echo "[app overlay] jffs2 mount app"
#cat /proc/mtd
#ls /dev/mtdblock*
wait_dev_or_exit /dev/mtdblock$num
wait_dev_or_exit /mnt/app
#echo "mount -t jffs2 /dev/mtdblock$num /mnt/app"
mount -t jffs2 /dev/mtdblock$num /mnt/app;
fi
else
echo "[app overlay] jffs2 mount app"
mount -t jffs2 /dev/mtdblock$num /mnt/app;
fi

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#!/bin/sh
device_node_create()
{
mknod /dev/$1 c `cat /sys/class/$1/$1/dev | sed "s/:/\ /g"`
}
# Setup mdev
echo "fs" > /proc/nvt_info/bootts
echo "/sbin/mdev" > /proc/sys/kernel/hotplug
#modprobe mmc_na51055
mdev -s
# Scan for without insert card
if [ ! -f /tmp/.nvt_mounts ]; then
/etc/mdev-script/autosd.sh
rm -rf /tmp/.nvt_mounts;
fi
echo "fs" > /proc/nvt_info/bootts

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#!/bin/sh
KERVER=`cat /proc/version | awk -F'version ' '{print $2}' | awk -F' ' '{print $1}'`
RAMDISK_KO=ON
if [ "${RAMDISK_KO}" == "ON" ]; then
PREFIX="/etc"
else
PREFIX=""
fi
HUNTING_BOOT_MODE_4G_ONLY=4G_ONLY
# System Driver Init
#modprobe ehci-hcd
#modprobe xhci_plat_hcd
#modprobe nvt_status
#modprobe nvt_pstore
HUNTING_BOOT_MODE=`dmesg | grep "Kernel command line" | sed 's/.* hunt_boot_mode=\(.*\) .*/\1/'`
echo HUNTING_BOOT_MODE=${HUNTING_BOOT_MODE}
if [ -f /usr/bin/sf_app ]; then
sf_app &
else
echo "sf_app not found"
fi
if [ "${HUNTING_BOOT_MODE_4G_ONLY}" = "${HUNTING_BOOT_MODE}" ]; then
echo "skip insert ko"
else
#insmod ${PREFIX}/lib/modules/$KERVER/extra/mcu/drv_sf_i2c_mcu.ko
insmod ${PREFIX}/lib/modules/$KERVER/extra/crypto/cryptodev-linux/cryptodev.ko
#insmod /lib/modules/$KERVER/vos/kwrap/kwrap.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/comm/nvtmem/nvtmem.ko
#insmod /lib/modules/$KERVER/hdal/kdrv_builtin/kdrv_builtin.ko
#insmod /lib/modules/$KERVER/kernel/fs/fat/fat.ko
#insmod /lib/modules/$KERVER/kernel/fs/fat/vfat.ko
#insmod /lib/modules/$KERVER/extra/fs/exfat/exfat.ko
if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/comm/kdrv_comm.ko ]]; then
insmod ${PREFIX}/lib/modules/$KERVER/hdal/comm/kdrv_comm.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_gfx2d.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videocapture/kdrv_videocapture.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoprocess/kdrv_videoprocess.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_common/kflow_common.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_gfx/videosprite/nvt_videosprite.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videocapture/kflow_videocapture.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videoprocess/kflow_videoprocess.ko
fi
# kdrv_gfx2d
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_affine/affine_neon/kdrv_afn_neon.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_affine/kdrv_afn.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_gfx/nvt_gfx.ko
# kdrv_vdoout
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoout/ide/nvt_ide.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoout/display_obj/kdrv_videoout.ko
# kflow_videoout
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videoout/unit/kflow_videoout.ko
# panel device
insmod ${PREFIX}/lib/modules/$KERVER/hdal/display_panel/nvt_dispdev_panel.ko
case "${LCD1}" in
disp_off)
;;
disp_if8b_lcd1_pw35p00)
insmod /lib/modules/$KERVER/hdal/display_panel/${LCD1}_hx8238d/$LCD1.ko
;;
*)
if [[ $(echo $LCD1 | grep -c 'ifdsi') == "1" ]]; then
insmod /lib/modules/$KERVER/hdal/kdrv_videoout/dsi/nvt_dsi.ko
fi
insmod ${PREFIX}/lib/modules/$KERVER/hdal/display_panel/${LCD1}/${LCD1}.ko
;;
esac
# nvt_h26x
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videocodec/kdrv_h26x.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/nvt_vencrc/nvt_vencrc.ko
# isf vdoenc
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videoenc/unit/kflow_videoenc.ko
# isf vdodec
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videodec/unit/kflow_videodec.ko
# audio
if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_audioio/audio_common/nvt_audio.ko ]]; then
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_audioio/audio_common/nvt_audio.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_audioio/kdrv_audio/nvt_kdrv_audio.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_audiocapture/unit/kflow_audiocap.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_audioout/unit/kflow_audioout.ko
fi
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_audioio/audlib_aac/nvt_audlib_aac.ko
# isf audenc
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_audioenc/unit/kflow_audioenc.ko
# isf auddec
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_audiodec/unit/kflow_audiodec.ko
# iq, 3a
#echo "isp_id_list: 0x3, ae_id_list: 0x3, awb_id_list: 0x3, iq_id_list 0x3"
insmod ${PREFIX}/lib/modules/$KERVER/hdal/isp/nvt_isp.ko
if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/awb/nvt_awb.ko ]]; then
insmod ${PREFIX}/lib/modules/$KERVER/hdal/ae/nvt_ae.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/awb/nvt_awb.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/iq/nvt_iq.ko
fi
insmod ${PREFIX}/lib/modules/$KERVER/hdal/${SENSOR1}/nvt_${SENSOR1}.ko sen_cfg_path=/mnt/app/sensor/${SENSOR1_CFG}.cfg
#cv
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_md/kdrv_md.ko
#fb
if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoout/fbdev/nvt_fb.ko ]]; then
insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbcopyarea.ko
insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbfillrect.ko
insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbimgblt.ko
insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoout/fbdev/nvt_fb.ko
fi
#iio & adc (for keyscan)
if [[ -f ${PREFIX}/lib/modules/$KERVER/kernel/drivers/iio/industrialio.ko ]]; then
insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/iio/industrialio.ko
fi
if [[ -f ${PREFIX}/lib/modules/$KERVER/kernel/drivers/iio/adc/nvt_adc.ko ]]; then
insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/iio/adc/nvt_adc.ko
fi
#usb
#if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/comm/uvcp/nvt_uvcp.ko ]]; then
#insmod ${PREFIX}/lib/modules/$KERVER/hdal/comm/uvcp/nvt_uvcp.ko
#insmod ${PREFIX}/lib/modules/$KERVER/hdal/comm/usb2dev/nvt_usb2dev.ko
#fi
if [ -f /usr/bin/isp_demon ]; then
/usr/bin/isp_demon
else
echo "isp_demon not found"
fi
if [ -f /usr/bin/cardv ]; then
cardv &
else
echo "cardv not found"
fi
fi

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#!/bin/sh
# System Daemon Run
echo "nvtapp" > /proc/nvt_info/bootts
inetd
crond
#DeviceDiscovery -d &
echo "nvtapp" > /proc/nvt_info/bootts
# for ISP tool
#echo "run isp_demon"
#/usr/bin/isp_demon
# disable childless pll
echo d > /proc/nvt_info/nvt_clk/clk_childless

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#!/bin/sh
NETWORK_SETUP_SCRIPT="/etc/init.d/net_init.sh"
SF_BOOT_MODE=1
kernel_cmdline=$(cat /proc/cmdline)
SF_HUNTING_BOOT_MODE=`dmesg | grep -o 'Mode=[0-9]*' | cut -d'=' -f2`
echo SF_HUNTING_BOOT_MODE=${SF_HUNTING_BOOT_MODE}
do_wifi_init()
{
if [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_RTK" ]; then
#/etc/init.d/BS_Net_wifiap8189ftv
if [ "${SF_BOOT_MODE}" = "${SF_HUNTING_BOOT_MODE}" ]; then
echo "Configuring BS_Net_wifiap8189ftv sf start"
/etc/init.d/BS_Net_wifiap8189ftv
else
echo "Configuring BS_Net_wifiap8189ftv sf stop"
fi
elif [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_BRCM" ]; then
modprobe bcmdhd
# TBD
fi
}
echo "net" > /proc/nvt_info/bootts
if [ "$NVT_ETHERNET" == "NVT_ETHERNET_NONE" ] && [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_NONE" ]; then
echo "Without network"
else
if [ "$NVT_SDIO_WIFI" != "NVT_SDIO_WIFI_NONE" ]; then
do_wifi_init;
fi
if [ "$NVT_ETHERNET" != "NVT_ETHERNET_NONE" ]; then
modprobe ntkimethmac
ifconfig eth0 up
# nvtsystem will generate this network setup script
if [ -f "$NETWORK_SETUP_SCRIPT" ]; then
$NETWORK_SETUP_SCRIPT
else
echo "Configuring loopback interface"
ifconfig lo 127.0.0.1
if [ "$NVT_DEFAULT_NETWORK_BOOT_PROTOCOL" == "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_SERVER" ]; then
ifconfig eth0 192.168.0.3
udhcpd -fS /etc/udhcpd.conf &
elif [ "$NVT_DEFAULT_NETWORK_BOOT_PROTOCOL" == "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_CLIENT" ]; then
udhcpc -i %s -p /var/run/udhcpc_%s.pid -T 10 -t 1 -x hostname:$(hostname) &
else
ifconfig eth0 192.168.0.3
fi
fi
fi
fi
echo "net" > /proc/nvt_info/bootts
telnetd

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[ -f /etc/sysctl.conf ] && sysctl -p >&-
modprobe drvdump
# coredump setting
# echo 1 > /proc/sys/kernel/core_uses_pid
ulimit -c unlimited
# echo "/var/log/core-%e-%p-%t" > /proc/sys/kernel/core_pattern
# cardv &
# echo 7 4 1 7 > /proc/sys/kernel/printk
# cat /proc/{cardv_pid}/maps for debug purpose
# sleep 0.2
# cat /proc/$(ps | grep 'cardv' | awk 'NR==1{print $1}')/maps
#cat /proc/$(ps | grep 'sf_app' | awk 'NR==1{print $1}')/maps

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#!/bin/sh
# To run /etc/init.d/S* script
for deinitscript in /etc/init.d/K[0-9][0-9]*
do
if [ -x $deinitscript ] ;
then
echo "[End] $deinitscript"
$deinitscript
fi
done

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#!/bin/sh
# source profile_prjcfg on /etc/init.d/rcS (init script cycle) and /etc/profile (after startup cycle)
source /etc/profile_prjcfg
# fstab devices create
mount -a
echo "ker" > /proc/nvt_info/bootts
echo "rcS" > /proc/nvt_info/bootts
# To run /etc/init.d/S* script
for initscript in /etc/init.d/S[0-9][0-9]*
do
if [ -x $initscript ]; then
echo "[Start] $initscript"
$initscript
fi
done
echo "rcS" > /proc/nvt_info/bootts

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# /etc/inittab init(8) configuration for BusyBox
#
# Copyright (C) 1999-2004 by Erik Andersen <andersen@codepoet.org>
#
#
# Note, BusyBox init doesn't support runlevels. The runlevels field is
# completely ignored by BusyBox init. If you want runlevels, use sysvinit.
#
#
# Format for each entry: <id>:<runlevels>:<action>:<process>
#
# <id>: WARNING: This field has a non-traditional meaning for BusyBox init!
#
# The id field is used by BusyBox init to specify the controlling tty for
# the specified process to run on. The contents of this field are
# appended to "/dev/" and used as-is. There is no need for this field to
# be unique, although if it isn't you may have strange results. If this
# field is left blank, it is completely ignored. Also note that if
# BusyBox detects that a serial console is in use, then all entries
# containing non-empty id fields will be ignored. BusyBox init does
# nothing with utmp. We don't need no stinkin' utmp.
#
# <runlevels>: The runlevels field is completely ignored.
#
# <action>: Valid actions include: sysinit, respawn, askfirst, wait, once,
# restart, ctrlaltdel, and shutdown.
#
# Note: askfirst acts just like respawn, but before running the specified
# process it displays the line "Please press Enter to activate this
# console." and then waits for the user to press enter before starting
# the specified process.
#
# Note: unrecognized actions (like initdefault) will cause init to emit
# an error message, and then go along with its business.
#
# <process>: Specifies the process to be executed and it's command line.
#
# Note: BusyBox init works just fine without an inittab. If no inittab is
# found, it has the following default behavior:
# ::sysinit:/etc/init.d/rcS
# ::askfirst:/bin/sh
# ::ctrlaltdel:/sbin/reboot
# ::shutdown:/sbin/swapoff -a
# ::shutdown:/bin/umount -a -r
# ::restart:/sbin/init
#
# if it detects that /dev/console is _not_ a serial console, it will
# also run:
# tty2::askfirst:/bin/sh
# tty3::askfirst:/bin/sh
# tty4::askfirst:/bin/sh
#
# Boot-time system configuration/initialization script.
# This is run first except when booting in single-user mode.
#
::sysinit:sh /etc/init.d/rcS
# /bin/sh invocations on selected ttys
#
# Note below that we prefix the shell commands with a "-" to indicate to the
# shell that it is supposed to be a login shell. Normally this is handled by
# login, but since we are bypassing login in this case, BusyBox lets you do
# this yourself...
#
# Start an "askfirst" shell on the console (whatever that may be)
# Start a shell whatever it is.
ttyS0::respawn:-/bin/login -f root
#ttyS0::sysinit:/bin/sh
#ttyUSB0::sysinit:/bin/sh
# Start an "askfirst" shell on /dev/tty2-4
#tty2::askfirst:-/bin/sh
#tty3::askfirst:-/bin/sh
#tty4::askfirst:-/bin/sh
# /sbin/getty invocations for selected ttys
#tty4::respawn:/sbin/getty 38400 tty5
#tty5::respawn:/sbin/getty 38400 tty6
# Example of how to put a getty on a serial line (for a terminal)
#::respawn:/sbin/getty -L ttyS0 9600 vt100
#::respawn:/sbin/getty -L ttyS1 9600 vt100
#
# Example how to put a getty on a modem line.
#::respawn:/sbin/getty 57600 ttyS2
# Stuff to do when restarting the init process
::restart:/sbin/init
# Stuff to do before rebooting
::ctrlaltdel:/sbin/reboot
::shutdown:/etc/init.d/rcK
::shutdown:/bin/umount -a -r
::shutdown:/sbin/swapoff -a

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#! /bin/sh
if [ "$1" == "" ]; then
echo "parameter is none" > /tmp/error.txt
exit 1
fi
mounted=`mount | grep $1 | wc -l`
# mounted, assume we umount
if [ $mounted -ge 1 ]; then
echo "R/media/$1" >> /tmp/usbmnt.log
echo "R/media/$1" > /tmp/fifo.1
if ! umount "/media/$1"; then
exit 1
fi
if ! rmdir "/media/$1"; then
exit 1
fi
# not mounted, lets mount under /media
else
if ! mkdir -p "/media/$1"; then
exit 1
fi
if ! mount "/dev/$1" "/media/$1"; then
# failed to mount, clean up mountpoint
if ! rmdir "/media/$1"; then
exit 1
fi
exit 1
fi
echo "A/media/$1" >> /tmp/usbmnt.log
echo "A/media/$1" > /tmp/fifo.1
fi
exit 0

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#!/bin/sh
ISCSI_CONF_FILE=/etc/event_iscsi.conf
# the first session path or the current device
G_SESSION_PATH1=
# values of the configuration file
G_CFG_NAME=
G_CFG_IP=
G_CFG_TARGET=
G_CFG_USER=
G_CFG_PASSWD=
G_CFG_BMOUNT=
# parsing values in sysfs
G_SYS_PTNUM=
G_SYS_IP=
G_SYS_USER=
G_SYS_PASSWD=
G_SYS_TARGET=
myecho()
{
# normal echo
# echo "$*"
# output to file
# echo "$*" >> /autoscsi.log
:
}
reset_cfg_value()
{
G_CFG_NAME=
G_CFG_IP=
G_CFG_TARGET=
G_CFG_USER=
G_CFG_PASSWD=
G_CFG_BMOUNT=
}
get_cfg_setting()
{
#File content example:
#iscsi_name=iscsi_name
#iscsi_ip=192.168.0.6
#iscsi_target_name=iqn.2006-03.com.kernsafe:jtv208-PC.RamDisk0
#iscsi_user=
#iscsi_password=
#iscsi_bmount=0
#assume TARGET_TAG=my_iscsi_name
local FIND_IP=$1
local FIND_TARGET=$2
myecho FIND_IP=$FIND_IP
myecho FIND_TARGET=$FIND_TARGET
reset_cfg_value
if [ ! -e $ISCSI_CONF_FILE ]; then
myecho $ISCSI_CONF_FILE not found
return 1
fi
exec < $ISCSI_CONF_FILE
while read line; do
#myecho $line
TAG_NAME=${line%%=*}
TAG_VAL=${line##*=}
case "${TAG_NAME}" in
"iscsi_name")
#the following belongs to other groups, check the previous group
if [ ! -z $G_CFG_NAME ] && [ $FIND_IP == $G_CFG_IP ] && [ $FIND_TARGET == $G_CFG_TARGET ]; then
break #break while read line
fi
reset_cfg_value
G_CFG_NAME=$TAG_VAL
;;
"iscsi_ip")
G_CFG_IP=$TAG_VAL
;;
"iscsi_target_name")
G_CFG_TARGET=$TAG_VAL
;;
"iscsi_user")
G_CFG_USER=$TAG_VAL
;;
"iscsi_password")
G_CFG_PASSWD=$TAG_VAL
;;
"iscsi_bmount")
G_CFG_BMOUNT=$TAG_VAL
;;
*)
;;
esac
done
# check the last group, it may double check here when we found it before the file end
if [ ! -z $G_CFG_NAME ] && [ $FIND_IP == $G_CFG_IP ] && [ $FIND_TARGET == $G_CFG_TARGET ]; then
myecho G_CFG_NAME=$G_CFG_NAME
myecho G_CFG_IP=$G_CFG_IP
myecho G_CFG_TARGET=$G_CFG_TARGET
myecho G_CFG_USER=$G_CFG_USER
myecho G_CFG_PASSWD=$G_CFG_PASSWD
myecho G_CFG_BMOUNT=$G_CFG_BMOUNT
return 0
fi
return 1
}
get_session_path1()
{
#assume $1 is the iscsi device name, such as "sda"
local TARGET_ISCSI_DEV=$1
local HOST_DIR
local SESSION_PATH1
local BLOCK_FILE
local BLOCK_DEV
myecho TARGET_ISCSI_DEV=$TARGET_ISCSI_DEV
for HOST_DIR in /sys/devices/platform/host*; do
#e.g. HOST_DIR=/sys/devices/platform/host0
if ! [ -d $HOST_DIR/iscsi_host* ]; then
continue
fi
for SESSION_PATH1 in $HOST_DIR/session*; do
#e.g. SESSION_PATH1=/sys/devices/platform/host0/session1
if ! [ -d $SESSION_PATH1/target* ]; then
continue
fi
for BLOCK_FILE in $SESSION_PATH1/target*/*\:*/block/*; do
#e.g. BLOCK_FILE=/sys/devices/platform/host0/session1/target0:0:0/0:0:0:0/block/sda
BLOCK_DEV=`echo "$BLOCK_FILE" | sed 's/.*block\///'`
#e.g. BLOCK_DEV=sda
if [ $BLOCK_DEV == $TARGET_ISCSI_DEV ]; then
myecho BLOCK_DEV=$BLOCK_DEV
G_SESSION_PATH1=$SESSION_PATH1
return 0
fi
done
done
done
G_SESSION_PATH1=
return 1
}
get_sys_devinfo()
{
local SESSION_PATH1=$1
local SESSION_PATH2
local BLOCK_DEVPATH
local DEV_PARTIPATH
local CONNECTION_PATH
local BLOCK_DEV
local DEV_PARTINAME
for BLOCK_DEVPATH in $SESSION_PATH1/target*/*\:*/block/*; do
#e.g. BLOCK_DEVPATH=/sys/devices/platform/host2/session3/target2:0:0/2:0:0:0/block/sda
myecho BLOCK_DEVPATH=$BLOCK_DEVPATH
BLOCK_DEV=`echo "$BLOCK_DEVPATH" | sed 's/.*block\///'`
#e.g. BLOCK_DEV=sda
myecho BLOCK_DEV=$BLOCK_DEV
G_SYS_PTNUM=0
for DEV_PARTIPATH in $BLOCK_DEVPATH/$BLOCK_DEV*; do
#e.g. DEV_PARTIPATH=/sys/devices/platform/host2/session3/target2:0:0/2:0:0:0/block/sda/sda1
myecho DEV_PARTIPATH=$DEV_PARTIPATH
DEV_PARTINAME=`echo "$DEV_PARTIPATH" | sed "s/.*$BLOCK_DEV\///"`
#e.g. DEV_PARTINAME=sda1
myecho DEV_PARTINAME=$DEV_PARTINAME
let "G_SYS_PTNUM += 1"
done
done
for SESSION_PATH2 in $SESSION_PATH1/iscsi_session/session*; do
#e.g. SESSION_PATH2=/sys/devices/platform/host1/session2/iscsi_session/session2
#myecho SESSION_PATH2=$SESSION_PATH2
G_SYS_USER=`cat $SESSION_PATH2/username`
G_SYS_PASSWD=`cat $SESSION_PATH2/password`
G_SYS_TARGET=`cat $SESSION_PATH2/targetname`
done
for CONNECTION_PATH in $SESSION_PATH1/connection*/iscsi_connection/connection*\:*; do
#e.g. CONNECTION_PATH=/sys/devices/platform/host1/session2/connection2:0/iscsi_connection/connection2:0
myecho CONNECTION_PATH=$CONNECTION_PATH
G_SYS_IP=`cat $CONNECTION_PATH/address`
done
myecho G_SYS_PTNUM=$G_SYS_PTNUM
myecho G_SYS_IP=$G_SYS_IP
myecho G_SYS_USER=$G_SYS_USER
myecho G_SYS_PASSWD=$G_SYS_PASSWD
myecho G_SYS_TARGET=$G_SYS_TARGET
return 0
}
my_umount()
{
FOLDER=`grep "/dev/$1" /proc/mounts | cut -d ' ' -f 2`
if [ ! -z "$FOLDER" ]; then
umount -l "$FOLDER";
fi
}
my_mount()
{
#assume $1=sda, sdb, ...
local DEV_NAME=$1
#set default values
local MOUNT_DEV=/dev/$DEV_NAME
local MOUNT_FOLDER=/mnt/$DEV_NAME
#if it is iscsi, update the values
get_session_path1 $DEV_NAME
if [ $? = 0 ]; then
#is iscsi device
get_sys_devinfo $G_SESSION_PATH1
if [ $? = 0 ]; then
get_cfg_setting $G_SYS_IP $G_SYS_TARGET
if [ $? = 0 ]; then
myecho G_SYS_PTNUM=$G_SYS_PTNUM
if [ $G_SYS_PTNUM = 0 ]; then
MOUNT_DEV=/dev/$DEV_NAME
MOUNT_FOLDER=/mnt/iscsi/$G_CFG_NAME
elif [ $G_SYS_PTNUM = 1 ]; then
MOUNT_DEV=/dev/$DEV_NAME$G_SYS_PTNUM
MOUNT_FOLDER=/mnt/iscsi/$G_CFG_NAME
else
myecho Partition Num $G_SYS_PTNUM not supported
return 1
fi
fi
fi
fi
myecho MOUNT_DEV=$MOUNT_DEV
myecho MOUNT_FOLDER=$MOUNT_FOLDER
mkdir -p "${MOUNT_FOLDER}" || return 1
mount "${MOUNT_DEV}" "${MOUNT_FOLDER}" || return 1
}
case "${ACTION}" in
add|"")
my_mount ${MDEV}
;;
remove)
my_umount ${MDEV}
;;
esac

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#!/bin/sh
MNT_PATH=/mnt
MNT_DIR=
SD1_DIR=sd
SD2_DIR=sd2
SD3_DIR=sd3
EMMC1_DIR=emmc1
EMMC2_DIR=emmc2
CACHE_DIR=cache
DRIVE_A=""
DRIVE_B=""
my_umount()
{
FOLDER=`grep "/dev/$1" /proc/mounts | cut -d ' ' -f 2`
if [ ! -z "$FOLDER" ]; then
umount -l "$FOLDER";
fi
}
my_mount()
{
MMCBUSNUM=`echo $DEVPATH | cut -d '/' -f 4`
if [ "$MMCBUSNUM" == "nt96660_mmc.0" ] || [ "$MMCBUSNUM" == "f0420000.mmc" ]; then
MNT_DIR=$SD1_DIR
elif [ "$MMCBUSNUM" == "nt96660_mmc.1" ] || [ "$MMCBUSNUM" == "f0500000.mmc" ]; then
MNT_DIR=$SD2_DIR
else
MNT_DIR=$SD3_DIR
fi
if [ -b /dev/$1 ]; then
MOUNTDEV="/dev/$1"
if [ -b "/dev/$1p1" ]; then
MOUNTDEV="/dev/$1p1"
fi
fi
time_offset_sig=`date +%z | cut -c 1`
time_offset_h=`date +%z | cut -c 2-3`
time_offset_m=`date +%z | cut -c 4-5`
time_offset=`expr $local_time - $utc_time`
if [ $time_offset_sig == + ]; then
time_offset_sig="";
fi
time_offset_total_m=$time_offset_sig`expr $time_offset_h \* 60 + $time_offset_m`
mkdir -p "${MNT_PATH}/${MNT_DIR}" || exit 1
fat_type=`blkid "$MOUNTDEV" | awk -F'TYPE=' '{print $NF}'`
if [ "${fat_type}" == "\"vfat\"" ]; then
if ! mount -o usefree,dirsync,time_offset=$time_offset_total_m "$MOUNTDEV" "${MNT_PATH}/${MNT_DIR}" 2>&1 | tee -a /tmp/mountstat; then
echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts
exit 1
fi
elif [ "${fat_type}" == "\"exfat\"" ]; then
if ! mount -t exfat "$MOUNTDEV" "${MNT_PATH}/${MNT_DIR}" 2>&1 | tee -a /tmp/mountstat; then
echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts
continue
fi
else
echo "$MOUNTDEV FAIL" >> /tmp/.nvt_mounts
exit 1
fi
}
check_mmc_ready()
{
MMCBUSPATH="/sys/bus/mmc/devices/"
x=0
timeout=100
while [ "$x" -lt "$timeout" -a ! -d $MMCBUSPATH ]; do
x=$((x+1))
sleep .1
done
if [ "$x" -ge "$timeout" ]; then
return -1;
fi
return 0;
}
if [ -z $DEVPATH ]; then
# This is for boot stage handling
MMCBUSPATH="/sys/bus/mmc/devices/"
check_mmc_ready
if [ $? != 0 ]; then
exit;
fi
MMCDEVLIST=`ls $MMCBUSPATH`
time_offset_sig=`date +%z | cut -c 1`
time_offset_h=`date +%z | cut -c 2-3`
time_offset_m=`date +%z | cut -c 4-5`
time_offset=`expr $local_time - $utc_time`
if [ $time_offset_sig == + ]; then
time_offset_sig="";
fi
time_offset_total_m=$time_offset_sig`expr $time_offset_h \* 60 + $time_offset_m`
for n in $MMCDEVLIST
do
# Check if it is not SD device
SD_TYPE=`cat $MMCBUSPATH/$n/type`
if [ $SD_TYPE == SDIO ]; then
continue
fi
if [ $SD_TYPE == MMC ]; then
# To check if it's the emmc storage device
if [ -f $MMCBUSPATH/$n/bga ]; then
BGA=`cat $MMCBUSPATH/$n/bga`
if [ 1 == $BGA ]; then
# Get the block device name
BLOCKDEV=`ls $MMCBUSPATH/$n/block`
# Check if device is mounted
MOUNTED=`grep $BLOCKDEV /proc/mounts`
if [ ! -z "$MOUNTED" ]; then
continue
fi
if [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_EMMC" ]; then
if [ -b "/dev/${BLOCKDEV}p2" ]; then
if ! mount -t vfat /dev/${BLOCKDEV}p2 /mnt/${CACHE_DIR}; then
echo yes | mkfs.vfat /dev/${BLOCKDEV}p2;
if ! mount -t vfat /dev/${BLOCKDEV}p2 /mnt/${CACHE_DIR}; then
exit 1;
fi
fi
fi
if [ -b "/dev/${BLOCKDEV}p5" ]; then
if ! mount -t ext4 /dev/${BLOCKDEV}p5 /mnt/${EMMC1_DIR}; then
echo yes | mkfs.ext4 /dev/${BLOCKDEV}p5;
if ! mount -t ext4 /dev/${BLOCKDEV}p5 /mnt/${EMMC1_DIR}; then
exit 1;
fi
fi
fi
if [ -b "/dev/${BLOCKDEV}p6" ]; then
if ! mount -t ext4 /dev/${BLOCKDEV}p6 /mnt/${EMMC2_DIR}; then
echo yes | mkfs.ext4 /dev/${BLOCKDEV}p6;
if ! mount -t ext4 /dev/${BLOCKDEV}p6 /mnt/${EMMC2_DIR}; then
exit 1;
fi
fi
fi
else
# Using fdisk to check if it needs to be partitioned
if [ -f /etc/autofdisk.sh ]; then
mknod /dev/${BLOCKDEV} b `cat /sys/block/${BLOCKDEV}/dev | sed "s/:/\ /g"`
/etc/autofdisk.sh ${BLOCKDEV}
if [ $? != 0 ]; then
echo -e "\e[1;31m\rUpdate rootfs failed. #1\r\e[0m"
exit 1;
fi
fi
sync
sleep 1
if [ -b "/dev/${BLOCKDEV}p1" ]; then
if ! mount -t ext4 /dev/${BLOCKDEV}p1 /mnt/${EMMC1_DIR}; then
echo yes | mkfs.ext4 /dev/${BLOCKDEV}p1;
if ! mount -t ext4 /dev/${BLOCKDEV}p1 /mnt/${EMMC1_DIR}; then
exit 1;
fi
fi
fi
if [ -b "/dev/${BLOCKDEV}p2" ]; then
if ! mount -t ext4 /dev/${BLOCKDEV}p2 /mnt/${EMMC2_DIR}; then
echo yes | mkfs.ext4 /dev/${BLOCKDEV}p2;
if ! mount -t ext4 /dev/${BLOCKDEV}p2 /mnt/${EMMC2_DIR}; then
exit 1;
fi
fi
fi
fi
fi
fi
continue
fi
# Get the block device name
BLOCKDEV=`ls $MMCBUSPATH/$n/block`
# Check if device is mounted
MOUNTED=`grep $BLOCKDEV /proc/mounts`
# Create folder
if [ ! -z `echo $n | grep mmc0` ]; then
MNT_DIR=$SD1_DIR
elif [ ! -z `echo $n | grep mmc1` ]; then
MNT_DIR=$SD2_DIR
else
MNT_DIR=$SD3_DIR
fi
if [ ! -z "$MOUNTED" ]; then
continue
fi
# Check if /dev/mmcblk* exists
if [ -b /dev/$BLOCKDEV ]; then
MOUNTDEV="/dev/$BLOCKDEV"
if [ -b "/dev/${BLOCKDEV}p1" ]; then
MOUNTDEV="/dev/${BLOCKDEV}p1"
fi
else
continue
fi
# Inserted but can't be mounted
fat_type=`blkid "$MOUNTDEV" | awk -F'TYPE=' '{print $NF}'`
if [ "${fat_type}" == "\"vfat\"" ]; then
if ! mount -o usefree,dirsync,time_offset=$time_offset_total_m "$MOUNTDEV" "${MNT_PATH}/${MNT_DIR}" 2>&1 | tee -a /tmp/mountstat; then
echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts
continue
fi
elif [ "${fat_type}" == "\"exfat\"" ]; then
if ! mount -t exfat "$MOUNTDEV" "${MNT_PATH}/${MNT_DIR}" 2>&1 | tee -a /tmp/mountstat; then
echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts
continue
fi
else
echo "Unkown SD type!!!"
echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts
continue
fi
done
touch /tmp/.nvt_mounts
else
# This is for booted up stage
case "${ACTION}" in
add|"")
my_umount ${MDEV}
my_mount ${MDEV}
;;
remove)
my_umount ${MDEV}
;;
esac
fi

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#
# This is a sample mdev.conf
#
# Provide user, group, and mode information for devices. If a regex matches
# the device name provided by sysfs, use the appropriate user:group and mode
# instead of the default 0:0 660.
#
# Syntax:
# [-]devicename_regex user:group mode [=path]|[>path]|[!] [@|$|*cmd args...]
# [-]$ENVVAR=regex user:group mode [=path]|[>path]|[!] [@|$|*cmd args...]
# [-]@maj,min[-min2] user:group mode [=path]|[>path]|[!] [@|$|*cmd args...]
#
# [-]: do not stop on this match, continue reading mdev.conf
# =: move, >: move and create a symlink
# !: do not create device node
# @|$|*: run@cmd if $ACTION=add, $cmd if $ACTION=remove, *cmd in all cases
# support module loading on hotplug
$MODALIAS=.* root:root 660 @modprobe "$MODALIAS"
#mmcblk[0-9]p[0-9] root:root 660 */etc/mdev-script/autosd.sh
mmcblk[0-2] root:root 660 */etc/mdev-script/autosd.sh
#sd[a-z] root:root 660 */etc/mdev-script/autoscsi.sh

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# Configure Loopback
auto lo
iface lo inet loopback
# Configure eth0, dhcp client
auto eth0
iface eth0 inet dhcp
# Configure wlan0, dhcp client
#auto wlan0
#iface wlan0 inet dhcp
# Configure wlan0, fix ip
auto wlan0
iface wlan0 inet static
address 192.168.1.2
netmask 255.255.255.0
# Configure eth0
#auto eth0
#iface eth0 inet static
#address 192.168.0.2
#netmask 255.255.255.0
#gateway 192.168.0.1

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root::0:0:root:/root:/bin/sh

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@ -0,0 +1,82 @@
# /etc/profile: system-wide .profile file for the Bourne shell (sh(1))
# and Bourne compatible shells (bash(1), ksh(1), ash(1), ...).
# source profile_prjcfg on /etc/init.d/rcS (init script cycle) and /etc/profile (after startup cycle)
source /etc/profile_prjcfg
export PATH="/usr/bin:/usr/sbin:/usr/local/bin:/usr/local/sbin:/bin:/sbin"
export LD_LIBRARY_PATH="/lib:/usr/local/lib:/usr/lib"
export TERMINFO=/usr/share/terminfo
#export LD_PRELOAD="libnvtlibc.so"
if [ -f /etc/hostname ]; then
/bin/hostname -F /etc/hostname
fi
# coredump setting
echo 1 > /proc/sys/kernel/core_uses_pid
ulimit -c unlimited
echo "/var/log/core-%e-%p-%t" > /proc/sys/kernel/core_pattern
export HOSTNAME=`/bin/hostname`
export PS1='\u@\h:\w$ '
echo "$HOSTNAME Linux shell..."
alias camname='cardv sys camname'
alias cammode='cardv sys cammode'
alias imgsize='cardv sys imgsize'
alias videosize='cardv sys videosize'
alias videolen='cardv sys videolen'
alias flashled='cardv sys flashled'
alias nightmode='cardv sys nightmode'
alias multishot='cardv sys multishot'
alias pirsw='cardv sys pirsw'
alias pirsen='cardv sys pirsen'
alias pirdelay='cardv sys pirdelay'
alias timelapse='cardv sys timelapse'
alias worktime='cardv sys worktime'
alias dateauto='cardv sys dateauto'
alias datestyle='cardv sys datestyle'
alias campwd='cardv sys campwd'
alias battype='cardv sys battype'
alias sdloop='cardv sys sdloop'
alias rtcset='cardv sys rtcset'
alias gprsmode='cardv sys gprsmode'
alias sendmaxnum='cardv sys sendmaxnum'
alias sendpicsize='cardv sys sendpicsize'
alias sendphoto='cardv sys sendphoto'
alias sendvideo='cardv sys sendvideo'
alias piccount='cardv sys piccount'
alias dailyreport='cardv sys dailyreport'
alias dailyreporttest='cardv sys dailyreporttest'
alias simautomatch='cardv sys simautomatch'
alias simpinflag='cardv sys simpinflag'
alias simpinset='cardv sys simpinset'
alias sim4gapn='cardv sys sim4gapn'
alias sim4gusername='cardv sys sim4gusername'
alias sim4gpsw='cardv sys sim4gpsw'
alias imei='cardv sys imei'
alias modulever='cardv sys modulever'
alias modulesubver='cardv sys modulesubver'
alias gpssw='cardv sys gpssw'
alias latitude='cardv sys latitude'
alias longitude='cardv sys longitude'
alias webip='cardv sys webip'
alias acmip='cardv sys acmip'
alias debugmode='cardv sys debugmode'
alias autooffsw='cardv sys autooffsw'
alias autoofftime='cardv sys autoofftime'
alias qlogsw='cardv sys qlogsw'
alias rawsw='cardv sys rawsw'
alias batterysw='cardv sys batterysw'
alias state='cardv sys state'
alias reset='cardv sys reset'
alias mcupara='cardv sys mcupara'
alias setusbmuxs='cardv sys setusbmuxs'
alias 4gusbboot='cardv sys 4gusbboot'
alias ftpsw='cardv sys ftpsw'
alias ftpset='cardv sys ftpset'
alias ftpsset='cardv sys ftpsset'
alias stampsw='cardv sys stampsw'
alias gprssw='cardv sys gprssw'

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@ -0,0 +1,2 @@
nameserver 192.168.0.1

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# Network services, Internet style
#
# Note that it is presently the policy of IANA to assign a single well-known
# port number for both TCP and UDP; hence, officially ports have two entries
# even if the protocol doesn't support UDP operations.
#
# Updated from http://www.iana.org/assignments/port-numbers and other
# sources like http://www.freebsd.org/cgi/cvsweb.cgi/src/etc/services .
# New ports will be added on request if they have been officially assigned
# by IANA and used in the real-world or are needed by a debian package.
# If you need a huge list of used numbers please install the nmap package.
ntp 123/tcp
ntp 123/udp # Network Time Protocol

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#
# /etc/sysctl.conf - Configuration file for setting system variables
#
#kernel.domainname = example.com
# Uncomment the following to stop low-level messages on console
#kernel.printk = 3 4 1 3
##############################################################3
# Functions previously found in netbase
#
# Uncomment the next two lines to enable Spoof protection (reverse-path filter)
# Turn on Source Address Verification in all interfaces to
# prevent some spoofing attacks
#net.ipv4.conf.default.rp_filter=1
#net.ipv4.conf.all.rp_filter=1
# Uncomment the next line to enable TCP/IP SYN cookies
# See http://lwn.net/Articles/277146/
# Note: This may impact IPv6 TCP sessions too
#net.ipv4.tcp_syncookies=1
# Uncomment the next line to enable packet forwarding for IPv4
#net.ipv4.ip_forward=1
# Uncomment the next line to enable packet forwarding for IPv6
# Enabling this option disables Stateless Address Autoconfiguration
# based on Router Advertisements for this host
#net.ipv6.conf.all.forwarding=1
###################################################################
# Additional settings - these settings can improve the network
# security of the host and prevent against some network attacks
# including spoofing attacks and man in the middle attacks through
# redirection. Some network environments, however, require that these
# settings are disabled so review and enable them as needed.
#
# Do not accept ICMP redirects (prevent MITM attacks)
#net.ipv4.conf.all.accept_redirects = 0
#net.ipv6.conf.all.accept_redirects = 0
# _or_
# Accept ICMP redirects only for gateways listed in our default
# gateway list (enabled by default)
# net.ipv4.conf.all.secure_redirects = 1
#
# Do not send ICMP redirects (we are not a router)
#net.ipv4.conf.all.send_redirects = 0
#
# Do not accept IP source route packets (we are not a router)
#net.ipv4.conf.all.accept_source_route = 0
#net.ipv6.conf.all.accept_source_route = 0
#
# Log Martian Packets
#net.ipv4.conf.all.log_martians = 1
#
kernel.panic=10
kernel.panic_on_oops=0
vm.min_free_kbytes=1500
vm.vfs_cache_pressure=300
vm.dirty_writeback_centisecs=100
vm.dirty_bytes=5000000
vm.dirty_background_bytes=5000000
vm.dirty_expire_centisecs=300

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# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule NVT 1970 only - Mar lastSun 1:00u 1:00 D
Rule NVT 1970 only - Oct lastSun 1:00u 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone CST 0:00 NVT C%sT

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# Sample udhcpd configuration file (/etc/udhcpd.conf)
# Values shown are defaults
# The start and end of the IP lease block
start 192.168.1.20
end 192.168.1.254
# The interface that udhcpd will use
interface eth0
# The maximum number of leases (includes addresses reserved
# by OFFER's, DECLINE's, and ARP conflicts). Will be corrected
# if it's bigger than IP lease block, but it ok to make it
# smaller than lease block.
#max_leases 254
# The amount of time that an IP will be reserved (leased to nobody)
# if a DHCP decline message is received (seconds)
#decline_time 3600
# The amount of time that an IP will be reserved
# if an ARP conflict occurs (seconds)
#conflict_time 3600
# How long an offered address is reserved (seconds)
#offer_time 60
# If client asks for lease below this value, it will be rounded up
# to this value (seconds)
#min_lease 60
# The location of the pid file
#pidfile /var/run/udhcpd.pid
# The location of the leases file
#lease_file /var/lib/misc/udhcpd.leases
# The time period at which udhcpd will write out leases file.
# If this is 0, udhcpd will never automatically write leases file.
# Specified in seconds.
#auto_time 7200
# Every time udhcpd writes a leases file, the below script will be called
#notify_file # default: no script
#notify_file dumpleases # useful for debugging
# The following are bootp specific options
# next server to use in bootstrap
#siaddr 192.168.0.22 # default: 0.0.0.0 (none)
# tftp server name
#sname zorak # default: none
# tftp file to download (e.g. kernel image)
#boot_file /var/nfs_root # default: none
# Static leases map
#static_lease 00:60:08:11:CE:4E 192.168.0.54
#static_lease 00:60:08:11:CE:3E 192.168.0.44
# The remainder of options are DHCP options and can be specified with the
# keyword 'opt' or 'option'. If an option can take multiple items, such
# as the dns option, they can be listed on the same line, or multiple
# lines.
# Examples:
#opt dns 192.168.10.2 192.168.10.10
opt dns 0.0.0.0
option subnet 255.255.255.0
#opt router 192.168.10.2
opt router 192.168.0.2
#opt wins 192.168.10.10
opt wins 0.0.0.0
option dns 129.219.13.81 # appended to above DNS servers for a total of 3
option domain local
option lease 864000 # default: 10 days
option msstaticroutes 10.0.0.0/8 10.127.0.1 # single static route
option staticroutes 10.0.0.0/8 10.127.0.1, 10.11.12.0/24 10.11.12.1
# Arbitrary option in hex form:
option 0x08 01020304 # option 8: "cookie server IP addr: 1.2.3.4"
# Currently supported options (for more info, see options.c):
#opt lease NUM
#opt subnet IP
#opt broadcast IP
#opt router IP_LIST
#opt ipttl NUM
#opt mtu NUM
#opt hostname STRING # client's hostname
#opt domain STRING # client's domain suffix
#opt search STRING_LIST # search domains
#opt nisdomain STRING
#opt timezone NUM # (localtime - UTC_time) in seconds. signed
#opt tftp STRING # tftp server name
#opt bootfile STRING # tftp file to download (e.g. kernel image)
#opt bootsize NUM # size of that file
#opt rootpath STRING # (NFS) path to mount as root fs
#opt wpad STRING
#opt serverid IP # default: server's IP
#opt message STRING # error message (udhcpd sends it on success too)
#opt vlanid NUM # 802.1P VLAN ID
#opt vlanpriority NUM # 802.1Q VLAN priority
# Options specifying server(s)
#opt dns IP_LIST
#opt wins IP_LIST
#opt nissrv IP_LIST
#opt ntpsrv IP_LIST
#opt lprsrv IP_LIST
#opt swapsrv IP
# Options specifying routes
#opt routes IP_PAIR_LIST
#opt staticroutes STATIC_ROUTES # RFC 3442 classless static route option
#opt msstaticroutes STATIC_ROUTES # same, using MS option number
# Obsolete options, no longer supported
#opt logsrv IP_LIST # 704/UDP log server (not syslog!)
#opt namesrv IP_LIST # IEN 116 name server, obsolete (August 1979!!!)
#opt cookiesrv IP_LIST # RFC 865 "quote of the day" server, rarely (never?) used
#opt timesrv IP_LIST # RFC 868 time server, rarely (never?) used
# TODO: in development
#opt userclass STRING # RFC 3004. set of LASCII strings. "I am a printer" etc
#opt sipserv STRING LIST # RFC 3361. flag byte, then: 0: domain names, 1: IP addrs

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# Sample udhcpd configuration file (/etc/udhcpd.conf)
# Values shown are defaults
# The start and end of the IP lease block
start 192.168.1.20
end 192.168.1.254
# The interface that udhcpd will use
interface wlan0
#interface ap0
# The maximim number of leases (includes addresses reserved
# by OFFER's, DECLINE's, and ARP conficts). Will be corrected
# if it's bigger than IP lease block, but it ok to make it
# smaller than lease block.
#max_leases 254
# The time period at which udhcpd will write out a dhcpd.leases
# file. If this is 0, udhcpd will never automatically write a
# lease file. Specified in seconds.
#auto_time 7200
# The amount of time that an IP will be reserved (leased to nobody)
# if a DHCP decline message is received (seconds).
#decline_time 3600
# The amount of time that an IP will be reserved
# if an ARP conflct occurs (seconds).
#conflict_time 3600
# How long an offered address is reserved (seconds).
#offer_time 60
# If client asks for lease below this value, it will be rounded up
# to this value (seconds).
#min_lease 60
# The location of the leases file
#lease_file /var/lib/misc/udhcpd.leases
# The location of the pid file
#pidfile /var/run/udhcpd.pid
# Everytime udhcpd writes a leases file, the below script will be called.
#notify_file # default: no script
#notify_file dumpleases # useful for debugging
# The following are bootp specific options, settable by udhcpd.
#siaddr 192.168.0.22 #default: 0.0.0.0
#sname zorak #default: none
#boot_file /var/nfs_root #default: none
# The remainer of options are DHCP options and can be specifed with the
# keyword 'opt' or 'option'. If an option can take multiple items, such
# as the dns option, they can be listed on the same line, or multiple
# lines. The only option with a default is 'lease'.
# Examples:
opt dns 192.168.1.1
option subnet 255.255.255.0
#opt router 192.168.1.1
#opt wins 192.168.10.10
#option dns 129.219.13.81 # appened to above DNS servers for a total of 3
option domain local
option lease 864000 # 10 days of seconds
# Currently supported options (for more info, see options.c):
#opt subnet
#opt timezone
#opt router
#opt timesrv
#opt namesrv
#opt dns
#opt logsrv
#opt cookiesrv
#opt lprsrv
#opt bootsize
#opt domain
#opt swapsrv
#opt rootpath
#opt ipttl
#opt mtu
#opt broadcast
#opt wins
#opt lease
#opt ntpsrv
#opt tftp
#opt bootfile
# Static leases map
#static_lease 00:60:08:11:CE:4E 192.168.0.54
#static_lease 00:60:08:11:CE:3E 192.168.0.44

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interface=wlan0
ssid=680apwpa2
channel=6
wpa=0
wpa_passphrase=1234567890
driver=nl80211
beacon_int=100
hw_mode=g
ieee80211n=1
wme_enabled=1
wpa_key_mgmt=WPA-PSK
wpa_pairwise=CCMP
rsn_pairwise=CCMP
max_num_sta=1
wpa_group_rekey=86400

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network={
ssid="MYSSID"
proto=RSN
key_mgmt=WPA-PSK
pairwise=CCMP TKIP
group=CCMP TKIP
psk="myssidpwd"
}

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#include "kwrap/type.h"
#include "DrvExt.h"
#include "Dx.h"
#include "DxCommon.h"
#include "DxCfg.h"
#if defined(_MCU_ENABLE_)
#include "MCUCtrl.h"
#include "MCU2Ctrl.h"
#endif
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxDrv
#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
///////////////////////////////////////////////////////////////////////////////
//IO
/*
[PinmuxCfg.c]
pinmux
[GpioMapping.c]
cgpio x32 (Storage)
pgpio x64 (Peripheral)
sgpio x30 (SENSOR)
lgpio x28 (LCD)
dgpio x9 (Dedicated)
pwm x20
pwm_ccnt x3
[VoltageDet.c]
adc x8
[SerialComm.c]
i2c x2 x2
sif x1 x6
csi x2 x4
lvds x1 x10
spi x3
uart x2
*/
extern DX_OBJECT gDevLCD;
extern DX_OBJECT gDevPowerBATT;
extern DX_OBJECT gDevPowerDC;
extern DX_OBJECT gDevEmbMem0;
extern DX_OBJECT gDevEmbMem1;
extern DX_OBJECT gDevEmbMem2;
extern DX_OBJECT gDevEmbMem3;
extern DX_OBJECT gDevEmbMem4;
extern DX_OBJECT gDevEmbMem5;
extern DX_OBJECT gDevEmbMem6;
extern DX_OBJECT gDevEmbMem7;
extern DX_OBJECT gDevEmbMem8;
extern DX_OBJECT gDevCARD1;
extern DX_OBJECT gDevCARD3;
extern DX_OBJECT gDevUSB;
#if _TODO
extern DX_OBJECT gDevTV;
extern DX_OBJECT gDevLCD2;
extern DX_OBJECT gDevHDMI;
extern DX_OBJECT gDevSnd;
extern DX_OBJECT gDevLED;
#endif
DX_HANDLE Dx_GetObject(UINT32 DxClassType) // Query device object
{
UINT32 hDevice = 0;
switch (DxClassType & DX_CLASS_MASK) {
//external device
case DX_CLASS_DISPLAY_EXT:
#if !defined(_Disp_VIRTUAL_LCD1_OFF_)
if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_LCD) {
hDevice = (UINT32)(&gDevLCD);
}
#endif
break;
case DX_CLASS_POWER_EXT:
#if defined(_POWER_BATT_)
hDevice = (UINT32)(&gDevPowerBATT);
#elif defined(_POWER_DC_)
hDevice = (UINT32)(&gDevPowerDC);
#else
hDevice = 0;
DBG_ERR("Require a POWER EXT device!\r\n");
#endif
break;
case DX_CLASS_STORAGE_EXT:
#if (!defined(_EMBMEM_NONE_)) && (!defined(_EMBMEM_UITRON_OFF_))
if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM0) {
hDevice = (UINT32)(&gDevEmbMem0);
} else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM1) {
hDevice = (UINT32)(&gDevEmbMem1);
} else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM2) {
hDevice = (UINT32)(&gDevEmbMem2);
} else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM3) {
hDevice = (UINT32)(&gDevEmbMem3);
} else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM4) {
hDevice = (UINT32)(&gDevEmbMem4);
} else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM5) {
hDevice = (UINT32)(&gDevEmbMem5);
} else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM6) {
hDevice = (UINT32)(&gDevEmbMem6);
} else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM7) {
hDevice = (UINT32)(&gDevEmbMem7);
} else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM8) {
hDevice = (UINT32)(&gDevEmbMem8);
}
#endif
#if !defined(_CARD1_NONE_)
if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_CARD1) {
hDevice = (UINT32)(&gDevCARD1);
}
#endif
#if !defined(_CARD3_NONE_)
if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_CARD3) {
hDevice = (UINT32)(&gDevCARD3);
}
#endif
break;
case DX_CLASS_USB_EXT:
hDevice = (UINT32)(&gDevUSB);
break;
#if _TODO
case DX_CLASS_AUDIO_EXT:
#if (defined(_AUDIO_ON_))
hDevice = (UINT32)(&gDevSnd);
#endif
break;
case DX_CLASS_SENSOR_EXT:
break;
case DX_CLASS_INPUT_EXT:
break;
case DX_CLASS_STATUS_EXT:
if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_OUTLED) {
#if (defined(_MODEL_IPCAM1_EVB_) || defined(_MODEL_IPCAM2_EVB_))
#elif (defined(_MODEL_DVCAM1_EVB_) || defined(_MODEL_DVCAM2_EVB_))
hDevice = (UINT32)(&gDevLED);
#endif
}
break;
#endif
}
if (hDevice == 0) {
DBG_ERR("[Dx] GetObject %08x failed\r\n", DxClassType);
}
return (DX_HANDLE)hDevice;
}
UINT8 *Dx_GetModelExtCfg(MODELEXT_TYPE type, MODELEXT_HEADER **header)
{
#if _TODO
UINT8 *p_modelext = NULL;
#if defined(_MODELEXT_BUILT_IN_ON_)
#define LABEL_NAME(_name_) _name_
extern char LABEL_NAME(_section_modelext_info_addr)[];
extern char LABEL_NAME(_section_modelext_info_size)[];
static BOOL bInit = FALSE;
if (!bInit) {
MODELEXT_HEADER *header;
MODELEXT_INFO *pData;
pData = (MODELEXT_INFO *)modelext_get_cfg((unsigned char *)_section_modelext_info_addr, MODELEXT_TYPE_INFO, &header);
if (pData == NULL) {
DBG_FATAL("MODELEXT_INFO is null, call by = 0x%08X\r\n", __CALL__ - 8);
return NULL;
}
pData->ext_bin_length = (UINT32)_section_modelext_info_size;
bInit = TRUE;
}
UINT8 *p_modelext = (UINT8 *)modelext_get_cfg((unsigned char *)_section_modelext_info_addr, type, header); //_TODO: VOS need nvt_mem converting address
#else
UINT8 *p_modelext = (UINT8 *)modelext_get_cfg((unsigned char *)_BOARD_IPC_ADDR_, type, header); //_TODO: VOS need nvt_mem converting address
#endif
if (p_modelext == NULL || *header == NULL) {
DBG_FATAL("MODELEXT_TYPE = %d is null\r\n", type);
return NULL;
}
return p_modelext;
#else
return 0;
#endif
}
void Install_DrvExt(void)
{
#if defined(_MCU_ENABLE_)
MCUCtrl_InstallID();
MCU2Ctrl_InstallID();
#endif
}

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#ifndef _DXCFG_H
#define _DXCFG_H
//#define _Disp_VIRTUAL_LCD1_OFF_
//#define _AUDIO_ON_
//#define _EMBMEM_NONE_
//#define _EMBMEM_UITRON_OFF_
//#define _CARD1_NONE_
//#define _CARD3_NONE_
#define _POWER_DC_
//#define _POWER_BATT_
//#define _MCU_ENABLE_
#define USB_CHARGE_FUNCTION DISABLE
#define TV_SWITCH_FUNCTION DISABLE
#define GPIO_DUMMYLOAD_FUNCTION DISABLE
#endif

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#include "kwrap/type.h"
#include "Dx.h"
#include "DxCommon.h"
#include "DxDisplay.h"
#include "IOCfg.h"
#include "hdal.h"
#include "vendor_videoout.h"
#include "GxVideo.h"
#include "Utility/SwTimer.h"
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxDisp
#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
///////////////////////////////////////////////////////////////////////////////
//EVB default is _Disp_IF8B_LCD1_PW35P00_HX8238D_
#define LCD_MAX_W ALIGN_CEIL_16(240) //device w of DISP_LCDMODE_xxx, to support rotate, it must align to 16
#define LCD_MAX_H ALIGN_CEIL_16(320) //device h of DISP_LCDMODE_xxx, to support rotate, it must align to 16
#define LCD_ASPECT_W 3
#define LCD_ASPECT_H 4
#define DISP_DUAL DISABLE
#if !defined(_Disp_VIRTUAL_LCD1_OFF_)
#define LCDMODE 0
//Configure
#define CFG_IDE_DMA_HIGH DISABLE //Enable will cause IPE bandwith not enough
// Local Variables
static UINT32 g_LCDDout = 0; //current dout
static UINT32 g_LCDMode = 0; //current mode
static UINT32 g_LCDLastMode = 0; //current mode
static UINT32 g_LCDEnable = FALSE; //not yet enable
static UINT32 g_LCDSleep = FALSE;
#define DRVLCD_BRT_LEVEL_MAX 10
#define DRVLCD_BRT_LEVEL_INIT 5
static BOOL g_LCDBacklightEn = FALSE;
static INT32 g_LCDBacklightLvl = DRVLCD_BRT_LEVEL_INIT;
static UINT32 g_LCDDual = FALSE;
// LCD control object
static BOOL g_bLCDWaitTurnOnFinish = FALSE;
static UINT32 g_localMode = 0; //new mode
static USIZE *pCurrentSize = 0; //return size
//public func
static UINT32 DrvLCDGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
static UINT32 DrvLCDSetcfgs(UINT32 CfgID, UINT32 Param1); // Set Config Setting
static UINT32 DrvLCDInit(void *pInitParam); // Set Init Parameters
static UINT32 DrvLCDOpen(void); // Common Constructor
static UINT32 DrvLCDClose(void); // Common Destructor
static UINT32 DrvLCDState(UINT32 StateID, UINT32 Value); // General Properties
static UINT32 DrvLCDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods
static UINT32 DrvLCDCommand(CHAR *pcCmdStr); //General Command Console
//internal func
static void DrvLCD_TurnOn(void);
static void DrvLCD_TurnOn_WaitFinish(void);
static void DrvLCD_TurnOff(void);
static void DrvLCD_Dump(void);
static void DrvLCD_SleepEnter(void);
static void DrvLCD_SleepLeave(void);
static void GPIOMap_TurnOnLCDBacklight(void);
static void GPIOMap_TurnOffLCDBacklight(void);
static void GPIOMap_SetLCDBacklightBrightLevel(INT32 uiLevel);
static void GPIOMap_AdjustLCDBacklight(UINT32 uiAdjValue);
static BOOL GPIOMap_IsLCDBacklightOn(void);
static void GPIOMap_DumpBacklight(void);
static void GPIOMap_TurnOnLCDPower(void);
static void GPIOMap_TurnOffLCDPower(void);
static void GPIOMap_LCDReset(void);
//static BOOL GPIOMap_IsLCDPowerOn(void);
//dx object
DX_OBJECT gDevLCD = {
DXFLAG_SIGN,
DX_CLASS_DISPLAY_EXT | DX_TYPE_LCD,
DISPLAY_VER,
"Display_LCD",
0, 0, 0, 0,
DrvLCDGetcaps,
DrvLCDSetcfgs,
DrvLCDInit,
DrvLCDOpen,
DrvLCDClose,
DrvLCDState,
DrvLCDControl,
DrvLCDCommand,
0,
};
static UINT32 DrvLCDGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version)
{
UINT32 v = 0;
switch (CapID & 0x0000ffff) {
case DISPLAY_CAPS_BASE:
v = DISPLAY_BF_BACKLIGHT;
break;
case DISPLAY_CAPS_DEFMODE:
v = LCDMODE;
break;
#if 0
case DISPLAY_CAPS_MODEINFO: {
// int mode = (CapID & 0xffff0000) >> 16;
ISIZE *pModeInfo = (ISIZE *)Param1;
#if 0
_DrvLCDHookDout(g_LCDDout);
pDev->SEL.SET_LCDMODE.Mode = mode;
pObj->devCtrl(DISPDEV_SET_LCDMODE, pDev);
pDev->SEL.GET_PREDISPSIZE.DevID = DISPDEV_ID_PANEL;
pObj->devCtrl(DISPDEV_GET_PREDISPSIZE, pDev);
if (pModeInfo) {
pModeInfo->w = pDev->SEL.GET_PREDISPSIZE.uiBufWidth;
pModeInfo->h = pDev->SEL.GET_PREDISPSIZE.uiBufHeight;
}
#else
pModeInfo->w = 960;
pModeInfo->w = 240;
DBG_ERR("need porting\r\n");
#endif
}
break;
#endif
case DISPLAY_CAPS_MAXSIZE: {
ISIZE *pSizeInfo = (ISIZE *)Param1;
if (pSizeInfo) {
pSizeInfo->w = LCD_MAX_W;
pSizeInfo->h = LCD_MAX_H;
}
}
break;
case DISPLAY_CAPS_ASPECT: {
ISIZE *pAspectInfo = (ISIZE *)Param1;
if (pAspectInfo) {
pAspectInfo->w = LCD_ASPECT_W;
pAspectInfo->h = LCD_ASPECT_H;
}
}
break;
default:
break;
}
return v;
}
static UINT32 DrvLCDSetcfgs(UINT32 CfgID, UINT32 Param1) // Set Config Setting
{
switch (CfgID) {
case DISPLAY_CFG_MODE:
DBG_IND("set mode %08x\r\n", Param1);
g_LCDLastMode = Param1;
break;
case DISPLAY_CFG_DOUT:
g_LCDDout = Param1;
break;
case DISPLAY_CFG_DUAL:
g_LCDDual = Param1;
break;
case DISPLAY_CFG_INFOBUF:
pCurrentSize = (USIZE *)Param1;
break;
default:
break;
}
return DX_OK;
}
static UINT32 DrvLCDInit(void *pInitParam) // Set Init Parameters
{
DBG_FUNC_BEGIN("\r\n");
g_LCDLastMode = DrvLCDGetcaps(DISPLAY_CAPS_DEFMODE, 0);
return DX_OK;
}
static UINT32 DrvLCDOpen(void) // Common Constructor
{
DBG_FUNC_BEGIN("\r\n");
DBG_IND("LCD dout by IDE%d\r\n", g_LCDDout + 1);
GPIOMap_TurnOnLCDPower();
GPIOMap_LCDReset();
g_localMode = g_LCDLastMode;
DBG_IND("open mode %08x\r\n", g_localMode);
DrvLCD_TurnOn();
g_LCDEnable = TRUE;
return DX_OK;
}
static UINT32 DrvLCDClose(void) // Common Destructor
{
DBG_FUNC_BEGIN("\r\n");
DrvLCD_TurnOff();
// Panel enter sleep mode
GPIOMap_TurnOffLCDPower();
g_LCDLastMode = g_LCDMode;
g_LCDMode = 0;
g_LCDEnable = FALSE;
return DX_OK;
}
static void DrvLCD_TurnOn(void)
{
DBG_FUNC_BEGIN("\r\n");
g_LCDMode = g_localMode;
}
static void DrvLCD_TurnOn_WaitFinish(void)
{
DBG_FUNC_BEGIN("\r\n");
g_LCDEnable = TRUE;
}
static void DrvLCD_TurnOff(void)
{
DBG_FUNC_BEGIN("\r\n");
//NOTE: VERY VERY VERY VERY VERY IMPORTANT!!!!!
//上層要確保SleepEnter()跟TurnOff()不會重複發生!!!
//if DrvLCD_SleepEnter() is called ClosePanel, then here DrvLCD_TurnOff() also call ClosePanel again,
//=> it will cause sif_close() is call twice by LCD driver internal,
//=> then ALL sif_send() command of other devices will become abnormally!!!
//=> 可能現象1: 造成CCD無法wakeup (TG會用到sif)
//=> 可能現象2: 造成CCD拍出壞照片 (TG會用到sif)
#if 0
//LCD panel close
pObj->devCtrl(DISPDEV_CLOSE_DEVICE, NULL);
#endif
// Turn off LCD power
g_LCDEnable = FALSE;
}
static void DrvLCD_SleepEnter(void)
{
HD_RESULT ret =0 ;
HD_PATH_ID video_out_path = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_PATH);
// LCD backlight
GPIOMap_TurnOffLCDBacklight();
hd_videoout_stop(video_out_path);
ret = vendor_videoout_set(VENDOR_VIDEOOUT_ID0,VENDOR_VIDEOOUT_ITEM_ENTER_SLEEP,NULL);
if(ret!=HD_OK){
DBG_ERR("ret %d\r\n", ret);
}
GPIOMap_LCDReset();
g_LCDSleep = TRUE;
}
static void DrvLCD_SleepLeave(void)
{
HD_RESULT ret =0 ;
HD_PATH_ID video_out_path = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_PATH);
HD_PATH_ID video_out_ctrl = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_CTRLPATH);
HD_FB_ENABLE video_out_enable={0};
ret = vendor_videoout_set(VENDOR_VIDEOOUT_ID0,VENDOR_VIDEOOUT_ITEM_EXIT_SLEEP,NULL);
if(ret!=HD_OK){
DBG_ERR("wake %d\r\n");
}
hd_videoout_start(video_out_path);
video_out_enable.fb_id = HD_FB0;
video_out_enable.enable = 1;
ret = hd_videoout_set(video_out_ctrl, HD_VIDEOOUT_PARAM_FB_ENABLE, &video_out_enable);
if(ret!=HD_OK){
DBG_ERR("fb enable %d\r\n", ret);
}
// LCD backlight
GPIOMap_TurnOnLCDBacklight();
g_LCDSleep = FALSE;
}
static UINT32 DrvLCDState(UINT32 StateID, UINT32 Value) // General Properties
{
DBG_FUNC_BEGIN("\r\n");
if (StateID & DXGET) {
UINT32 rvalue = 0;
StateID &= ~DXGET;
DBG_IND("get %08x\r\n", StateID);
switch (StateID) {
case DRVDISP_STATE_ENBALE:
//lost device? ---> cannot determine enable or not
//under flow like: enable/disable
rvalue = g_LCDEnable;
break;
case DRVDISP_STATE_MODE:
//lost device? ---> cannot determine mode
//under flow like: change mode
rvalue = g_LCDMode;
break;
case DRVDISP_STATE_LASTMODE:
rvalue = g_LCDLastMode;
break;
case DRVDISP_STATE_SLEEP:
rvalue = g_LCDSleep;
break;
case DRVDISP_STATE_BACKLIGHT:
rvalue = GPIOMap_IsLCDBacklightOn() ? DRVDISP_BACKLIGHT_ON : DRVDISP_BACKLIGHT_OFF;
break;
case DRVDISP_STATE_BRIGHTLVL:
rvalue = g_LCDBacklightLvl;
break;
default:
DBG_WRN("get state=0x%02X not support!\r\n", StateID);
break;
}
return rvalue;
} else if (StateID & DXSET) {
StateID &= ~DXSET;
DBG_IND("set %08x\r\n", StateID);
switch (StateID) {
case DRVDISP_STATE_BACKLIGHT:
if (Value == DRVDISP_BACKLIGHT_OFF) {
DBG_IND("DRVDISP_BACKLIGHT_OFF\r\n");
GPIOMap_TurnOffLCDBacklight();
} else { //if(value == DRVDISP_BACKLIGHT_ON)
DBG_IND("DRVDISP_BACKLIGHT_ON\r\n");
GPIOMap_TurnOnLCDBacklight();
}
break;
case DRVDISP_STATE_BRIGHTLVL: {
DBG_IND("DRVDISP_BRIGHTLVL=%d\r\n", Value);
GPIOMap_SetLCDBacklightBrightLevel((INT32)Value);
}
break;
case DRVDISP_STATE_DIRECT:
#if 0 //set direct by LCD driver!
if(pObj) {
//////////////////////////////////////////////////////////////////////
// special operation for this project!
//
//if (Value == (0x01 | 0x02)) {
// pDev->SEL.SET_ROTATE.Rot = DISPDEV_LCD_ROTATE_180;
//} else {
// pDev->SEL.SET_ROTATE.Rot = DISPDEV_LCD_ROTATE_NONE;
//}
//pObj->devCtrl(DISPDEV_SET_ROTATE,pDev);
//////////////////////////////////////////////////////////////////////
}
#endif
#if 0 //set direct by IDE!
//NOTE: project must set GxDisplay OSD1 layer's uiWinAttr = MIRROR_KEEP;
//NOTE: project must set VdoOut VDO1 layer's desc.degree = VDODISP_ROTATE_NO_HANDLE;
if(pObj) {
DISPLAYER_PARAM LyrParam;
memset(&LyrParam, 0, sizeof(DISPLAYER_PARAM));
if (Value == (0x01 | 0x02)) {
LyrParam.SEL.SET_OUTDIR.BufOutDir = DISPOUTDIR_ROT_180;
} else {
LyrParam.SEL.SET_OUTDIR.BufOutDir = DISPOUTDIR_NORMAL;
}
pObj->dispLyrCtrl(DISPLAYER_OSD1, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress
pObj->dispLyrCtrl(DISPLAYER_OSD2, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress
pObj->dispLyrCtrl(DISPLAYER_VDO1, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress
pObj->dispLyrCtrl(DISPLAYER_VDO2, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress
pObj->load(TRUE);
}
#endif
break;
default:
DBG_WRN("set state=0x%02X not support!\r\n", StateID);
break;
}
}
return DX_OK;
}
static UINT32 DrvLCDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods
{
DBG_FUNC_BEGIN("\r\n");
DBG_IND("ctrl %08x\r\n", CtrlID);
switch (CtrlID) {
case DRVDISP_CTRL_MODE: {
//DrvLCD_TurnOff();
g_localMode = Param1;
//DrvLCD_TurnOn();
//g_bLCDWaitTurnOnFinish = TRUE;
}
break;
case DRVDISP_CTRL_SLEEP:
if (Param1 == TRUE) {
DBG_IND("DRVDISP_CTRL_SLEEP 1\r\n");
DrvLCD_SleepEnter();
} else if (Param1 == FALSE) {
DBG_IND("DRVDISP_CTRL_SLEEP 0\r\n");
DrvLCD_SleepLeave();
}
break;
case DRVDISP_CTRL_WAITFINISH:
if (g_bLCDWaitTurnOnFinish == TRUE) {
DrvLCD_TurnOn_WaitFinish();
g_bLCDWaitTurnOnFinish = FALSE;
}
break;
default:
DBG_WRN("ctrl id=0x%02X not support!\r\n", CtrlID);
break;
}
return DX_OK;
}
static UINT32 DrvLCDCommand(CHAR *pcCmdStr) //General Command Console
{
switch (*pcCmdStr) {
case 'd':
if (!strncmp(pcCmdStr, "disp lcd dump", 13)) {
DrvLCD_Dump();
return TRUE;
}
break;
}
return FALSE;
}
static void DrvLCD_Dump(void)
{
GPIOMap_DumpBacklight();
}
////////////////////////////////////////////////////////////////////////////////
// GPIO related
static void GPIOMap_LCDReset(void)
{
FILE *fp = NULL;
UINT32 u32LogoEnable = 0;
UINT32 u32Size = 0;
char *pStrSrc = NULL;
fp = fopen("/sys/firmware/devicetree/base/logo/enable", "r");
if(fp != NULL){
fseek(fp, 0, SEEK_END);
u32Size = ftell(fp);
fseek(fp, 0, SEEK_SET);
pStrSrc = (char *) malloc(u32Size * sizeof(char));
if(pStrSrc){
fread(pStrSrc, 1, u32Size, fp);
u32LogoEnable = ((UINT32) pStrSrc[0] << 24) + ((UINT32) pStrSrc[1] << 16) + ((UINT32) pStrSrc[2] << 8) + ((UINT32) pStrSrc[3]);
free(pStrSrc);
DBG_IND("u32LogoEnable = 0x%X\n", u32LogoEnable);
}
fclose(fp);
pStrSrc = NULL;
u32Size = 0;
}
if(u32LogoEnable == 1){
return;
}
// Reset LCD
gpio_setDir(GPIO_LCD_RESET, GPIO_DIR_OUTPUT);
gpio_setPin(GPIO_LCD_RESET);
SwTimer_DelayMs(10);
gpio_clearPin(GPIO_LCD_RESET);
SwTimer_DelayMs(10);
gpio_setPin(GPIO_LCD_RESET);
}
/**
Turn on LCD power
Turn on LCD power.
@param void
@return void
*/
static void GPIOMap_TurnOnLCDPower(void)
{
}
/**
Turn off LCD power
Turn off LCD power.
@param void
@return void
*/
static void GPIOMap_TurnOffLCDPower(void)
{
}
/**
Check whether LCD power is on or not
Check whether LCD power is on or not.
Return TRUE if LCD power is on, return FALSE if LCD power is off.
@param void
@return BOOL
*/
//static BOOL GPIOMap_IsLCDPowerOn(void)
//{
// return TRUE;
//}
////////////////////////////////////////////////////////////////////////
//#NT#2009/12/15#Lincy Lin -begin
#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM)
static PWM_CFG g_LCDBacklightPWMInfo = {1, 60, 0, 60, 0, 0};
static UINT32 g_LCDBacklightLvlPWMDuty[DRVLCD_BRT_LEVEL_MAX] = {
59,//48,// level 0
44,// level 1
35,// level 2
28,// level 3
25,// level 4
22,// level 5
20,// level 6
18,// level 7
17,// level 8
5, //10 // level 9
};
#endif
/**
Turn on LCD backlight
Turn on LCD backlight.
@param void
@return void
*/
static void GPIOMap_TurnOnLCDBacklight(void)
{
DBG_IND("GPIOMap_TurnOnLCDBacklight: Adjust value %d\r\n", g_LCDBacklightLvl);
if (g_LCDBacklightEn == FALSE) {
#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM)
g_LCDBacklightPWMInfo.uiRise = g_LCDBacklightLvlPWMDuty[g_LCDBacklightLvl];
DBG_IND("PWM: rise=%d\r\n", g_LCDBacklightPWMInfo.uiRise);
pwm_open(PWMID_LCD_BLG_PCTL);
pwm_pwmConfig(PWMID_LCD_BLG_PCTL, &g_LCDBacklightPWMInfo);
pwm_pwmEnable(PWMID_LCD_BLG_PCTL);
#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO)
gpio_setPin(GPIO_LCD_BLG_PCTL);
#else
DrvLCD_TurnOn();
DrvLCD_TurnOn_WaitFinish();
#endif
g_LCDBacklightEn = TRUE;
}
}
static void GPIOMap_SetLCDBacklightBrightLevel(INT32 uiLevel)
{
g_LCDBacklightLvl = uiLevel;
if (g_LCDBacklightLvl < 0) {
DBG_WRN("DrvLCDSetCtrl Warning! brightlvl=0x%02X out of range\r\n", g_LCDBacklightLvl);
g_LCDBacklightLvl = 0;
}
if (g_LCDBacklightLvl >= DRVLCD_BRT_LEVEL_MAX) {
DBG_WRN("DrvLCDSetCtrl Warning! brightlvl=0x%02X out of range\r\n", g_LCDBacklightLvl);
g_LCDBacklightLvl = DRVLCD_BRT_LEVEL_MAX - 1;
}
if (!g_LCDBacklightEn) {
return;
}
GPIOMap_AdjustLCDBacklight(g_LCDBacklightLvl);
}
/**
Turn off LCD backlight
Turn off LCD backlight.
@param void
@return void
*/
static void GPIOMap_TurnOffLCDBacklight(void)
{
DBG_IND("GPIOMap_TurnOffLCDBacklight: Adjust value %d\r\n", g_LCDBacklightLvl);
if (g_LCDBacklightEn == TRUE) {
#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM)
pwm_pwmDisable(PWMID_LCD_BLG_PCTL);
pwm_close(PWMID_BLG_PCTL, TRUE);
#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO)
gpio_clearPin(GPIO_LCD_BLG_PCTL);
#else
DrvLCD_TurnOff();
#endif
g_LCDBacklightEn = FALSE;
}
}
/**
Adjust LCD backlight level
Adjust LCD backlight level.
@param UINT32 uiAdjValue
@return void
*/
static void GPIOMap_AdjustLCDBacklight(UINT32 uiAdjValue)
{
DBG_IND("GPIOMap_AdjustLCDBacklight: Adjust value %d\r\n", uiAdjValue);
/* Re-start PWM */
if (g_LCDBacklightEn) {
#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM)
g_LCDBacklightPWMInfo.uiRise = g_LCDBacklightLvlPWMDuty[g_LCDBacklightLvl];
DBG_IND("PWM: rise=%d\r\n", g_LCDBacklightPWMInfo.uiRise);
pwm_pwmDisable(PWMID_LCD_BLG_PCTL);
pwm_pwmConfig(PWMID_LCD_BLG_PCTL, &g_LCDBacklightPWMInfo);
pwm_pwmEnable(PWMID_LCD_BLG_PCTL);
#endif
}
}
/**
Check whether LCD backlight is on or not
Check whether LCD backlight is on or not.
Return TRUE if LCD backlight is on, return FALSE if LCD backlight is off.
@param void
@return BOOL
*/
static BOOL GPIOMap_IsLCDBacklightOn(void)
{
return g_LCDBacklightEn;
}
static void GPIOMap_DumpBacklight(void)
{
#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM)
DBG_DUMP("BACKLIGHT clk :\t\t%d MHz\r\n", 48 / (g_LCDBacklightPWMInfo.uiDiv + 1));
DBG_DUMP("BACKLIGHT Duty :\t%d %\r\n", (g_LCDBacklightPWMInfo.uiFall - g_LCDBacklightPWMInfo.uiRise) * 100 / g_LCDBacklightPWMInfo.uiPrd);
#endif
}
#endif

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/**
Copyright Novatek Microelectronics Corp. 2009. All rights reserved.
@file DetKey.c
@ingroup mIPRJAPKeyIO
@brief Scan key, modedial
Scan key, modedial
@note Nothing.
@date 2017/05/02
*/
/** \addtogroup mIPRJAPKeyIO */
//@{
#include "DxCfg.h"
#include "IOCfg.h"
#include "DxInput.h"
#include "KeyDef.h"
#include "comm/hwclock.h"
#include "comm/hwpower.h"
#if 0
#include "rtc.h"
#include "Delay.h"
#endif
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxKey
#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// ADC related
////////////////////////////////////////////////////////////////////////////////
#if (ADC_KEY == ENABLE)
#define VOLDET_KEY_ADC_LVL1 (251)
#define VOLDET_KEY_ADC_LVL2 (155)
#define VOLDET_KEY_ADC_LVL3 (51)
#define VOLDET_KEY_ADC_TH (460)
#define VOLDET_KEY_ADC_LVL4 (358)
#define VOLDET_KEY_LVL_UNKNOWN 0xFFFFFFFF
#define VOLDET_KEY_LVL_0 0
#define VOLDET_KEY_LVL_1 1
#define VOLDET_KEY_LVL_2 2
#define VOLDET_KEY_LVL_3 3
#define VOLDET_KEY_LVL_4 4
#define VOLDET_KEY_LVL_5 5
#endif
#if (ADC_KEY == ENABLE)
static UINT32 VolDet_GetKey1ADC(void)
{
#if (VOLDET_ADC_CONT_MODE == DISABLE)
UINT32 uiADCValue;
uiADCValue = adc_readData(ADC_CH_VOLDET_KEY1);
// One-Shot Mode, trigger one-shot
adc_triggerOneShot(ADC_CH_VOLDET_KEY1);
return uiADCValue;
#else
return adc_readData(ADC_CH_VOLDET_KEY1);
#endif
}
/**
Get ADC key voltage level
Get ADC key 2 voltage level.
@param void
@return UINT32 key level, refer to VoltageDet.h -> VOLDET_MS_LVL_XXXX
*/
static UINT32 VolDet_GetKey1Level(void)
{
static UINT32 uiRetKey1Lvl;
UINT32 uiKey1ADC, uiCurKey2Lvl;
uiKey1ADC = VolDet_GetKey1ADC();
DBG_IND("uiKey1ADC %d \r\n", uiKey1ADC);
if (uiKey1ADC < VOLDET_KEY_ADC_TH) {
if (uiKey1ADC < VOLDET_KEY_ADC_LVL3) {
uiCurKey2Lvl = VOLDET_KEY_LVL_4;
} else if (uiKey1ADC < VOLDET_KEY_ADC_LVL2) {
uiCurKey2Lvl = VOLDET_KEY_LVL_3;
} else if (uiKey1ADC < VOLDET_KEY_ADC_LVL1) {
uiCurKey2Lvl = VOLDET_KEY_LVL_2;
} else if (uiKey1ADC < VOLDET_KEY_ADC_LVL4) {
uiCurKey2Lvl = VOLDET_KEY_LVL_1;
} else {
uiCurKey2Lvl = VOLDET_KEY_LVL_0;
}
} else {
uiCurKey2Lvl = VOLDET_KEY_LVL_UNKNOWN;
}
uiRetKey1Lvl = uiCurKey2Lvl;
return uiRetKey1Lvl;
}
/**
Detect Mode Switch state.
Detect Mode Switch state.
@param void
@return UINT32 Mode Switch state (DSC Mode)
*/
#endif
////////////////////////////////////////////////////////////////////////////////
// GPIO related
//static BOOL g_bIsShutter2Pressed = FALSE;
/**
Delay between toggle GPIO pin of input/output
Delay between toggle GPIO pin of input/output
@param void
@return void
*/
static void DrvKey_DetKeyDelay(void)
{
gpio_readData(0);
gpio_readData(0);
gpio_readData(0);
gpio_readData(0);
}
void DrvKey_Init(void)
{
}
/**
Detect normal key is pressed or not.
Detect normal key is pressed or not.
Return key pressed status (refer to KeyDef.h)
@param void
@return UINT32
*/
UINT32 DrvKey_DetNormalKey(void)
{
UINT32 uiKeyCode = 0;
#if (ADC_KEY == ENABLE)
UINT32 uiKey1Lvl = VolDet_GetKey1Level();
switch (uiKey1Lvl) {
case VOLDET_KEY_LVL_UNKNOWN:
default:
break;
case VOLDET_KEY_LVL_0:
uiKeyCode |= FLGKEY_RIGHT;
break;
case VOLDET_KEY_LVL_1:
uiKeyCode |= FLGKEY_DOWN;
break;
case VOLDET_KEY_LVL_2:
uiKeyCode |= FLGKEY_SHUTTER2;
break;
case VOLDET_KEY_LVL_3:
uiKeyCode |= FLGKEY_UP;
break;
case VOLDET_KEY_LVL_4:
uiKeyCode |= FLGKEY_ENTER;
break;
}
#endif
#if (GPIO_KEY == ENABLE)
if (!gpio_getPin(GPIO_KEY_SHUTTER2)) {
uiKeyCode |= FLGKEY_SHUTTER2;
}
if (!gpio_getPin(GPIO_KEY_UP)) {
uiKeyCode |= FLGKEY_UP;
}
if (!gpio_getPin(GPIO_KEY_DOWN)) {
uiKeyCode |= FLGKEY_DOWN;
}
if (!gpio_getPin(GPIO_KEY_MENU)) {
uiKeyCode |= FLGKEY_MENU;
}
// if (!gpio_getPin(GPIO_KEY_PLAYBACK)) {
// uiKeyCode |= FLGKEY_MENU;
// }
if (!gpio_getPin(GPIO_KEY_RIGHT)) {
uiKeyCode |= FLGKEY_RIGHT;
}
if (!gpio_getPin(GPIO_KEY_LEFT)) {
uiKeyCode |= FLGKEY_LEFT;
}
if (gpio_getPin(GPIO_KEY_DATAREADY)) {
uiKeyCode |= FLGKEY_DATAREADY;
}
#endif
/*
//detect if power-on by press playback key
if (!hwpower_get_power_key(POWER_ID_PSW2))
{
uiKeyCode |= FLGKEY_PLAYBACK;
}
*/
DBG_IND("KEY= %08x\r\n", uiKeyCode);
// DBG_DUMP("KEY= %d\r\n", gpio_getPin(GPIO_KEY_LEFT));
DrvKey_DetKeyDelay();
return uiKeyCode;
}
/**
Detect power key is pressed or not.
Detect power key is pressed or not.
Return key pressed status (refer to KeyDef.h)
@param void
@return UINT32
*/
UINT32 DrvKey_DetPowerKey(void)
{
UINT32 uiKeyCode = 0;
return uiKeyCode;
if (hwpower_get_power_key(POWER_ID_PSW1)) {
uiKeyCode = FLGKEY_KEY_POWER;
// Reset shutdown timer
hwpower_set_power_key(POWER_ID_PSW1, 0xf0);
}
return uiKeyCode;
}
UINT32 DrvKey_DetStatusKey(DX_STATUS_KEY_GROUP KeyGroup)
{
UINT32 uiReturn = STATUS_KEY_LVL_UNKNOWN;
switch (KeyGroup) {
case DX_STATUS_KEY_GROUP1:
break;
case DX_STATUS_KEY_GROUP2:
break;
case DX_STATUS_KEY_GROUP3:
break;
case DX_STATUS_KEY_GROUP4:
break;
case DX_STATUS_KEY_GROUP5:
break;
default:
DBG_ERR("[StatusKey]no this attribute");
break;
}
return uiReturn;
}

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#include "DxCfg.h"
#include "IOCfg.h"
#include "DxPower.h"
//#include "DxFlash.h"
#include "DxCommon.h"
//#include "DxApi.h"
#include "Dx.h"
#include <time.h>
#include <comm/hwclock.h>
#include <comm/hwpower.h>
#include <io/adc.h>
#if defined(_MCU_ENABLE_)
#include "MCUCtrl.h"
#endif
#define THIS_DBGLVL 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxPwr
#define __DBGLVL__ THIS_DBGLVL
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
#if defined(_POWER_BATT_)
#define TEMPDET_FUNCTION DISABLE
#define TEMPDET_TEST DISABLE
#define ADC_TEST ENABLE
#define DUMMY_LOAD 0
#define BATT_SLIDE_WINDOW_COUNT 8
#define VOLDET_BATTERY_420V 782
#define VOLDET_BATTERY_415V 772
#define VOLDET_BATTERY_410V 763
#define VOLDET_BATTERY_405V 754
#define VOLDET_BATTERY_400V 744
#define VOLDET_BATTERY_390V 726
#define VOLDET_BATTERY_380V 707
#define VOLDET_BATTERY_378V 703
#define VOLDET_BATTERY_377V 701
#define VOLDET_BATTERY_376V 699
#define VOLDET_BATTERY_375V 698
#define VOLDET_BATTERY_374V 696
#define VOLDET_BATTERY_373V 694
#define VOLDET_BATTERY_372V 692
#define VOLDET_BATTERY_371V 690
#define VOLDET_BATTERY_370V 688
#define VOLDET_BATTERY_369V 687
#define VOLDET_BATTERY_367V 683
#define VOLDET_BATTERY_366V 681
#define VOLDET_BATTERY_360V 670
#define VOLDET_BATTERY_355V 660
#define VOLDET_BATTERY_350V 651
#define VOLDET_BATTERY_340V 633
#define VOLDET_BATTERY_004V 7
#define CHARGE_ADC_OFFSET 25
#define LENS_ADC_OFFSET 23
#define LENS_ADC_OFFSET2 12
DummyLoadType dummyLoadData[11];
//***********************************************
//*
//* Battery Rule depend on Model
//*
//***********************************************
//#define VOLDET_BATTERY_ADC_TH 0
#if TEMPDET_TEST
INT32 temperature_value = 0;
#endif
static INT32 gTempValue = 25;
#if ADC_TEST
UINT32 gAdcValue = 3000;
#endif
#if defined(_MCU_ENABLE_)
UINT32 gMCUValue = 99;
#endif
//------------------ Battery Status Level -------------------//
#define BATT_LEVEL_COUNT 4
static UINT32 LiBattAdcLevelValue[BATT_LEVEL_COUNT] = {
VOLDET_BATTERY_355V,
VOLDET_BATTERY_371V,
VOLDET_BATTERY_376V,
VOLDET_BATTERY_380V,
};
#define DUMMY_LOAD_OFFSETV VOLDET_BATTERY_004V
#define LENS_MOVE_MAX_COUNT 10
static UINT32 *pBattAdcLevelValue = &LiBattAdcLevelValue[0];;
static UINT32 uiBattADCSlideWin[BATT_SLIDE_WINDOW_COUNT] = {0};
static UINT8 uiBattSlideIdx = 0;
static UINT8 uiCurSlideWinCnt = 0;
static INT32 iBattAdcCalOffset = 0;
#if USB_CHARGE_FUNCTION
static UINT32 u32BattChargeCurrent = BATTERY_CHARGE_CURRENT_LOW;
#endif
#if DUMMY_LOAD
static void DrvPower_dummy_process(UINT32 *V1, UINT32 *V2, BOOL bIris);
#endif
static INT32 DrvPower_GetTempCompentation(INT32 tempValue);
static UINT32 bDummyLoadPwrOff = FALSE;
//static DX_CALLBACK_PTR g_fpDxPowerCB = NULL;
/**
Get battery voltage ADC value
Get battery voltage ADC value
@param void
@return UINT32 ADC value
*/
static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1);
static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1);
static UINT32 DrvPowerInit(void *pInitParam);
static UINT32 DrvPowerOpen(void);
static UINT32 DrvPowerClose(void);
static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value);
static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2);
static UINT32 DrvPowerCommand(CHAR *pcCmdStr);
static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl);
static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value);
#if USB_CHARGE_FUNCTION
static INT32 DrvPower_BattTempGet(void);
#endif
static void DrvPower_PowerOnInit(void);
DX_OBJECT gDevPowerBATT = {
DXFLAG_SIGN,
DX_CLASS_POWER_EXT,
POWER_VER,
"Power",
0, 0, 0, 0,
DrvPowerGetcaps,
DrvPowercfgs,
DrvPowerInit,
DrvPowerOpen,
DrvPowerClose,
DrvPowerState,
DrvPowerControl,
DrvPowerCommand,
0,
};
static UINT32 DrvPower_GetBatteryADC(void)
{
UINT32 uiADCValue;
INT32 TempCompentationADC;
#if ADC_TEST
uiADCValue = gAdcValue;
#else
#if defined(_MCU_ENABLE_)
MCUCtrl_SendCmd(UART_CMD_VBAT_DETECT,0,0,0);
uiADCValue = gMCUValue;
return uiADCValue;
#else
uiADCValue = (adc_readData(ADC_CH_VOLDET_BATTERY));
#endif
#endif
{
TempCompentationADC = DrvPower_GetTempCompentation(gTempValue);
DBG_MSG("Temp= %d\r\n", gTempValue);
#if 0 //charlie need wait DrvFlash_IsCharge finish
if (DrvFlash_IsCharge()) {
//DBG_MSG("ADC = %d,",uiADCValue);
uiADCValue += (CHARGE_ADC_OFFSET + TempCompentationADC);
DBG_MSG("Charge ADC+= %d\r\n", CHARGE_ADC_OFFSET + TempCompentationADC);
} else {
if (gDevPower.pfCallback) {
gDevPower.pfCallback(DRVPWR_CB_IS_LENS_MOVING, 0, 0);
DBG_MSG("ADC = %d,", uiADCValue);
uiADCValue += (LENS_ADC_OFFSET + TempCompentationADC);
DBG_MSG("lens2 ADC+= %d\r\n", LENS_ADC_OFFSET + TempCompentationADC);
}
}
#else
if (gDevPowerBATT.pfCallback) {
gDevPowerBATT.pfCallback(DRVPWR_CB_IS_LENS_MOVING, 0, 0);
DBG_MSG("ADC = %d,", uiADCValue);
uiADCValue += (LENS_ADC_OFFSET + TempCompentationADC);
DBG_MSG("lens2 ADC+= %d\r\n", LENS_ADC_OFFSET + TempCompentationADC);
}
#endif
uiADCValue += (iBattAdcCalOffset / 2);
return 782;//uiADCValue;
}
}
//#NT#2009/09/02#Lincy Lin -begin
//#Add function for check battery overheat
/**
Get battery
Get battery Temperature ADC value
@param void
@return UINT32 ADC value
*/
static BOOL DrvPower_IsBattOverHeat(void)
{
return FALSE;
}
//#NT#2009/09/02#Lincy Lin -end
/**
Get battery voltage level
Get battery voltage level.
If battery voltage level is DRVPWR_BATTERY_LVL_EMPTY, it means
that you have to power off the system.
@param void
@return UINT32 Battery Level, refer to VoltageDet.h -> VOLDET_BATTERY_LVL_XXXX
*/
static UINT32 DrvPower_GetBatteryLevel(void)
{
static UINT32 uiPreBatteryLvl = DRVPWR_BATTERY_LVL_UNKNOWN;
//static UINT32 uiPreBatteryADC = 0;
static UINT32 uiRetBatteryLvl;
static UINT32 uiEmptycount = 0;
static UINT32 uiCount = 0;
UINT32 uiCurBatteryADC, uiCurBatteryLvl, i;
BOOL isMatch = FALSE;
uiCurBatteryLvl = 0;
if (uiPreBatteryLvl == DRVPWR_BATTERY_LVL_UNKNOWN) {
uiCurBatteryADC = DrvPower_GetBatteryADC();
//uiPreBatteryADC = DrvPower_GetBatteryADC() - 1;
for (i = 0; i < BATT_SLIDE_WINDOW_COUNT; i++) {
uiBattADCSlideWin[i] = uiCurBatteryADC;
DBG_MSG("AVG=%d\r\n", uiCurBatteryADC);
}
} else {
uiCurSlideWinCnt = BATT_SLIDE_WINDOW_COUNT;
uiBattADCSlideWin[uiBattSlideIdx++] = DrvPower_GetBatteryADC();
if (uiBattSlideIdx >= uiCurSlideWinCnt) {
uiBattSlideIdx = 0;
}
uiCurBatteryADC = 0;
for (i = 0; i < uiCurSlideWinCnt; i++) {
uiCurBatteryADC += uiBattADCSlideWin[i];
DBG_MSG("A[%d]=%d,", i, uiBattADCSlideWin[i]);
}
uiCurBatteryADC /= uiCurSlideWinCnt;
DBG_MSG("AVG=%d", uiCurBatteryADC);
DBG_MSG(", V=%d", uiCurBatteryADC * 42 / 9100);
DBG_MSG(".%02d\r\n", (uiCurBatteryADC * 42 / 91) % 100);
}
//DBG_IND("%d,%d,%d\r\n",VOLDET_BATTERY_ADC_LVL0,VOLDET_BATTERY_ADC_LVL1,VOLDET_BATTERY_ADC_LVL2);
for (i = BATT_LEVEL_COUNT; i > 0; i--) {
if (uiCurBatteryADC > pBattAdcLevelValue[i - 1]) {
uiCurBatteryLvl = i;
isMatch = TRUE;
break;
}
}
if (isMatch != TRUE) {
uiCurBatteryLvl = 0;
}
// Debounce
if ((uiCurBatteryLvl == uiPreBatteryLvl) ||
(uiPreBatteryLvl == DRVPWR_BATTERY_LVL_UNKNOWN)) {
uiRetBatteryLvl = uiCurBatteryLvl;
}
uiPreBatteryLvl = uiCurBatteryLvl;
//uiPreBatteryADC = uiCurBatteryADC;
if (uiCount % 2 == 0) {
uiRetBatteryLvl = uiPreBatteryLvl;
}
uiCount++;
//
if (uiEmptycount || uiRetBatteryLvl == DRVPWR_BATTERY_LVL_0) {
uiEmptycount++;
if (uiEmptycount == 4) {
return DRVPWR_BATTERY_LVL_EMPTY;
}
}
return DRVPWR_BATTERY_LVL_4;//uiRetBatteryLvl;
}
static void DrvPower_PowerOnInit(void)
{
pBattAdcLevelValue = &LiBattAdcLevelValue[0];
#if USB_CHARGE_FUNCTION
gTempValue = DrvPower_BattTempGet();
#endif
}
UINT32 DrvPower_DummyLoad(void)
{
#if DUMMY_LOAD
UINT32 Ave_V, deltaV, V1, V2;
DrvPower_dummy_process(&V1, &V2, FALSE);
deltaV = V2 - V1;
Ave_V = V1;
dummyLoadData[0].deltaV = deltaV;
dummyLoadData[0].Ave_V = Ave_V;
if (dummyLoadData[0].Ave_V < (LiBattAdcLevelValue[0] + DUMMY_LOAD_OFFSETV)) {
bDummyLoadPwrOff = TRUE;
} else {
bDummyLoadPwrOff = FALSE;
}
DBG_IND("Ave_V=%d ; deltaV=%d , bDummyLoadPwrOff=%d\r\n", Ave_V, deltaV, bDummyLoadPwrOff);
return (!bDummyLoadPwrOff);
#else
return TRUE;
#endif
}
#if DUMMY_LOAD
static void DrvPower_dummy_process(UINT32 *V1, UINT32 *V2, BOOL bIris)
{
UINT32 i, Va;
UINT32 Vtotal, DetectLoop = 25;
float Vtmp1, Vtmp2, Vtmp3;
if (gDevPower.pfCallback) {
gpio_clearPin(GPIO_LENS_MD_RST); // Enable motor driver.GPIO_LENS_MD_RST
Delay_DelayMs(5);
gpio_setPin(GPIO_LENS_MD_RST); // Enable motor driver.GPIO_LENS_MD_RST
gDevPower.pfCallback(DRVPWR_CB_DUMMY_LOAD_START, 0, 0);
}
Delay_DelayMs(40);
Vtotal = 0;
for (i = 0; i < DetectLoop ; i++) { //sample 25 times.
Va = DrvPower_GetBatteryADC(); //sample average value.(In loading)
Delay_DelayUs(200);
Vtotal += Va;
}
*V1 = Vtotal / DetectLoop;
if (gDevPower.pfCallback) {
gDevPower.pfCallback(DRVPWR_CB_DUMMY_LOAD_END, 0, 0);
}
Delay_DelayMs(5);
Vtotal = 0;
for (i = 0; i < DetectLoop ; i++) { //sample 25 times.
Va = DrvPower_GetBatteryADC(); //sample average value.(after loading)
Delay_DelayUs(200);
Vtotal += Va;
}
*V2 = Vtotal / DetectLoop;
Vtmp1 = (float)(*V1) * 3.3 * 1.39 / 4096;
Vtmp2 = (float)(*V2) * 3.3 * 1.39 / 4096;
Vtmp3 = Vtmp2 - Vtmp1;
DBG_IND("delta=(%1.3f, %d) Ave_V:%1.3f V2:%1.3f, %d, %d, Cal = %d \r\n", Vtmp3, (*V2) - (*V1), Vtmp1, Vtmp2, *V1, *V2, iBattAdcCalOffset);
}
#endif
static void DrvPower_BattADC_Calibration(BOOL enable)
{
}
#if USB_CHARGE_FUNCTION
static void DrvPower_EnableChargeIC(BOOL bCharge)
{
}
static void DrvPower_ChargeBattEn(BOOL bCharge)
{
}
static void DrvPower_ChargeCurrentSet(UINT32 Current)
{
u32BattChargeCurrent = Current;
}
static UINT32 DrvPower_ChargeCurrentGet(void)
{
return u32BattChargeCurrent;
}
static void DrvPower_ChargeISet(BOOL isHigh)
{
}
static BOOL DrvPower_ChargeIGet(void)
{
return 0;
}
static void DrvPower_ChargeVSet(BOOL isHigh)
{
}
static BOOL DrvPower_ChargeVGet(void)
{
return 0;
}
static BOOL DrvPower_IsUnderCharge(void)
{
return 0;
}
static BOOL DrvPower_IsUSBChargeOK(void)
{
return 0;
}
static BOOL DrvPower_IsBattIn(void)
{
return TRUE;
}
static BOOL DrvPower_IsDeadBatt(void)
{
return FALSE;
}
static BOOL DrvPower_IsNeedRecharge(void)
{
return FALSE;
}
static INT32 DrvPower_BattTempGet(void)
{
return 25;
}
#endif
static INT32 DrvPower_GetTempCompentation(INT32 tempValue)
{
return 0;
}
static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value)
{
DBG_IND("DrvPwrCtrl(%d), value(%d)\r\n", DrvPwrCtrl, value);
switch (DrvPwrCtrl) {
case DRVPWR_CTRL_BATTERY_CALIBRATION_EN:
DrvPower_BattADC_Calibration((BOOL)value);
break;
case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET:
iBattAdcCalOffset = (INT32)value;
break;
#if USB_CHARGE_FUNCTION
case DRVPWR_CTRL_BATTERY_CHARGE_EN:
DrvPower_ChargeBattEn((BOOL)value);
break;
case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT:
DrvPower_ChargeCurrentSet(value);
break;
case DRVPWR_CTRL_BATTERY_CHARGE_ISET:
DrvPower_ChargeISet((BOOL)value);
break;
case DRVPWR_CTRL_BATTERY_CHARGE_VSET:
DrvPower_ChargeVSet((BOOL)value);
break;
case DRVPWR_CTRL_ENABLE_CHARGEIC:
DrvPower_EnableChargeIC((BOOL)value);
break;
#endif
#if defined(_MCU_ENABLE_)
case DRVPWR_CTRL_PIR_EN:
if(value!=0) {
gpio_setPin(PIR_POWER_ON);
Delay_DelayMs(100);
gpio_clearPin(PIR_POWER_ON);
MCUCtrl_SendCmd(UART_CMD_PIR_SWITCH,UART_PAR_ON,0,0);
} else {
gpio_setPin(PIR_POWER_OFF);
Delay_DelayMs(100);
gpio_clearPin(PIR_POWER_OFF);
MCUCtrl_SendCmd(UART_CMD_PIR_SWITCH,UART_PAR_OFF,0,0);
}
break;
#endif
case DRVPWR_CTRL_PSW1:
hwpower_set_power_key(POWER_ID_PSW1, value);
break;
case DRVPWR_CTRL_HWRT:
hwpower_set_power_key(POWER_ID_HWRT, value);
break;
case DRVPWR_CTRL_SWRT:
hwpower_set_power_key(POWER_ID_SWRT, value);
break;
default:
DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl);
break;
}
}
static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl)
{
UINT32 rvalue = 0;
switch (DrvPwrCtrl) {
case DRVPWR_CTRL_BATTERY_LEVEL:
rvalue = DrvPower_GetBatteryLevel();
break;
case DRVPWR_CTRL_BATTERY_ADC_VALUE:
rvalue = DrvPower_GetBatteryADC();
break;
case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET:
rvalue = iBattAdcCalOffset;
break;
case DRVPWR_CTRL_IS_DUMMUYLOAD_POWEROFF:
rvalue = bDummyLoadPwrOff;
break;
case DRVPWR_CTRL_IS_BATT_OVERHEAT:
rvalue = (UINT32)DrvPower_IsBattOverHeat();
break;
#if USB_CHARGE_FUNCTION
case DRVPWR_CTRL_IS_BATT_INSERT:
rvalue = (UINT32)DrvPower_IsBattIn();
break;
case DRVPWR_CTRL_IS_DEAD_BATT:
rvalue = (UINT32)DrvPower_IsDeadBatt();
break;
case DRVPWR_CTRL_IS_NEED_RECHARGE:
rvalue = (UINT32)DrvPower_IsNeedRecharge();
break;
case DRVPWR_CTRL_BATTERY_CHARGE_EN:
rvalue = (UINT32)DrvPower_IsUnderCharge();
break;
case DRVPWR_CTRL_BATTERY_CHARGE_OK:
rvalue = (UINT32)DrvPower_IsUSBChargeOK();
break;
case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT:
rvalue = DrvPower_ChargeCurrentGet();
break;
case DRVPWR_CTRL_BATTERY_CHARGE_ISET:
rvalue = (UINT32)DrvPower_ChargeIGet();
break;
case DRVPWR_CTRL_BATTERY_CHARGE_VSET:
rvalue = (UINT32)DrvPower_ChargeVGet();
break;
case DRVPWR_CTRL_BATTERY_TEMPERATURE:
#if USB_CHARGE_FUNCTION
rvalue = DrvPower_BattTempGet();
#endif
break;
#else
case DRVPWR_CTRL_BATTERY_CHARGE_EN:
rvalue = FALSE;
break;
#endif
case DRVPWR_CTRL_POWERON_SOURCE:
#if defined(_MCU_ENABLE_)
rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0);
#else
rvalue = hwpower_get_poweron_state(POWER_STATE_SRC);
#endif
break;
case DRVPWR_CTRL_POWER_LOST:
#if defined(_MCU_ENABLE_)
rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0);
#else
rvalue = hwpower_get_poweron_state(POWER_STATE_FIRST);
#endif
break;
case DRVPWR_CTRL_PSW1:
rvalue = hwpower_get_power_key(POWER_ID_PSW1);
break;
case DRVPWR_CTRL_HWRT:
rvalue = hwpower_get_power_key(POWER_ID_HWRT);
break;
case DRVPWR_CTRL_SWRT:
rvalue = hwpower_get_power_key(POWER_ID_SWRT);
break;
default:
DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl);
break;
}
return rvalue;
}
/*
void DrvPower_RegCB(DX_CALLBACK_PTR fpDxPowerCB)
{
g_fpDxPowerCB = fpDxPowerCB;
}
*/
///////////DX object
static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1)
{
return DX_OK;
}
static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1)
{
return DX_OK;
}
static UINT32 DrvPowerInit(void *pInitParam)
{
DBG_IND("Init\r\n");
DrvPower_PowerOnInit();
return DX_OK;
}
static UINT32 DrvPowerOpen(void)
{
DBG_IND("open\r\n");
hwclock_open(HWCLOCK_MODE_RTC);
return DX_OK;
}
static UINT32 DrvPowerClose(void)
{
DBG_IND("close\r\n");
hwclock_close();
return DX_OK;
}
static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value)
{
if (StateID & DXGET) {
StateID &= ~DXGET;
return DrvPower_GetControl(StateID);
} else if (StateID & DXSET) {
StateID &= ~DXSET;
DrvPower_SetControl(StateID, Value);
}
return DX_OK;
}
static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2)
{
switch(CtrlID) {
case DRVPWR_CTRL_CURRENT_TIME:
if (Param1 == 0)
hwclock_set_time(TIME_ID_CURRENT, *(struct tm*)Param2, 0);
if (Param1 == 1)
*((struct tm*)Param2) = hwclock_get_time(TIME_ID_CURRENT);
break;
case DRVPWR_CTRL_HWRT_TIME:
if (Param1 == 0)
hwclock_set_time(TIME_ID_HWRT, *(struct tm*)Param2, 0);
if (Param1 == 1)
*((struct tm*)Param2) = hwclock_get_time(TIME_ID_HWRT);
break;
case DRVPWR_CTRL_SWRT_TIME:
if (Param1 == 0)
hwclock_set_time(TIME_ID_SWRT, *(struct tm*)Param2, 0);
if (Param1 == 1)
*((struct tm*)Param2) = hwclock_get_time(TIME_ID_SWRT);
break;
}
return DX_OK;
}
static UINT32 DrvPowerCommand(CHAR *pcCmdStr) //General Command Console
{
switch (*pcCmdStr) {
case 'd':
/*if (!strncmp(pcCmdStr, "Nand dump", 9))
{
return TRUE;
}*/
break;
}
return FALSE;
}
/*
static void DrvPowerCallback(UINT32 EventID, UINT32 Param1, UINT32 Param2){
if(g_fpDxPowerCB){
g_fpDxPowerCB(EventID,Param1,Param2);
}
}
*/
#endif

View File

@ -0,0 +1,268 @@
#include "DxCfg.h"
#include "IOCfg.h"
#include "DxPower.h"
#include "DxCommon.h"
//#include "DxApi.h"
#include "Dx.h"
#include <time.h>
#include <comm/hwclock.h>
#include <comm/hwpower.h>
#define THIS_DBGLVL 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxPwr
#define __DBGLVL__ THIS_DBGLVL
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
#if defined(_POWER_DC_)
static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1);
static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1);
static UINT32 DrvPowerInit(void *pInitParam);
static UINT32 DrvPowerOpen(void);
static UINT32 DrvPowerClose(void);
static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value);
static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2);
static UINT32 DrvPowerCommand(CHAR *pcCmdStr);
static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl);
static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value);
DX_OBJECT gDevPowerDC = {
DXFLAG_SIGN,
DX_CLASS_POWER_EXT,
POWER_VER,
"PowerDC",
0, 0, 0, 0,
DrvPowerGetcaps,
DrvPowercfgs,
DrvPowerInit,
DrvPowerOpen,
DrvPowerClose,
DrvPowerState,
DrvPowerControl,
DrvPowerCommand,
0,
};
UINT32 DrvPower_DummyLoad(void)
{
return TRUE;
}
static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value)
{
DBG_IND("DrvPwrCtrl(%d), value(%d)\r\n", DrvPwrCtrl, value);
switch (DrvPwrCtrl) {
case DRVPWR_CTRL_BATTERY_CALIBRATION_EN:
break;
case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET:
break;
#if USB_CHARGE_FUNCTION
case DRVPWR_CTRL_BATTERY_CHARGE_EN:
break;
case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT:
break;
case DRVPWR_CTRL_BATTERY_CHARGE_ISET:
break;
case DRVPWR_CTRL_BATTERY_CHARGE_VSET:
break;
case DRVPWR_CTRL_ENABLE_CHARGEIC:
break;
#endif
case DRVPWR_CTRL_PSW1:
// hwpower_set_power_key(POWER_ID_PSW1, value);
break;
case DRVPWR_CTRL_HWRT:
// hwpower_set_power_key(POWER_ID_HWRT, value);
break;
case DRVPWR_CTRL_SWRT:
// hwpower_set_power_key(POWER_ID_SWRT, value);
break;
default:
DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl);
break;
}
}
static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl)
{
UINT32 rvalue = 0;
switch (DrvPwrCtrl) {
case DRVPWR_CTRL_BATTERY_LEVEL:
break;
case DRVPWR_CTRL_BATTERY_ADC_VALUE:
break;
case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET:
break;
case DRVPWR_CTRL_IS_DUMMUYLOAD_POWEROFF:
break;
case DRVPWR_CTRL_IS_BATT_OVERHEAT:
break;
#if USB_CHARGE_FUNCTION
case DRVPWR_CTRL_IS_BATT_INSERT:
break;
case DRVPWR_CTRL_IS_DEAD_BATT:
break;
case DRVPWR_CTRL_IS_NEED_RECHARGE:
break;
case DRVPWR_CTRL_BATTERY_CHARGE_EN:
break;
case DRVPWR_CTRL_BATTERY_CHARGE_OK:
break;
case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT:
break;
case DRVPWR_CTRL_BATTERY_CHARGE_ISET:
break;
case DRVPWR_CTRL_BATTERY_CHARGE_VSET:
break;
case DRVPWR_CTRL_BATTERY_TEMPERATURE:
break;
#else
case DRVPWR_CTRL_BATTERY_CHARGE_EN:
rvalue = FALSE;
break;
#endif
case DRVPWR_CTRL_POWERON_SOURCE:
#if defined(_MCU_ENABLE_)
rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0);
#else
// rvalue = hwpower_get_poweron_state(POWER_STATE_SRC);
#endif
break;
case DRVPWR_CTRL_POWER_LOST:
#if defined(_MCU_ENABLE_)
rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0);
#else
// rvalue = hwpower_get_poweron_state(POWER_STATE_FIRST);
#endif
break;
case DRVPWR_CTRL_PSW1:
// rvalue = hwpower_get_power_key(POWER_ID_PSW1);
break;
case DRVPWR_CTRL_HWRT:
// rvalue = hwpower_get_power_key(POWER_ID_HWRT);
break;
case DRVPWR_CTRL_SWRT:
// rvalue = hwpower_get_power_key(POWER_ID_SWRT);
break;
default:
DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl);
break;
}
return rvalue;
}
/*
void DrvPower_RegCB(DX_CALLBACK_PTR fpDxPowerCB)
{
g_fpDxPowerCB = fpDxPowerCB;
}
*/
///////////DX object
static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1)
{
UINT32 v = 0;
switch (CapID & 0x0000ffff) {
case POWER_CAPS_BASE:
v = POWER_BF_DRTC;
break;
default:
break;
}
return v;
}
static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1)
{
return DX_OK;
}
static UINT32 DrvPowerInit(void *pInitParam)
{
DBG_IND("Init\r\n");
return DX_OK;
}
static UINT32 DrvPowerOpen(void)
{
DBG_IND("open\r\n");
hwclock_open(HWCLOCK_MODE_RTC);
return DX_OK;
}
static UINT32 DrvPowerClose(void)
{
DBG_IND("close\r\n");
hwclock_close();
return DX_OK;
}
static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value)
{
if (StateID & DXGET) {
StateID &= ~DXGET;
return DrvPower_GetControl(StateID);
} else if (StateID & DXSET) {
StateID &= ~DXSET;
DrvPower_SetControl(StateID, Value);
}
return DX_OK;
}
static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2)
{
switch(CtrlID) {
case DRVPWR_CTRL_CURRENT_TIME:
if (Param1 == 0) {
hwclock_set_time(TIME_ID_CURRENT, *(struct tm*)Param2, 0);
}
if (Param1 == 1) {
*((struct tm*)Param2) = hwclock_get_time(TIME_ID_CURRENT);
}
break;
case DRVPWR_CTRL_HWRT_TIME:
if (Param1 == 0) {
hwclock_set_time(TIME_ID_HWRT, *(struct tm*)Param2, 0);
}
if (Param1 == 1) {
*((struct tm*)Param2) = hwclock_get_time(TIME_ID_HWRT);
}
break;
case DRVPWR_CTRL_SWRT_TIME:
if (Param1 == 0) {
hwclock_set_time(TIME_ID_SWRT, *(struct tm*)Param2, 0);
}
if (Param1 == 1) {
*((struct tm*)Param2) = hwclock_get_time(TIME_ID_SWRT);
}
break;
}
return DX_OK;
}
static UINT32 DrvPowerCommand(CHAR *pcCmdStr) //General Command Console
{
switch (*pcCmdStr) {
case 'd':
/*if (!strncmp(pcCmdStr, "Nand dump", 9))
{
return TRUE;
}*/
break;
}
return FALSE;
}
/*
static void DrvPowerCallback(UINT32 EventID, UINT32 Param1, UINT32 Param2){
if(g_fpDxPowerCB){
g_fpDxPowerCB(EventID,Param1,Param2);
}
}
*/
#endif

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@ -0,0 +1,442 @@
/**
Copyright Novatek Microelectronics Corp. 2005. All rights reserved.
@file KeyScanSD.c
@ingroup mIPRJAPKeyIO
@brief Detect SD card status
Detect SD card insert/remove, lock/unlock
@note Nothing.
@date 2005/12/15
*/
/** \addtogroup mIPRJAPKeyIO */
//@{
#include "kwrap/type.h"
#include "DxCfg.h"
#include "IOCfg.h"
#include "DxStorage.h"
#include "DxCommon.h"
#include "DxApi.h"
#include "sdio.h"
#if 0
#include "SdmmcDesc.h"
#include "StrgDef.h"
#include "Debug.h"
#endif
#include "Utility/SwTimer.h"
//#include "pll.h"
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxDrv
#define __DBGLVL__ 1 // 0=OFF, 1=ERROR, 2=TRACE
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
///////////////////////////////////////////////////////////////////////////////
void DrvCARD_EnableCardPower(BOOL bEn);
BOOL DrvCARD_DetStrgCard(void);
BOOL DrvCARD_DetStrgCard_TRUE(void);//for eMMC
BOOL DrvCARD_DetStrgCardWP(void);
BOOL DrvCARD_DetStrgCardWP_FALSE(void);//for eMMC
//public func
UINT32 DrvCARDGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvCARDGetcaps3(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvCARDInit(void *pInitParam); // Set Init Parameters
UINT32 DrvCARDInit3(void *pInitParam); // Set Init Parameters
UINT32 DrvCARDOpen(void); // Common Constructor
UINT32 DrvCARDClose(void); // Common Destructor
UINT32 DrvCARDState(UINT32 StateID, UINT32 Value); // General Properties
UINT32 DrvCARDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods
UINT32 DrvCARDCommand(CHAR *pcCmdStr); //General Command Console
#if !defined(_CARD1_NONE_)
//dx object
DX_OBJECT gDevCARD1 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_CARD1,
STORAGE_VER,
"Storage_Card1",
0, 0, 0, 0,
DrvCARDGetcaps,
0,
DrvCARDInit,
DrvCARDOpen,
DrvCARDClose,
DrvCARDState,
DrvCARDControl,
DrvCARDCommand,
0,
};
#endif
#if !defined(_CARD3_NONE_)
//for eMMC test on FPGA
DX_OBJECT gDevCARD3 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_CARD3,
STORAGE_VER,
"Storage_Card3",
0, 0, 0, 0,
DrvCARDGetcaps3,
0,
DrvCARDInit3,
DrvCARDOpen,
DrvCARDClose,
DrvCARDState,
DrvCARDControl,
DrvCARDCommand,
0,
};
#endif
#if !defined(_CARD1_NONE_)
UINT32 DrvCARDGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version)
{
UINT32 v = 0;
switch (CapID) {
case STORAGE_CAPS_BASE:
DBG_IND("get card plug caps\r\n");
v = STORAGE_BF_DETPLUG | STORAGE_BF_DETWP;
break;
case STORAGE_CAPS_HANDLE:
v = (UINT32)sdio_getStorageObject(STRG_OBJ_FAT1);
break;
default:
break;
}
return v;
}
#endif
#if !defined(_CARD3_NONE_)
UINT32 DrvCARDGetcaps3(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version)
{
UINT32 v = 0;
switch (CapID) {
case STORAGE_CAPS_BASE:
DBG_IND("get card plug caps\r\n");
v = STORAGE_BF_DETPLUG | STORAGE_BF_DETWP;
break;
case STORAGE_CAPS_HANDLE:
CHKPNT;
#if defined(__FREERTOS)
v = (UINT32)sdio3_getStorageObject(STRG_OBJ_FAT1);
#endif
break;
default:
break;
}
return v;
}
#endif
#if !defined(_CARD1_NONE_)
UINT32 DrvCARDInit(void *pInitParam) // Set Init Parameters
{
#if defined(__FREERTOS)
PSTORAGE_OBJ pStrg;
DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete
DBG_FUNC_BEGIN("\r\n");
pStrg = sdio_getStorageObject(STRG_OBJ_FAT1);
sdio_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCard);
sdio_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCardWP);
/*
// Enable High Speed mode
//sdio_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, (UINT32)(SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS|SDIO_BUS_SPEED_MODE_SDR12|SDIO_BUS_SPEED_MODE_SDR25|SDIO_BUS_SPEED_MODE_SDR50));
sdio_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, (UINT32)(SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS|SDIO_BUS_SPEED_MODE_SDR12|SDIO_BUS_SPEED_MODE_SDR25|SDIO_BUS_SPEED_MODE_DDR50));
*/
//#NT#2017/10/24#Nestor Yang -begin
//#NT# Adjust SDIO driving, requested by SA1
/*
// Enable setting driving sink of clock pin
sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, (UINT32)TRUE);
// Default speed driving -> 5.0 mA (Shirley, 2017/09/22)
sdio_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 150);
//sdio_setConfig(SDIO_CONFIG_ID_DS_MAX_CLK, 48000000); //default for DS
// High speed driving -> 10.0 mA (Shirley, 2017/09/22)
sdio_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 150);
*/
sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE); // for clock.
sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_CMDDATA_EN, TRUE); // for cmd and data.
// Default speed driving
sdio_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 200);
sdio_setConfig(SDIO_CONFIG_ID_DS_CMD_DRIVING, 150);
sdio_setConfig(SDIO_CONFIG_ID_DS_DATA_DRIVING, 150);
// High speed driving
sdio_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 200);
sdio_setConfig(SDIO_CONFIG_ID_HS_CMD_DRIVING, 150);
sdio_setConfig(SDIO_CONFIG_ID_HS_DATA_DRIVING, 150);
//#NT#2017/10/24#Nestor Yang -end
//sdio_setConfig(SDIO_CONFIG_ID_HS_MAX_CLK, 48000000); //default for HS
/*
// Set clock source
sdio_setConfig(SDIO_CONFIG_ID_SRCLK, PLL_CLKSEL_SDIO_48);
// Set maximum bus width to 8 bits
sdio_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_8_BITS);
*/
//sdio_setCallBack(SDIO_CALLBACK_POWER_CONTROL, (SDIO_CALLBACK_HDL)DrvCARD_EnableCardPower); //(to improve card capability)
//if(STRG_OBJ_FAT1)
{
pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size);
}
#endif
return DX_OK;
}
#endif
#if !defined(_CARD3_NONE_)
UINT32 DrvCARDInit3(void *pInitParam) // Set Init Parameters
{
#if defined(__FREERTOS)
PSTORAGE_OBJ pStrg;
DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete
DBG_FUNC_BEGIN("\r\n");
CHKPNT;
pStrg = sdio3_getStorageObject(STRG_OBJ_FAT1);
if (pStrg == NULL) {
DBG_ERR("Get SDIO3 storage object failed\r\n");
return DX_NULL_POINTER;
}
pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size);
sdio3_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCard_TRUE);
sdio3_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCardWP_FALSE);
// Support default speed + high speed
sdio3_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS);
// Default speed driving -> 5.0 mA
sdio3_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 50);
// High speed driving -> 10.0 mA
sdio3_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 100);
// Adjust driving/sink according to operating mode
sdio3_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE);
sdio3_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_4_BITS);
sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_OEMID, (UINT32)"NOVATEK");
sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_VOL_LABLE, (UINT32)"SD_VOL");
sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_RAND_VOL_ID_EN, TRUE);
#endif
return DX_OK;
}
#endif
#if !(defined(_CARD1_NONE_) && defined(_CARD3_NONE_))
UINT32 DrvCARDOpen(void) // Common Constructor
{
DrvCARD_EnableCardPower(TRUE);
return DX_OK;
}
UINT32 DrvCARDClose(void) // Common Destructor
{
DrvCARD_EnableCardPower(FALSE);
return DX_OK;
}
UINT32 DrvCARDState(UINT32 StateID, UINT32 Value) // General Properties
{
DBG_FUNC_BEGIN("\r\n");
if (StateID & DXGET) {
UINT32 rvalue = 0;
StateID &= ~DXGET;
DBG_IND("get %08x\r\n", StateID);
switch (StateID) {
case STORAGE_STATE_INSERT:
rvalue = DrvCARD_DetStrgCard();
break;
case STORAGE_STATE_LOCK: {
BOOL bLock = FALSE;
if (DrvCARD_DetStrgCard()) {
bLock = DrvCARD_DetStrgCardWP();
}
rvalue = bLock;
}
break;
break;
default:
DBG_ERR("state=0x%02X not support!\r\n", StateID);
break;
}
return rvalue;
} else if (StateID & DXSET) {
StateID &= ~DXSET;
DBG_IND("set %08x\r\n", StateID);
switch (StateID) {
default:
DBG_ERR("state=0x%02X not support!\r\n", StateID);
break;
}
}
return DX_OK;
}
UINT32 DrvCARDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods
{
DBG_FUNC_BEGIN("\r\n");
DBG_IND("ctrl %08x\r\n", CtrlID);
switch (CtrlID) {
case STORAGE_CTRL_POWER:
DrvCARD_EnableCardPower(Param1);
break;
default:
DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID);
break;
}
return DX_OK;
}
UINT32 DrvCARDCommand(CHAR *pcCmdStr) //General Command Console
{
return FALSE;
}
////////////////////////////////////////////////////////////////////////////////
// GPIO related
#define KEYSCAN_CD_GPIO_INT GPIO_INT_00
#define KEYSCAN_CARDDET_INT DISABLE
#define KEYSCAN_SDWRPTDET_GPIO DISABLE
void DrvCARD_EnableCardPower(BOOL bEn)
{
gpio_setDir(GPIO_CARD_POWER, GPIO_DIR_OUTPUT);
if (bEn) {
DBG_IND("[SD] - card power enable\r\n");
gpio_clearPin(GPIO_CARD_POWER);
SwTimer_DelayMs(20);
} else {
DBG_IND("[SD] - card power disable\r\n");
gpio_setPin(GPIO_CARD_POWER);
SwTimer_DelayMs(350);
}
}
#if (KEYSCAN_CARDDET_INT == ENABLE)
static volatile UINT32 uiStrgCardIntCnt = 0;
/**
ISR of SD card detection
ISR of SD card detection
@param void
@return void
*/
static void KeyScan_DetStrgCardIsr(UINT32 uiEvent)
{
uiStrgCardIntCnt++;
// Debounce
if (uiStrgCardIntCnt > 1) {
uiStrgCardIntCnt = 0;
}
}
#endif
void DrvCARD_SetInsert(UINT32 status)
{
#if (KEYSCAN_CARDDET_INT == ENABLE)
if (status) {
gpio_setIntTypePol(KEYSCAN_CD_GPIO_INT, GPIO_INTTYPE_LEVEL, GPIO_INTPOL_POSHIGH);
} else {
gpio_setIntTypePol(KEYSCAN_CD_GPIO_INT, GPIO_INTTYPE_LEVEL, GPIO_INTPOL_NEGLOW);
}
#endif
}
void DrvCARD_DetRestart(void)
{
#if (KEYSCAN_CARDDET_INT == ENABLE)
gpio_setIntIsr(KEYSCAN_CD_GPIO_INT, KeyScan_DetStrgCardIsr);
gpio_enableInt(KEYSCAN_CD_GPIO_INT);
#endif
}
/**
Detect Storage card is inserted or not
Detect Storage card is inserted or not.
Return TRUE if storage card is inserted, FALSE if storage card is removed.
@param void
@return BOOL: TRUE -> Storage card inserted, FALSE -> Storage card removed
*/
BOOL DrvCARD_DetStrgCard(void)
{
#if 1
return (gpio_getPin(GPIO_CARD_DETECT) == 0 ? TRUE : FALSE);
#else
return TRUE;
#endif
}
/**
Detect Storage card is write protected or not
Detect Storage card is write protected or not.
Return TRUE if storage card is write protected, FALSE if storage card is not write protected.
@param void
@return BOOL: TRUE -> Storage card is write protected, FALSE -> Storage card is not write protected
*/
BOOL DrvCARD_DetStrgCardWP(void)
{
#if 0
return (gpio_getPin(GPIO_CARD_WP) == 1 ? TRUE : FALSE);
#else
return FALSE;
#endif
}
/**
Always return card inserted (TRUE) for eMMC
@param void
@return BOOL: TRUE -> Storage card inserted, FALSE -> Storage card removed
*/
BOOL DrvCARD_DetStrgCard_TRUE(void)
{
return TRUE;
}
/**
Always return no write protected (FALSE) for eMMC
@param void
@return BOOL: TRUE -> Storage card is write protected, FALSE -> Storage card is not write protected
*/
BOOL DrvCARD_DetStrgCardWP_FALSE(void)
{
return FALSE;
}
#endif
//@}

View File

@ -0,0 +1,574 @@
#include "kwrap/type.h"
#include "DxCfg.h"
#include "IOCfg.h"
#include "DxStorage.h"
#include "DxCommon.h"
#include "DxApi.h"
#include "DrvExt.h"
#if 0
#include "Debug.h"
#endif
#include "sdio.h"
//#include "pad.h"
#if 0
#include "StrgDef.h"
#endif
#include <string.h>
#include "emb_partition_info.h"
#if (!defined(_EMBMEM_NONE_)) && (!defined(_EMBMEM_UITRON_OFF_))
#if defined(_EMBMEM_NONE_)
#define EMB_GETSTRGOBJ(x) 0 //Always NULL
#elif defined(_EMBMEM_NAND_) || defined(_EMBMEM_SPI_NAND_)
#include "nand.h"
#define EMB_GETSTRGOBJ(x) nand_getStorageObject(x)
#elif defined(_EMBMEM_SPI_NOR_)
#include "nand.h"
//#include "RamDisk/RamDisk.h"
#define EMB_GETSTRGOBJ(x) 0//spiflash_getStorageObject(x)
#elif defined(_EMBMEM_EMMC_)
#include "sdio.h"
#define EMB_GETSTRGOBJ(x) sdio3_getStorageObject(x)
static BOOL xSdioDet(void)
{
return TRUE;
}
static BOOL xSdioWp(void)
{
return FALSE;
};
#endif
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxDrv
#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
///////////////////////////////////////////////////////////////////////////////
//public func
UINT32 DrvEmbMemGetcaps0(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemGetcaps1(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemGetcaps2(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemGetcaps3(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemGetcaps4(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemGetcaps5(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemGetcaps6(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemGetcaps7(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemGetcaps8(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DrvEmbMemInit(void *pInitParam); // Set Init Parameters
UINT32 DrvEmbMemOpen(void); // Common Constructor
UINT32 DrvEmbMemClose(void); // Common Destructor
UINT32 DrvEmbMemState(UINT32 StateID, UINT32 Value); // General Properties
UINT32 DrvEmbMemControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods
UINT32 DrvEmbMemCommand(CHAR *pcCmdStr); //General Command Console
//User define SPI-NOR table sample code
#if 0
static SPI_FLASH_INFO user_define_spi_flash_support_tbl[] = {
// XTX PN25F32B (4MB)
{
//1st ID : id[0] 2nd ID : id[1] 3rd ID : id[2]
//manufacture ID memory type memory capacity
0x0B, 0x40, 0x16,
//total size (unit: byte) sector size (unit: byte) block size (unit: byte)
0x400000, 0x10000, 0x10000,
//sectr count (unit: sector) support EWSR command support AAI command support SECTOR_ERASE command (0x20)
0x800000 / 0x10000, FALSE, FALSE, TRUE,
//CHIP erase time (unit: ms) Block erase time (unit: ms) Sector erase time (unit: ms) page program time (unit: ms)
200000, 4000, 1600, 5,
//Wide bus (dual/quad) supported by this flash
SPI_FLASH_BUSWIDTH_DUAL | SPI_FLASH_BUSWIDTH_QUAD_TYPE5
},
// XTX PN25F64B (8MB)
{
//1st ID : id[0] 2nd ID : id[1] 3rd ID : id[2]
//manufacture ID memory type memory capacity
0x0B, 0x40, 0x17,
//total size (unit: byte) sector size (unit: byte) block size (unit: byte)
0x800000, 0x10000, 0x10000,
//sectr count (unit: sector) support EWSR command support AAI command support SECTOR_ERASE command (0x20)
0x800000 / 0x10000, FALSE, FALSE, TRUE,
//CHIP erase time (unit: ms) Block erase time (unit: ms) Sector erase time (unit: ms) page program time (unit: ms)
200000, 4000, 1600, 5,
SPI_FLASH_BUSWIDTH_DUAL | SPI_FLASH_BUSWIDTH_QUAD_TYPE5
},
};
static BOOL pmc_identifySpi(UINT32 uiMfgID, UINT32 uiTypeID, UINT32 uiCapacity, PSPIFLASH_IDENTIFY pIdentify)
{
UINT32 uiNorTblID;
BOOL user_table_found = FALSE;
for (uiNorTblID = 0; uiNorTblID < (sizeof(user_define_spi_flash_support_tbl) / sizeof(SPI_FLASH_INFO)); uiNorTblID++) {
if (uiMfgID == user_define_spi_flash_support_tbl[uiNorTblID].uiMfgID && \
uiTypeID == user_define_spi_flash_support_tbl[uiNorTblID].uiMemType && \
uiCapacity == user_define_spi_flash_support_tbl[uiNorTblID].uiMemCapacity) {
DBG_DUMP("emu user define spi-nor tbl Maker ID found @[%02d][0x%02x] DeviceID[0x%02x] cap[0x%02x]\r\n", uiNorTblID, user_define_spi_flash_support_tbl[uiNorTblID].uiMfgID, user_define_spi_flash_support_tbl[uiNorTblID].uiMemType, user_define_spi_flash_support_tbl[uiNorTblID].uiMemCapacity);
// For SPI Nor flash only
pIdentify->uiTotalSize = user_define_spi_flash_support_tbl[uiNorTblID].uiTotalSize;
pIdentify->uiBlockSize = user_define_spi_flash_support_tbl[uiNorTblID].uiBlockSize;
pIdentify->uiSectorSize = user_define_spi_flash_support_tbl[uiNorTblID].uiSectorSize;
pIdentify->uiSectorCnt = user_define_spi_flash_support_tbl[uiNorTblID].uiSectorCnt;
pIdentify->bSupportEWSR = user_define_spi_flash_support_tbl[uiNorTblID].bSupportEWSR;
pIdentify->bSupportAAI = user_define_spi_flash_support_tbl[uiNorTblID].bSupportAAI;
pIdentify->bSupportSecErase = user_define_spi_flash_support_tbl[uiNorTblID].bSupportSecErase;
pIdentify->uiChipEraseTime = user_define_spi_flash_support_tbl[uiNorTblID].uiChipEraseTime;
pIdentify->uiBlockEraseTime = user_define_spi_flash_support_tbl[uiNorTblID].uiBlockEraseTime;
pIdentify->uiSectorEraseTime= user_define_spi_flash_support_tbl[uiNorTblID].uiSectorEraseTime;
pIdentify->uiPageProgramTime= user_define_spi_flash_support_tbl[uiNorTblID].uiPageProgramTime;
pIdentify->flashWidth = user_define_spi_flash_support_tbl[uiNorTblID].flashWidth;
user_table_found = TRUE;
break;
}
}
return user_table_found;
}
#endif
//dx object
DX_OBJECT gDevEmbMem0 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM0,
STORAGE_VER,
"LOADER",
0, 0, 0, 0,
DrvEmbMemGetcaps0,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
DX_OBJECT gDevEmbMem1 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM1,
STORAGE_VER,
"MODELEXT",
0, 0, 0, 0,
DrvEmbMemGetcaps1,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
DX_OBJECT gDevEmbMem2 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM2,
STORAGE_VER,
"UITRON",
0, 0, 0, 0,
DrvEmbMemGetcaps2,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
DX_OBJECT gDevEmbMem3 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM3,
STORAGE_VER,
"UBOOT",
0, 0, 0, 0,
DrvEmbMemGetcaps3,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
DX_OBJECT gDevEmbMem4 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM4,
STORAGE_VER,
"LINUX",
0, 0, 0, 0,
DrvEmbMemGetcaps4,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
DX_OBJECT gDevEmbMem5 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM5,
STORAGE_VER,
"DSP1",
0, 0, 0, 0,
DrvEmbMemGetcaps5,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
DX_OBJECT gDevEmbMem6 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM6,
STORAGE_VER,
"DSP2",
0, 0, 0, 0,
DrvEmbMemGetcaps6,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
DX_OBJECT gDevEmbMem7 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM7,
STORAGE_VER,
"PSTORE",
0, 0, 0, 0,
DrvEmbMemGetcaps7,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
DX_OBJECT gDevEmbMem8 = {
DXFLAG_SIGN,
DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM8,
STORAGE_VER,
"FAT",
0, 0, 0, 0,
DrvEmbMemGetcaps8,
0,
DrvEmbMemInit,
DrvEmbMemOpen,
DrvEmbMemClose,
DrvEmbMemState,
DrvEmbMemControl,
DrvEmbMemCommand,
0,
};
#if defined(__FREERTOS)
#if !defined(_EMBMEM_EMMC_)
static UINT32 xDrvEmbMemGetUsedSize(EMB_PARTITION *pPat, UINT32 nPat)
{
UINT32 i;
UINT32 uiOffset = 0;
for (i = 0; i < nPat; i++) {
if (pPat->EmbType != EMBTYPE_UNKNOWN) {
if ((pPat->PartitionOffset != 0) && (pPat->PartitionOffset < uiOffset)) {
DBG_ERR("Partition[%d] overlaps previous one.\r\n", i);
return 0;
}
if ((i==0) || (i!=0 && pPat->PartitionOffset!=0))
uiOffset = pPat->PartitionOffset + pPat->PartitionSize;
}
pPat++;
}
return uiOffset;
}
#endif
#endif
static UINT32 xDrvEmbMemGetcaps(UINT32 DxType, UINT32 CapID, UINT32 Param1)
{
UINT32 v = 0;
if (CapID == STORAGE_CAPS_HANDLE) {
const UINT32 Map[] = {
STRG_OBJ_FW_RSV1,
STRG_OBJ_FW_RSV2,
STRG_OBJ_FW_RSV3,
STRG_OBJ_FW_RSV4,
STRG_OBJ_FW_RSV5,
STRG_OBJ_FW_RSV6,
STRG_OBJ_FW_RSV7,
STRG_OBJ_PSTORE1,
STRG_OBJ_FAT1
};
if (DxType >= sizeof(Map) / sizeof(Map[0])) {
DBG_ERR("out of id: %d\r\n", DxType);
return 0;
}
// v = (UINT32)EMB_GETSTRGOBJ(Map[DxType]);
//speical case handle
#if defined(__FREERTOS)
#if defined(_EMBMEM_SPI_NOR_)
if (DxType == DX_TYPE_EMBMEM8) { //FAT change to ramdisk
v = (UINT32)ramdsk_getStorageObject();
}
#endif
#endif
}
return v;
}
UINT32 DrvEmbMemGetcaps0(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM0, CapID, Param1);
}
UINT32 DrvEmbMemGetcaps1(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM1, CapID, Param1);
}
UINT32 DrvEmbMemGetcaps2(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM2, CapID, Param1);
}
UINT32 DrvEmbMemGetcaps3(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM3, CapID, Param1);
}
UINT32 DrvEmbMemGetcaps4(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM4, CapID, Param1);
}
UINT32 DrvEmbMemGetcaps5(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM5, CapID, Param1);
}
UINT32 DrvEmbMemGetcaps6(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM6, CapID, Param1);
}
UINT32 DrvEmbMemGetcaps7(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM7, CapID, Param1);
}
UINT32 DrvEmbMemGetcaps8(UINT32 CapID, UINT32 Param1)
{
return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM8, CapID, Param1);
}
UINT32 DrvEmbMemInit(void *pInitParam) // Set Init Parameters
{
DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete
if (!g_pInit) {
return DX_PARAM_ERROR;
}
DBG_FUNC_BEGIN("\r\n");
#if defined(__FREERTOS)
#if defined(_EMBMEM_EMMC_)
static BOOL bEmmcInitOnce = FALSE;
if (!bEmmcInitOnce) {
sdio3_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)xSdioDet);
sdio3_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)xSdioWp);
// Support default speed + high speed
sdio3_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS);
// Default speed driving -> 5.0 mA
sdio3_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 50);
// High speed driving -> 10.0 mA
sdio3_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 100);
// Adjust driving/sink according to operating mode
sdio3_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE);
sdio3_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_4_BITS);
sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_OEMID, (UINT32)"NOVATEK");
sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_VOL_LABLE, (UINT32)"SD_VOL");
sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_RAND_VOL_ID_EN, TRUE);
bEmmcInitOnce = TRUE;
}
#elif defined(_EMBMEM_SPI_NAND_)
static BOOL bSpiNandInitOnce = FALSE;
if (!bSpiNandInitOnce) {
nand_setConfig(NAND_CONFIG_ID_FREQ, 96000000);
nand_setConfig(NAND_CONFIG_ID_NAND_TYPE, NANDCTRL_SPI_NAND_TYPE);
bSpiNandInitOnce = TRUE;
}
#elif defined(_EMBMEM_SPI_NOR_)
static BOOL bSpiNandInitOnce = FALSE;
if (!bSpiNandInitOnce) {
nand_setConfig(NAND_CONFIG_ID_NAND_TYPE, NANDCTRL_SPI_NOR_TYPE);
bSpiNandInitOnce = TRUE;
}
#endif
#endif
{
DXSTRG_PARTITION *p = &(g_pInit->prt);
DX_HANDLE DxNandDev = Dx_GetObject(p->uiDxClassType);
STORAGE_OBJ *pStrg = (STORAGE_OBJ *)Dx_Getcaps(DxNandDev, STORAGE_CAPS_HANDLE, 0);
UINT32 blksize = 0;
if (!pStrg) {
DBG_ERR("DrvEmbMemInit: STORAGE_OBJ is null. uiDxClassType=%x\n", p->uiDxClassType);
return E_SYS;
}
pStrg->Lock();
if (p->uiDxClassType == (DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM0)) {
//User define SPI-NOR table sample code
#if 0
if(pStrg->ExtIOCtrl(STRG_EXT_CMD_SPI_IDENTIFY_CB, (UINT32)pmc_identifySpi, 0) == E_OK) {
DBG_IND("^GSet user define SPI-NOR table success\r\n");
} else {
DBG_ERR("^RSet user define SPI-NOR table fail\r\n");
}
#endif
pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size);
pStrg->SetParam(STRG_SET_PARTITION_SECTORS, p->uiPhyAddr, p->uiPhySize);
pStrg->GetParam(STRG_GET_BEST_ACCESS_SIZE, (UINT32)&blksize, 0); //get block size
if (p->uiPhyAddr != 0) {
DBG_ERR("loader area have to be at phyical address 0.\r\n");
return E_PAR;
}
if (blksize != _EMBMEM_BLK_SIZE_) {
DBG_FATAL("EMBMEM_BLK_SIZE in ModelConfig set wrong, must be 0x%0X vs 0x%0X. Set it right and rebuild ModelExt and Project\r\n", blksize, _EMBMEM_BLK_SIZE_);
return E_PAR;
}
MODELEXT_HEADER *header;
EMB_PARTITION *pEmbPat = (EMB_PARTITION *)Dx_GetModelExtCfg(MODELEXT_TYPE_EMB_PARTITION, &header);
if (!pEmbPat || !header) {
DBG_ERR("MODELEXT_TYPE_EMB_PARTITION is null\n");
return E_SYS;
}
#if defined(__FREERTOS)
#if !defined(_EMBMEM_EMMC_) //EMMC not support STRG_GET_DEVICE_PHY_SIZE
UINT32 PhySize;
UINT32 UsedSize = xDrvEmbMemGetUsedSize(pEmbPat, header->number);
pStrg->GetParam(STRG_GET_DEVICE_PHY_SIZE, (UINT32)&PhySize, 0);
if (UsedSize == 0) {
return E_PAR;
}
if (UsedSize > PhySize) {
DBG_ERR("UsedSize (%08X) > PhySize (%08X)\r\n", UsedSize, PhySize);
return E_PAR;
}
#endif
#endif
} else {
pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size);
pStrg->SetParam(STRG_SET_PARTITION_RSV_SECTORS, p->uiResvSize, 0);
pStrg->SetParam(STRG_SET_PARTITION_SECTORS, p->uiPhyAddr, p->uiPhySize);
}
pStrg->Unlock();
}
return DX_OK;
}
UINT32 DrvEmbMemOpen(void) // Common Constructor
{
DBG_FUNC_BEGIN("\r\n");
return DX_OK;
}
UINT32 DrvEmbMemClose(void) // Common Destructor
{
DBG_FUNC_BEGIN("\r\n");
return DX_OK;
}
UINT32 DrvEmbMemState(UINT32 StateID, UINT32 Value) // General Properties
{
DBG_FUNC_BEGIN("\r\n");
if (StateID & DXGET) {
UINT32 rvalue = 0;
StateID &= ~DXGET;
DBG_IND("get %08x\r\n", StateID);
switch (StateID) {
case STORAGE_STATE_INSERT:
rvalue = TRUE;
break;
case STORAGE_STATE_LOCK:
rvalue = FALSE;
break;
default:
DBG_ERR("state=0x%02X not support!\r\n", StateID);
break;
}
return rvalue;
} else if (StateID & DXSET) {
StateID &= ~DXSET;
DBG_IND("set %08x\r\n", StateID);
switch (StateID) {
default:
DBG_ERR("state=0x%02X not support!\r\n", StateID);
break;
}
}
return DX_OK;
}
UINT32 DrvEmbMemControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods
{
DBG_FUNC_BEGIN("\r\n");
DBG_IND("ctrl %08x\r\n", CtrlID);
switch (CtrlID) {
default:
DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID);
break;
}
return DX_OK;
}
UINT32 DrvEmbMemCommand(CHAR *pcCmdStr) //General Command Console
{
switch (*pcCmdStr) {
case 'd':
/*if (!strncmp(pcCmdStr, "Nand dump", 9))
{
return TRUE;
}*/
break;
}
return FALSE;
}
#endif

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@ -0,0 +1,205 @@
/**
Copyright Novatek Microelectronics Corp. 2013. All rights reserved.
@file DxUSB.c
@ingroup mIDxUSB
@brief Detect USB connection status.
@date 2013/04/30
*/
#include "UsbDevDef.h"
#include "usb2dev.h"
#include "DxUSB.h"
#include "DxCommon.h"
#include "DxApi.h"
#include "io/gpio.h"
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxUSB
#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
///////////////////////////////////////////////////////////////////////////////
//public func
UINT32 DetUSBGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version)
UINT32 DetUSBSetcfgs(UINT32 CfgID, UINT32 Param1); // Set Config Setting
UINT32 DetUSBInit(void *pInitParam); // Set Init Parameters
UINT32 DetUSBOpen(void); // Common Constructor
UINT32 DetUSBClose(void); // Common Destructor
UINT32 DetUSBState(UINT32 StateID, UINT32 Value); // General Properties
UINT32 DetUSBControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods
UINT32 DetUSBCommand(CHAR *pcCmdStr); //General Command Console
#define GPIO_VBUS D_GPIO_7
//dx object
DX_OBJECT gDevUSB = {
DXFLAG_SIGN,
DX_CLASS_USB_EXT,
DETUSB_VER,
"DETECT_USB",
0, 0, 0, 0,
DetUSBGetcaps,
DetUSBSetcfgs,
DetUSBInit,
DetUSBOpen,
DetUSBClose,
DetUSBState,
DetUSBControl,
DetUSBCommand,
0,
};
static BOOL _DxUSB_get_vbus(void)
{
gpio_setDir(GPIO_VBUS, GPIO_DIR_INPUT);
return (BOOL)gpio_getPin(GPIO_VBUS);
}
static BOOL DxUSB_GetIsUSBPlug(void)
{
#if 0
return (usb2dev_state_change());
#else
return _DxUSB_get_vbus();
#endif
}
static UINT32 DxUSB_UpdateConnectType(void)
{
USB_CHARGER_STS RetUSB;
UINT32 uiUSBCurrType;
if (!DxUSB_GetIsUSBPlug()) {
uiUSBCurrType = USB_CONNECT_NONE;
} else {
RetUSB = usb2dev_check_charger(0);
switch (RetUSB) {
case USB_CHARGER_STS_NONE:
DBG_DUMP("CONNECT to PC\r\n");
uiUSBCurrType = USB_CONNECT_PC;
break;
case USB_CHARGER_STS_CHARGING_DOWNSTREAM_PORT:
DBG_DUMP("CONNECT to Charging PC\r\n");
uiUSBCurrType = USB_CONNECT_CHARGING_PC;
break;
case USB_CHARGER_STS_CHARGER:
DBG_DUMP("CONNECT to CHARGER\r\n");
uiUSBCurrType = USB_CONNECT_CHARGER;
break;
default:
DBG_ERR("CONNECTION UNKNOWN!\r\n");
uiUSBCurrType = USB_CONNECT_UNKNOWN;
break;
}
}
return uiUSBCurrType;
}
UINT32 DetUSBGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version)
{
UINT32 v = 0;
switch (CapID) {
case DETUSB_CAPS_BASE:
DBG_IND("get USB caps\r\n");
v = DETUSB_BF_DETPLUG | DETUSB_BF_CONNTYPE;
break;
case DETUSB_CAPS_PLUG:
DBG_IND("get USB plug\r\n");
v = DxUSB_GetIsUSBPlug();
break;
case DETUSB_CAPS_CONN_TYPE:
DBG_IND("get USB connection type\r\n");
v = DxUSB_UpdateConnectType();
break;
default:
break;
}
return v;
}
UINT32 DetUSBSetcfgs(UINT32 CfgID, UINT32 Param1) // Set Config Setting
{
switch (CfgID) {
case DETUSB_CFG_STANDARD_CHARGER:
DBG_IND("set standard charger %08x\r\n", Param1);
usb2dev_set_config(USB_CONFIG_ID_STANDARD_CHARGER, Param1);
break;
default:
break;
}
return DX_OK;
}
UINT32 DetUSBInit(void *pInitParam) // Set Init Parameters
{
DBG_FUNC_BEGIN("\r\n");
return DX_OK;
}
UINT32 DetUSBOpen(void) // Common Constructor
{
DBG_FUNC_BEGIN("\r\n");
return DX_OK;
}
UINT32 DetUSBClose(void) // Common Destructor
{
DBG_FUNC_BEGIN("\r\n");
return DX_OK;
}
UINT32 DetUSBState(UINT32 StateID, UINT32 Value) // General Properties
{
DBG_FUNC_BEGIN("\r\n");
if (StateID & DXGET) {
UINT32 rvalue = 0;
StateID &= ~DXGET;
DBG_IND("get %08x\r\n", StateID);
switch (StateID) {
default:
DBG_ERR("state=0x%02X not support!\r\n", StateID);
break;
}
return rvalue;
} else if (StateID & DXSET) {
StateID &= ~DXSET;
DBG_IND("set %08x\r\n", StateID);
switch (StateID) {
default:
DBG_ERR("state=0x%02X not support!\r\n", StateID);
break;
}
}
return DX_OK;
}
UINT32 DetUSBControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods
{
DBG_FUNC_BEGIN("\r\n");
DBG_IND("ctrl %08x\r\n", CtrlID);
switch (CtrlID) {
default:
DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID);
break;
}
return DX_OK;
}
UINT32 DetUSBCommand(CHAR *pcCmdStr) //General Command Console
{
return FALSE;
}
//============================================

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@ -0,0 +1,550 @@
/**
Copyright Novatek Microelectronics Corp. 2005. All rights reserved.
@file IOCfg.c
@ingroup mIPRJAPCommonIO
@brief IO config module
This file is the IO config module
@note Nothing.
@date 2005/12/24
*/
/** \addtogroup mIPRJAPCommonIO */
//@{
#include "kwrap/type.h"
#include "DrvExt.h"
#include "IOCfg.h"
#include "IOInit.h"
#include "PrjInc.h"
#if HUNTING_CAMERA_MCU == ENABLE
#include <sf_inc.h>
#define IRLED_CTRL_BY_PWM ENABLE//DISABLE//
#define IRLED_PWMID PWMID_3 /* P_GPIO3 */
#endif
///////////////////////////////////////////////////////////////////////////////
#define __MODULE__ DxDrv
#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER
#define __DBGFLT__ "*" //*=All, [mark]=CustomClass
#include <kwrap/debug.h>
///////////////////////////////////////////////////////////////////////////////
static VK_TASK_HANDLE g_handle_ir_cut = 0;
#if (USE_VIO == ENABLE)
UINT32 Virtual_IO[VIO_MAX_ID] = {0};
UINT32 vio_getpin(UINT32 id)
{
if (id >= VIO_MAX_ID) {
return 0;
}
return Virtual_IO[id];
}
void vio_setpin(UINT32 id, UINT32 v)
{
if (id >= VIO_MAX_ID) {
return;
}
Virtual_IO[id] = v;
}
#endif
#define GPIO_SET_NONE 0xffffff
#define GPIO_SET_OUTPUT_LOW 0x0
#define GPIO_SET_OUTPUT_HI 0x1
/**
Do GPIO initialization
Initialize input/output pins, and pin status
@param void
@return void
*/
void IO_InitGPIO(void)
{
#if 0
UINT32 iSValue;
MODELEXT_HEADER *header;
GPIO_INIT_OBJ *uiGPIOMapInitTab;
uiGPIOMapInitTab = (GPIO_INIT_OBJ *)Dx_GetModelExtCfg(MODELEXT_TYPE_GPIO_INFO, &header);
if (!uiGPIOMapInitTab || !header) {
DBG_FATAL("Modelext: iocfg is null\n");
return;
}
UINT32 totalGpioInitCount = header->number;
DBG_IND("GPIO START\r\n");
//--------------------------------------------------------------------
// Open GPIO driver
//--------------------------------------------------------------------
gpio_open();
for (iSValue = 0 ; iSValue < totalGpioInitCount ; iSValue++) {
if (uiGPIOMapInitTab[iSValue].GpioDir == GPIO_DIR_INPUT) {
gpio_setDir(uiGPIOMapInitTab[iSValue].GpioPin, GPIO_DIR_INPUT);
pad_set_pull_updown(uiGPIOMapInitTab[iSValue].PadPin, uiGPIOMapInitTab[iSValue].PadDir);
} else {
gpio_setDir(uiGPIOMapInitTab[iSValue].GpioPin, GPIO_DIR_OUTPUT);
if (uiGPIOMapInitTab[iSValue].PadDir == GPIO_SET_OUTPUT_HI) {
gpio_setPin(uiGPIOMapInitTab[iSValue].GpioPin);
} else {
gpio_clearPin(uiGPIOMapInitTab[iSValue].GpioPin);
}
}
}
//--------------------------------------------------------------------
// Use Non-Used PWM to be Delay Timer
//--------------------------------------------------------------------
#if defined(PWMID_TIMER)
Delay_setPwmChannels(PWMID_TIMER);
#endif
DBG_IND("GPIO END\r\n");
#endif
}
/**
Initialize voltage detection
Initialize voltage detection for battery and flash
@param void
@return void
*/
void IO_InitADC(void)
{
#if 1
if (adc_open(ADC_CH_VOLDET_BATTERY) != E_OK) {
DBG_ERR("Can't open ADC channel for battery voltage detection\r\n");
return;
}
//650 Range is 250K Hz ~ 2M Hz
adc_setConfig(ADC_CONFIG_ID_OCLK_FREQ, 250000); //250K Hz
//battery voltage detection
adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_SAMPLE_FREQ, 10000); //10K Hz, sample once about 100 us for CONTINUOUS mode
adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_SAMPLE_MODE, (VOLDET_ADC_MODE) ? ADC_CH_SAMPLEMODE_CONTINUOUS : ADC_CH_SAMPLEMODE_ONESHOT);
adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_INTEN, FALSE);
#endif
#if (ADC_KEY == ENABLE)
if (adc_open(ADC_CH_VOLDET_KEY1) != E_OK) {
DBG_ERR("Can't open ADC channel for battery voltage detection\r\n");
return;
}
adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_SAMPLE_FREQ, 10000); //10K Hz, sample once about 100 us for CONTINUOUS mode
adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_SAMPLE_MODE, (VOLDET_ADC_MODE) ? ADC_CH_SAMPLEMODE_CONTINUOUS : ADC_CH_SAMPLEMODE_ONESHOT);
adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_INTEN, FALSE);
#endif
// Enable adc control logic
adc_setEnable(TRUE);
//???
//this delay is from 650, but it is not necessary for current IC
//Delay_DelayMs(15); //wait ADC stable //for pwr on speed up
}
void Dx_InitIO(void) // Config IO for external device
{
//IO_InitIntDir(); //initial interrupt destination
//IO_InitPinmux(); //initial PINMUX config
//IO_InitGPIO(); //initial GPIO pin status
IO_InitADC(); //initial ADC pin status
#if 0//defined(_MCU_ENABLE_)
//Open for DxPower operating
Dx_Open(Dx_GetObject(DX_CLASS_POWER_EXT));
MCUCtrl_Open();
#endif
gpio_setDir(GPIO_IR_LED_PWR, GPIO_DIR_OUTPUT);
gpio_clearPin(GPIO_IR_LED_PWR);
gpio_setDir(GPIO_IRCUT_MEN1, GPIO_DIR_OUTPUT);
gpio_clearPin(GPIO_IRCUT_MEN1);
gpio_setDir(GPIO_IRCUT_MEN2, GPIO_DIR_OUTPUT);
gpio_clearPin(GPIO_IRCUT_MEN2);
}
void Dx_UninitIO(void) // Config IO for external device
{
}
INT32 GPIO_GetBitVal(UINT32 bitNum, UINT32 *bitVal)
{
*bitVal = gpio_getPin(bitNum);
return 0;
}
INT32 GPIO_SetBitVal(UINT32 bitNum, UINT32 bitVal)
{
gpio_setDir(bitNum, GPIO_DIR_OUTPUT);
if (bitVal) {
gpio_setPin(bitNum);
} else {
gpio_clearPin(bitNum);
}
return 0;
}
INT32 GPIO_SwitchAdc(UINT32 channel)
{
//0: ntc, 1:vol
if (channel == 0) {
GPIO_SetBitVal(GPIO_CHARGEIC_ADC_SWITCH, 0);
} else {
GPIO_SetBitVal(GPIO_CHARGEIC_ADC_SWITCH, 1);
}
return 0;
}
INT32 ADC_GetVal(UINT32 channel, UINT32 *value)
{
UINT32 adc_value = 0;
GPIO_SwitchAdc(channel);
adc_value = adc_readData(ADC_CHANNEL_0);
*value = adc_value;
return 0;
}
INT32 GPIO_SetChargeICEnable(UINT32 en)
{
GPIO_SetBitVal(GPIO_CHARGEIC_EN, en);
return 0;
}
INT32 GPIO_GetChargeICEnable(void)
{
return gpio_getPin(GPIO_CHARGEIC_EN);
}
INT32 GPIO_GetChargeICState(void)
{
return gpio_getPin(GPIO_CHARGEIC_STATE);
}
INT32 GPIO_GetAccStatus(void)
{
return !gpio_getPin(GPIO_ACC);
}
INT32 GPIO_GetParkingStatus(void)
{
return !gpio_getPin(GPIO_PARKING);
}
INT32 GPIO_SetPAStatus(BOOL en)
{
gpio_setDir(GPIO_PA, GPIO_DIR_OUTPUT);
if(en)
{
gpio_setPin(GPIO_PA);
}
else
{
gpio_clearPin(GPIO_PA);
}
return gpio_getPin(GPIO_PA);
}
void GPIO_SetLedStatus(UINT32 led,BOOL en)
{
switch(led)
{
case 0:
{
gpio_setDir(GPIO_RED_LED, GPIO_DIR_OUTPUT);
if(en)
{
gpio_setPin(GPIO_RED_LED);
}
else
{
gpio_clearPin(GPIO_RED_LED);
}
}
break;
case 1:
{
gpio_setDir(GPIO_GREEN_LED, GPIO_DIR_OUTPUT);
if(en)
{
gpio_setPin(GPIO_GREEN_LED);
}
else
{
gpio_clearPin(GPIO_GREEN_LED);
}
}
break;
default:
break;
}
}
INT32 GPIO_SetBacklightStatus(BOOL en)
{
gpio_setDir(GPIO_LCD_BLG_PCTL, GPIO_DIR_OUTPUT);
if(en)
{
gpio_setPin(GPIO_LCD_BLG_PCTL);
}
else
{
gpio_clearPin(GPIO_LCD_BLG_PCTL);
}
return gpio_getPin(GPIO_LCD_BLG_PCTL);
}
void GOIO_Turn_Onoff_IRCUT(UINT8 onoff)
{
static UINT32 ir_flag = 1;
//printf("[%s:%d]s onoff:%d\n",__FUNCTION__,__LINE__,onoff);
DBG_IND(" s onoff:%d\n",onoff);
if(ir_flag)
{
gpio_setDir(GPIO_IRCUT_MEN1, GPIO_DIR_OUTPUT);
gpio_setDir(GPIO_IRCUT_MEN2, GPIO_DIR_OUTPUT);
ir_flag = 0;
}
if(onoff ==1)
{
gpio_setPin(GPIO_IRCUT_MEN1);
gpio_clearPin(GPIO_IRCUT_MEN2);
sf_ir_cut_ctrl_PowerOff();
}
else if(onoff == 0)
{
gpio_setPin(GPIO_IRCUT_MEN2);
gpio_clearPin(GPIO_IRCUT_MEN1);
sf_ir_cut_ctrl_PowerOff();
}
else
{
gpio_clearPin(GPIO_IRCUT_MEN1);
gpio_clearPin(GPIO_IRCUT_MEN2);
}
//DBG_DUMP("\r\n DrvGPIO_SetIRCut value:%d \r\n",onoff);
//Delay_DelayMs(20);
//gpio_clearPin(GPIO_IRCUT_MEN1);
//gpio_clearPin(GPIO_IRCUT_MEN2);
//printf("[%s:%d]e\n",__FUNCTION__,__LINE__);
DBG_IND(" e\n");
}
void GPIO_IRLed_Turn_Onoff(BOOL onoff)
{
gpio_setDir(GPIO_IR_LED_PWR, GPIO_DIR_OUTPUT);
if (onoff ==1)
gpio_setPin(GPIO_IR_LED_PWR);
else
gpio_clearPin(GPIO_IR_LED_PWR);
DBG_ERR("\r\n DrvGPIO_SetIR LED value:%d \r\n",onoff);
}
/*************************************************
Function: IrCutCtrlThreadTask
Description: receive event and set ir cut power off
Input: N/A
Output: N/A
Return: N/A
Others: N/A
*************************************************/
THREAD_RETTYPE IrCutCtrlThread(void *arg)
{
THREAD_ENTRY();
Delay_DelayMs(80);
GOIO_Turn_Onoff_IRCUT(2); //IR CUT power off
//DBG_DUMP("\r\n [%s:%d] s3 \r\n",__FUNCTION__,__LINE__);
g_handle_ir_cut = 0;
THREAD_RETURN(0);
}
/*************************************************
Function: IrCutCtrlThreadInit
Description: init thread
Input: N/A
Output: N/A
Return: N/A
Others: N/A
*************************************************/
static void IrCutCtrlThreadInit(void)
{
//DBG_DUMP("\r\n [%s:%d] s \r\n",__FUNCTION__,__LINE__);
g_handle_ir_cut = vos_task_create(IrCutCtrlThread, NULL, "IrCutCtrlThread", 18, 2048);
if(!g_handle_ir_cut){
DBG_ERR("[ERROR] IR CUT thread creat failed!\r\n");
Delay_DelayMs(80);
GOIO_Turn_Onoff_IRCUT(2);
return ;
}
else
vos_task_resume(g_handle_ir_cut);
//DBG_DUMP("\r\n [%s:%d] e g_handle_ir_cut:%d\r\n",__FUNCTION__,__LINE__,g_handle_ir_cut);
}
/*************************************************
Function: sf_ir_cut_ctrl_PowerOff
Description: init and set event flag
Input: N/A
Output: N/A
Return: N/A
Others: N/A
*************************************************/
void sf_ir_cut_ctrl_PowerOff(void)
{
//DBG_DUMP("\r\n [%s:%d] s \r\n",__FUNCTION__,__LINE__);
if(g_handle_ir_cut == 0)
{
IrCutCtrlThreadInit();
}
//DBG_DUMP("\r\n [%s:%d] e \r\n",__FUNCTION__,__LINE__);
}
#if HUNTING_CAMERA_MCU == ENABLE
extern int nvt_system(const char* pCommand);
/*************************************************
Function: sf_ir_led_set
Description: IR LED luminance control
Input: mode: 1:on 0:off ;
Output: N/A
Return: N/A
Others: N/A
*************************************************/
void sf_ir_led_set(UINT8 mode, UINT8 flashLed, UINT8 stillExp, UINT8 isSnapVideo)
{
//printf("[%s:%d]s mode:%d,flashLed:%d,isSnapVideo:%d\n",__FUNCTION__,__LINE__,mode,flashLed, isSnapVideo);
DBG_IND(" s mode:%d,flashLed:%d,isSnapVideo:%d\n",mode,flashLed, isSnapVideo);
UINT32 ui_rise = 0; ///< Rising at which clock
int ret = 0;
char argv[70] = {0};
//530940灯 待机电流120 开灯pic1.010 video81025
if(mode)
{
#if HUNTING_IR_LED_940 == ENABLE
if(isSnapVideo)
{
if(flashLed == 0)
{
ui_rise = 30;//70%
}
else
{
ui_rise = 60;//40%
}
}
else
{
if(flashLed == 0)
{
ui_rise = 15;//85%
}
else
{
ui_rise = 55;//45%
}
}
#else
//530850灯 待机电流120 开灯pic80025 video68035
if(isSnapVideo)
{
if(flashLed == 0)
{
ui_rise = 35;//65%
}
else
{
ui_rise = 65;//35%
}
}
else
{
if(flashLed == 0)
{
ui_rise = 25;//75%
}
else
{
ui_rise = 60;//40%
}
}
#endif
sprintf(argv, "echo \"w openpwm 3 100 %d 100 14 0 0 0\" > /proc/pwm/cmd", ui_rise);
ret = nvt_system(argv);
//printf("%s:%d argv:%s\n", __FUNCTION__, __LINE__,argv);
DBG_IND(" argv:%s\n", argv);
if(0 != ret)
{
printf("%s:%d sf pwm open failed, errno\n", __FUNCTION__, __LINE__);
DBG_ERR("sf pwm open failed, errno(%d)\n", errno);
return;
}
else
{
DBG_IND("sf pwm open success\n");
//printf("%s:%d sf pwm open success\n", __FUNCTION__, __LINE__);
//DBG_DUMP("sf pwm open success\n");
}
sf_set_night_led_flag(1);
}
else
{
sprintf(argv, "echo \"w closepwm 3\" > /proc/pwm/cmd");
ret = nvt_system(argv);
DBG_IND("argv:%s\n",argv);
//printf("%s:%d argv:%s\n", __FUNCTION__, __LINE__,argv);
if(0 != ret)
{
DBG_ERR("sf pwm failed, errno(%d)\n", errno);
printf("%s:%d sf pwm failed, errno\n", __FUNCTION__, __LINE__);
return;
}
else
{
DBG_IND("sf pwm close success\n");
//printf("%s:%d sf pwm close success\n", __FUNCTION__, __LINE__);
//DBG_DUMP("sf pwm close success\n");
}
sf_set_night_led_flag(0);
}
}
#endif

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@ -0,0 +1,475 @@
/**
Copyright Novatek Microelectronics Corp. 2012. All rights reserved.
@file IOCfg.h
@ingroup mIPRJAPCommonIO
@brief Header file of IO config
This file is the header file of IO config
@note Nothing.
@date 2012/09/04
*/
/** \addtogroup mIPRJAPCommonIO */
//@{
#ifndef _IOCFG_H
#define _IOCFG_H
#include "kwrap/type.h"
#include "IOInit.h"
#if 0
#include "pad.h"
#include "top.h"
#include "gpio.h"
#include "adc.h"
#include "pwm.h"
#include "gpio_info.h"
#endif
#include "io/adc.h"
#include "io/gpio.h"
#define USE_VIO DISABLE
#if (USE_VIO == ENABLE)
#define VIO_TV_DET 1
#define VIO_HDMI_DET 2
#define VIO_LCD2_DET 3
#define VIO_SENSOR2_DET 4
#define VIO_SENSOR1_DET 5
#define VIO_AIN_DET 6
#define VIO_MAX_ID 16
extern UINT32 vio_getpin(UINT32 id);
extern void vio_setpin(UINT32 id, UINT32 v);
#endif
//--------------------------------------------------------------------
// ADC common
//--------------------------------------------------------------------
#define GPIO_KEY ENABLE
#define ADC_KEY DISABLE
#define VOLDET_ADC_CONT_MODE ENABLE //!< ENABLE for continuous, DISABLE for one-shot
#if (VOLDET_ADC_CONT_MODE == ENABLE)
#define VOLDET_ADC_MODE TRUE
#else
#define VOLDET_ADC_MODE FALSE
#endif
//--------------------------------------------------------------------
// PWM common
//--------------------------------------------------------------------
//--------------------------------------------------------------------
// Display device
//--------------------------------------------------------------------
// LCD communicate
#define LCD_COMM_DUMMY 0
#define LCD_COMM_BY_GPIO 1
#define LCD_COMM_BY_SIF 2
#define LCD_COMM_CTRL LCD_COMM_BY_GPIO
#if (LCD_COMM_CTRL == LCD_COMM_BY_GPIO)
#define GPIO_LCD_SIF_SEN P_GPIO_7//S_GPIO_4 //FPGA
#define GPIO_LCD_SIF_SCK P_GPIO_8//S_GPIO_5 //FPGA
#define GPIO_LCD_SIF_SDA P_GPIO_9//S_GPIO_6 //FPGA
#endif
#if (LCD_COMM_CTRL == LCD_COMM_BY_SIF)
#define SIF_LCD_CH SIF_CH2
#define PAD_LCD_SIF_SEN PAD_PIN_PGPIO7
#define PAD_LCD_SIF_SCK PAD_PIN_PGPIO8
#define PAD_LCD_SIF_SDA PAD_PIN_PGPIO9
#define DIR_LCD_SIF_SEN PAD_PULLUP
#define DIR_LCD_SIF_SCK PAD_PULLUP
#define DIR_LCD_SIF_SDA PAD_PULLUP
#endif
//#define GPIO_LCD_SLEEP 87 //FPGA not support
#define GPIO_LCD_RESET L_GPIO_1
// LCD backlight
#define LCD_BACKLIGHT_DUMMY 0
#define LCD_BACKLIGHT_BY_GPIO 1
#define LCD_BACKLIGHT_BY_PWM 2
#define LCD_BACKLIGHT_BY_PWRIC 3
#define LCD_BACKLIGHT_CTRL LCD_BACKLIGHT_BY_GPIO //FPGA
#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM)
#define GPIO_PWM_LCD_BLG_PCTL x
#define PWMID_LCD_BLG_PCTL PWMID_x
#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO)
#define GPIO_LCD_BLG_PCTL S_GPIO_3
#define PAD_LCD_BLG_PCTL PAD_PIN_SGPIO3
#endif
// LCD2 communicate
#define LCD2_COMM_CTRL LCD_COMM_BY_GPIO //FPGA
#if (LCD2_COMM_CTRL == LCD_COMM_BY_GPIO)
#define GPIO_LCD2_SIF_SEN P_GPIO_23 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2
#define GPIO_LCD2_SIF_SCK P_GPIO_25 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2
#define GPIO_LCD2_SIF_SDA P_GPIO_26 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2
#endif
#if (LCD2_COMM_CTRL == LCD_COMM_BY_SIF)
#define SIF_LCD2_CH SIF_CHx
#define PAD_LCD2_SIF_SEN PAD_PIN_PGPIO23
#define PAD_LCD2_SIF_SCK PAD_PIN_PGPIO25
#define PAD_LCD2_SIF_SDA PAD_PIN_PGPIO26
#endif
//#define GPIO_LCD2_SLEEP 87 //FPGA not support
//#define GPIO_LCD2_RESET 88 //FPGA not support
// LCD2 backlight
#define LCD2_BACKLIGHT_CTRL LCD_BACKLIGHT_DUMMY //FPGA
#if (LCD2_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM)
#define GPIO_PWM_LCD2_BLG_PCTL x
#define PWMID_LCD2_BLG_PCTL PWMID_x
#elif (LCD2_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO)
#define GPIO_LCD2_BLG_PCTL x_GPIO_x
#define PAD_LCD2_BLG_PCTL PAD_PIN_xGPIOx
#endif
// TV
#define TV_DET_DUMMY 0
#define TV_DET_BY_VIO 1
#define TV_DET_BY_GPIO 2
#define TV_DET_BY_ADC 3
#define TV_DET_CTRL TV_DET_BY_VIO //FPGA
#if (TV_DET_CTRL == TV_DET_BY_GPIO)
#define GPIO_TV_PLUG C_GPIO_x
#define PAD_TV_PLUG PAD_PIN_CGPIOx
#endif
#if (TV_DET_CTRL == TV_DET_BY_ADC)
#define ADC_CH_TV_PLUG ADC_CHANNEL_x
#endif
// HDMI
#define HDMI_DET_DUMMY 0
#define HDMI_DET_BY_VIO 1
#define HDMI_DET_BY_GPIO 2
#define HDMI_DET_BY_ADC 3
#define HDMI_DET_BY_HOTPLUG 4
#define HDMI_DET_CTRL HDMI_DET_BY_VIO //EVB
// LCD2
#define LCD2_DET_DUMMY 0
#define LCD2_DET_BY_VIO 1
#define LCD2_DET_BY_GPIO 2
#define LCD2_DET_BY_ADC 3
#define LCD2_DET_CTRL LCD2_DET_BY_VIO //EVB
// AIN
#define AIN_DET_DUMMY 0
#define AIN_DET_BY_VIO 1
#define AIN_DET_BY_GPIO 2
#define AIN_DET_CTRL AIN_DET_BY_VIO //EVB
#if (AIN_DET_CTRL == AIN_DET_BY_GPIO)
#define GPIO_AIN_PLUG C_GPIO_x
#define PAD_AIN_PLUG PAD_PIN_CGPIOx
#endif
//--------------------------------------------------------------------
// Storage device
//--------------------------------------------------------------------
// CARD
// card power
#define GPIO_CARD_POWER P_GPIO_7
#define PAD_CARD_POWER PAD_PIN_PGPIO7
// SD card detect
#define GPIO_CARD_DETECT C_GPIO_9
#define PAD_CARD_DETECT PAD_PIN_CGPIO9
// SD card write protect
#define GPIO_CARD_WP 0//P_GPIO_11
#define PAD_CARD_WP 0//PAD_PIN_PGPIO11
extern BOOL SDIOCardUser_CheckCardInserted(void);
extern BOOL SDIOCardUser_CheckCardWP(void);
#if defined(_EMBMEM_EMMC_)
extern BOOL SDIO2CardUser_CheckCardInserted(void);
extern BOOL SDIO2CardUser_CheckCardWP(void);
#endif
//--------------------------------------------------------------------
// Audio device
//--------------------------------------------------------------------
//Audio
extern BOOL GPIOMap_DetAudio(void);
//--------------------------------------------------------------------
// Input device
//--------------------------------------------------------------------
// Key defined (650 FPGA KEYPAD)
//
// <Layout>
//--------------------------// //--------------------------//
// SW3 SW1 SW4 SW2 // // kzi kzo ks1 ks2 //
// // // //
// SW7 // // ku //
// // // //
// SW5 SW6 SW8 // // kl ke kr //
// // // //
// SW10 // // kd //
// // // //
// SW12 SW11 SW9 // // km kmd kmp //
// // // //
//--------------------------// //--------------------------//
//
// <Mapping> SW1~SW12 = MC22~MC31,DCPIO4,5 = C_GPIO_22~31,DCPIO4,5 (Roy)
// <Active> Low (Roy)
//
#define GPIO_KEY_ZOOMOUT P_GPIO_20 // Key Zoom Out (kzo)
#define PAD_KEY_ZOOMOUT PAD_PIN_CGPIO20
#define GPIO_KEY_SHUTTER2 C_GPIO_19 // Key Shutter2 (ks2)
#define PAD_KEY_SHUTTER2 PAD_PIN_CGPIO19
#define GPIO_KEY_ZOOMIN P_GPIO_22 // Key Zoom In (kzi)
#define PAD_KEY_ZOOMIN PAD_PIN_CGPIO22
#define GPIO_KEY_SHUTTER1 P_GPIO_23 // Key Shutter1 (ks1)
#define PAD_KEY_SHUTTER1 PAD_PIN_PGPIO23
#define GPIO_KEY_LEFT C_GPIO_18 // Key Left (kl)
#define PAD_KEY_LEFT PAD_PIN_CGPIO18
#define GPIO_KEY_ENTER P_GPIO_4 // Key OK (ke)
#define PAD_KEY_ENTER PAD_PIN_PGPIO4
#define GPIO_KEY_UP C_GPIO_22 // Key Up (ku)
#define PAD_KEY_UP PAD_PIN_CGPIO22
#define GPIO_KEY_RIGHT C_GPIO_4 // Key Right (kr)
#define PAD_KEY_RIGHT PAD_PIN_CGPIO4
#define GPIO_KEY_PLAYBACK C_GPIO_17 // Key Playback (kmp)
#define PAD_KEY_PLAYBACK PAD_PIN_CGPIO17
#define GPIO_KEY_DOWN C_GPIO_20 // Key Down (kd)
#define PAD_KEY_DOWN PAD_PIN_CGPIO20
#define GPIO_KEY_MODE D_GPIO_4 // Key Mode (kmd)
#define PAD_KEY_MODE PAD_PIN_DGPIO4
#define GPIO_KEY_MENU C_GPIO_21 // Key Menu (km)
#define PAD_KEY_MENU PAD_PIN_CGPIO21
/*MCU DATAREADY msg*/
#define GPIO_KEY_DATAREADY P_GPIO_6
#define PAD_KEY_DATAREADY PAD_PIN_PGPIO6
#define GPIO_KEY_TEST S_GPIO_6
#define PAD_KEY_TEST PAD_PIN_SGPIO6
//#define ADC_CH_VOLDET_MS1 ADC_CHANNEL_1
//#define ADC_CH_VOLDET_MS2 ADC_CHANNEL_0
#define ADC_CH_VOLDET_KEY1 ADC_CHANNEL_2
//Touch panel controller
//#define GPIO_TP_BUSY (2 | GPIO_IS_DGPIO) //HW TS_INT =DGPIO-02
#define GPIO_TP_PENIRQ (7 | GPIO_IS_DGPIO) //HW TS_PENIRQ =DGPIO-12
#define GPIO_TP_DOUT 0 //P_GPIO_58 //HW TP_DI =SBDAT0/AGPIO-26 (FW output = HW input)
#define GPIO_TP_DIN (1 | GPIO_IS_DGPIO) //HW TS_DO =DGPIO-01 (FW input = HW output)
#define GPIO_TP_DCLK 0//P_GPIO_57 //HW TS_CLK =SBCK0/AGPIO-25
//#define GPIO_TP_CS 28 //HW TS_CS =SBCS1/AGPIO-28 //SIF channel 1
#define GPIO_TP_CS 0//P_GPIO_56 //HW TS_CS =SBCS0/AGPIO-27 //SIF channel 0
//#define PAD_TP_BUSY PAD_PIN_DGPIO2
#define PAD_TP_PENIRQ PAD_PIN_DGPIO7
#define PAD_TP_DOUT PAD_PIN_PGPIO58
#define PAD_TP_DIN PAD_PIN_DGPIO1
#define PAD_TP_DCLK PAD_PIN_PGPIO57
//#define PAD_TP_CS PAD_PIN_SBCS1 //SIF channel 1
#define PAD_TP_CS PAD_PIN_PGPIO56 //SIF channel 0
//G-Sensor
/*
#define GPIO_GS_INT1 (3 | GPIO_IS_DGPIO)
#define GPIO_GS_INT2 (4 | GPIO_IS_DGPIO)
#define PAD_GS_INT1 PAD_PIN_DGPIO3
#define PAD_GS_INT2 PAD_PIN_DGPIO4
*/
extern UINT32 GPIOMap_DetKey(void);
extern UINT32 GPIOMap_DetModeDial(void);
extern BOOL GPIOMap_DetShutter1(void);
extern BOOL GPIOMap_DetMacro(void);
extern BOOL GPIOMap_DetPoweroff(void);
//--------------------------------------------------------------------
// Output device
//--------------------------------------------------------------------
// LED
#define LED_RED_DUMMY 0
#define LED_RED_BY_GPIO 1
#define LED_RED_BY_MCU 3
#define LED_RED_CTRL LED_RED_DUMMY
#define GPIO_RED_LED P_GPIO_9 //FPGA
#define PAD_RED_LED PAD_PIN_PGPIO9
#define LED_GREEN_DUMMY 0
#define LED_GREEN_BY_GPIO 1
#define LED_GREEN_BY_MCU 3
#define LED_GREEN_CTRL LED_RED_DUMMY
#define GPIO_GREEN_LED P_GPIO_10 //FPGA
#define PAD_GREEN_LED PAD_PIN_PGPIO10
#define GPIO_LED_STATUS_R DSI_GPIO_8 //
#define PAD_LED_STATUS_R PAD_PIN_DSIGPIO8
#define GPIO_LED_STATUS_G DSI_GPIO_9//
#define PAD_LED_STATUS_G PAD_PIN_DSIGPIO9
#define GPIO_LED_SD_G DSI_GPIO_7//
#define PAD_LED_SD_G PAD_PIN_DSIGPIO7
#define GPIO_LED_SD_R DSI_GPIO_4//
#define PAD_LED_SD_R PAD_PIN_DSIGPIO4
#define GPIO_LED_WIFI_B DSI_GPIO_6//
#define PAD_LED_WIFI_B PAD_PIN_DSIGPIO6
#define GPIO_LED_BAT_1 DSI_GPIO_5//
#define PAD_LED_BAT_1 PAD_PIN_DSIGPIO5
#define GPIO_LED_BAT_2 DSI_GPIO_2//
#define PAD_LED_BAT_2 PAD_PIN_DSIGPIO2
#define GPIO_LED_BAT_3 DSI_GPIO_3//
#define PAD_LED_BAT_3 PAD_PIN_DSIGPIO3
#define GPIO_LED_BAT_4 DSI_GPIO_0//
#define PAD_LED_BAT_4 PAD_PIN_DSIGPIO0
#define GPIO_LED_SIG_1_R DSI_GPIO_10//
#define PAD_LED_SIG_1_R PAD_PIN_DSIGPIO10
#define GPIO_LED_SIG_1_G DSI_GPIO_1//
#define PAD_LED_SIG_1_G PAD_PIN_DSIGPIO1
#define GPIO_LED_SIG_2 L_GPIO_1//
#define PAD_LED_SIG_2 PAD_PIN_LGPIO1
#define GPIO_LED_SIG_3 L_GPIO_0//
#define PAD_LED_SIG_3 PAD_PIN_LGPIO0
#define GPIO_LED_SIG_4 P_GPIO_8//
#define PAD_LED_SIG_4 PAD_PIN_PGPIO8
#define LED_FOCUS_DUMMY 0
#define LED_FOCUS_BY_GPIO 1
#define LED_FOCUS_BY_PWM 2 //use PWM to control LED brightness
#define LED_FOCUS_BY_MCU 3
#define LED_FOCUS_CTRL LED_RED_DUMMY
#define GPIO_FOCUS_LED x_GPIO_x //FPGA
#define PAD_FOCUS_LED PAD_PIN_xGPIOx
#define PWMID_FOCUS_LED PWMID_x //FPGA
#if defined(_MCU_ENABLE_)
#undef LED_RED_CTRL
#define LED_RED_CTRL LED_RED_BY_MCU
#undef LED_GREEN_CTRL
#define LED_GREEN_CTRL LED_GREEN_BY_MCU
#undef LED_FOCUS_CTRL
#define LED_FOCUS_CTRL LED_FOCUS_BY_MCU
#endif
#define GPIO_IR_LED_PWR P_GPIO_3 //ir led pwr
#define PAD_IR_LED_PWR PAD_PIN_PGPIO3
#define GPIO_IRCUT_MEN1 D_GPIO_6 // M_EN1 IRCUT 1
#define PAD_IRCUT_MEN1 PAD_PIN_DGPIO6
#define GPIO_IRCUT_MEN2 D_GPIO_5 // M_EN2 IRCUT 2
#define PAD_IRCUT_MEN2 PAD_PIN_DGPIO5
#define GPIO_USB_MUX_S P_GPIO_2 //USB_MUX_S
#define PAD_USB_MUX_S PAD_PIN_PGPIO2
#define GPIO_4G_USB_BOOT S_GPIO_5 //4G_USB_BOOT
#define PAD_4G_USB_BOOT PAD_PIN_SGPIO5
//----------charge ic ----------------
#define GPIO_CHARGEIC_EN C_GPIO_4
#define GPIO_PIR_STATE C_GPIO_7
#define GPIO_CHARGEIC_STATE P_GPIO_12
#define GPIO_CHARGEIC_ADC_SWITCH L_GPIO_0
#define GPIO_ACC P_GPIO_5
#define GPIO_PA P_GPIO_0
#define GPIO_PARKING P_GPIO_6
//--------------------------------------------------------------------
// Power device
//--------------------------------------------------------------------
//Battery
#define ADC_CH_VOLDET_BATTERY ADC_CHANNEL_0
extern char *VolDet_GetStatusString(void);
//--------------------------------------------------------------------
// Sensor device
//--------------------------------------------------------------------
// CCD
/*
typedef enum
{
CCD_PWR_STATUS_OFF = 0,
CCD_PWR_STATUS_ON,
CCD_PWR_STATUS_SLEEP,
CCD_PWR_STATUS_MAXIDX
}CCD_PWR_STATUS;
*/
/*
#define GPIO_CCDTG_VH L_GPIO_20
#define GPIO_CCDTG_VL L_GPIO_19
//#define GPIO_CCDTG_VH_2 50
#define GPIO_CCDTG_RST C_GPIO_22
//#define GPIO_CCDTG_HDRV_EN 88
#define SIF_SENSOR_TG SIF_CH2
#define SIF_SENSOR_AFE SIF_CH3
*/
extern void GPIOMap_TurnOnCCDPower(void);
extern void GPIOMap_TurnOffCCDPower(void);
extern UINT8 GPIOMap_IsCCDPowerOn(void);
extern void GPIOMap_SleepCCDPower(void);
extern void GPIOMap_WakeUpCCDPower(void);
//--------------------------------------------------------------------
// Storbe device
//--------------------------------------------------------------------
// STROBE
/*
#define GPIO_FLASH_CHARGE C_GPIO_21
#define PAD_FL_CHARGE PAD_PIN_CGPIO21
#define GPIO_FLASH_RDY P_GPIO_12
#define PAD_FL_RDY PAD_PIN_PGPIO12
#define GPIO_FLASH_TRIGGER D_GPIO_7
#define PAD_FL_TRIGGER PAD_PIN_DGPIO7
*/
//--------------------------------------------------------------------
// Lens device
//--------------------------------------------------------------------
// BCS 2.7 ~ 12 mm lens + SANYO LV8044 motor IC
#define GPIO_LENS_RESET 0 // output
#define GPIO_LENS_ZOOM_INTR 0 // input
#define PAD_LENS_ZOOM_INTR 0
#define GPIO_LENS_FOCUS_INTR 0 // input
#define PAD_LENS_FOCUS_INTR 0
#define GPIO_LENS_IR_CTRL0 P_GPIO_6 // output
#define GPIO_LENS_IR_CTRL1 P_GPIO_6 // output
#define PAD_LENS_IR_CTRL0 PAD_PIN_PGPIO6
#define PAD_LENS_IR_CTRL1 PAD_PIN_PGPIO7
extern INT32 GPIO_GetBitVal(UINT32 bitNum, UINT32 *bitVal);
extern INT32 GPIO_SetBitVal(UINT32 bitNum, UINT32 bitVal);
extern INT32 GPIO_SwitchAdc(UINT32 channel);
extern INT32 ADC_GetVal(UINT32 channel, UINT32 *value);
extern INT32 GPIO_SetChargeICEnable(UINT32 en);
extern INT32 GPIO_GetChargeICEnable(void);
extern INT32 GPIO_GetChargeICState(void);
extern INT32 GPIO_GetAccStatus(void);
extern INT32 GPIO_SetPAStatus(BOOL en);
extern void GPIO_SetLedStatus(UINT32 led,BOOL en);
extern INT32 GPIO_SetBacklightStatus(BOOL en);
extern void GOIO_Turn_Onoff_IRCUT(UINT8 onoff);
extern void GPIO_IRLed_Turn_Onoff(BOOL onoff);
void sf_ir_led_set(UINT8 mode, UINT8 flashLed, UINT8 stillExp, UINT8 isSnapVideo);
void sf_ir_cut_ctrl_PowerOff(void);
#endif
//@}

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DTS_SENSOR = ./SrcCode/Dx/$(MODEL)/sensor.dts
DTS_APP = ./SrcCode/Dx/$(MODEL)/application.dts
DX_SRC = \
./SrcCode/Dx/$(MODEL)/DxInput_Key.c \
./SrcCode/Dx/$(MODEL)/IOCfg.c \
./SrcCode/Dx/$(MODEL)/DxUsb.c \
./SrcCode/Dx/$(MODEL)/DxCfg.c \
./SrcCode/Dx/$(MODEL)/DxDisplay_LCD.c \
./SrcCode/Dx/$(MODEL)/DxPower_Battery.c \
./SrcCode/Dx/$(MODEL)/DxPower_DC.c \
./SrcCode/Dx/$(MODEL)/DxStorage_Card.c \
./SrcCode/Dx/$(MODEL)/DxStorage_EmbMem.c
# ./SrcCode/Dx/$(MODEL)/DxCamera_Sensor.c \
# ./SrcCode/Dx/$(MODEL)/DxCfg.c
# ./SrcCode/Dx/$(MODEL)/DxCmd.c
# ./SrcCode/Dx/$(MODEL)/DxDisplay_LCD.c
# ./SrcCode/Dx/$(MODEL)/DxOutput_LED.c
# ./SrcCode/Dx/$(MODEL)/DxPower_Battery.c
# ./SrcCode/Dx/$(MODEL)/DxSound_Audio.c
# ./SrcCode/Dx/$(MODEL)/DxStorage_Card.c
# ./SrcCode/Dx/$(MODEL)/DxStorage_EmbMem.c
# ./SrcCode/Dx/$(MODEL)/DxWiFi.c
# ./SrcCode/Dx/$(MODEL)/DxCmd.c

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/*
* Novatek Ltd. NA51055 BSP part of dts
*
* Cortex-A9
*
*/
/dts-v1/;
#include "isp.dtsi" /* sensor */

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/ {
isp {
sensor@0 {
ae_path = "/isp/ae/os05b10_ae_0";
awb_path = "/isp/awb/os05b10_awb_0";
iq_path = "/isp/iq/os05b10_iq_0";
#iq_cap_path = "/isp/iq/gc5603_iq_0_cap";
#iq_shading_path = "/isp/iq/gc5603_iq_shading_0";
};
sensor@1 {
ae_path = "/isp/ae/os05a10_ae_0";
awb_path = "/isp/awb/os05a10_awb_0";
iq_path = "/isp/iq/os05a10_iq_0";
#iq_cap_path = "/isp/iq/os05a10_iq_0_cap";
};
/* label for ae, awb, iq table */
ae: ae {
};
awb: awb {
};
iq: iq {
};
};
};
/* Note: put include files in the tail since label should be declared first. */
#include "os05b10_ae_0.dtsi"
#include "os05b10_awb_0.dtsi"
#include "os05b10_iq_0.dtsi"

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/*
* Novatek Ltd. NA51055 BSP part of dts
*
* Cortex-A9
*
*/
/dts-v1/;
/ {
sensor_ssenif {
ssenif@0 {
if_type = <0x05>; /* HD_COMMON_VIDEO_IN_MIPI_CSI */
sensor_pinmux = <0x220>;
serial_if_pinmux = <0xf01>; /*PIN_MIPI_LVDS_CFG_CLK2 | PIN_MIPI_LVDS_CFG_DAT0 | PIN_MIPI_LVDS_CFG_DAT1 | PIN_MIPI_LVDS_CFG_DAT2 | PIN_MIPI_LVDS_CFG_DAT3*/
cmd_if_pinmux = <0x01>; /*PIN_I2C_CFG_CH1*/
clk_lane_sel = <0x00>; /* HD_VIDEOCAP_SEN_CLANE_SEL_CSI0_USE_C0 */
sen_2_serial_pin_map = <0x00000000 0x00000001 0x00000002 0x00000003 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>;
senout_pxlfmt = <0x420a0000>; /* HD_VIDEO_PXLFMT_RAW10_SHDR2 */
capout_pxlfmt = <0x420c0000>; /* HD_VIDEO_PXLFMT_RAW10_SHDR2 */
data_lane = <0x04>;
shdr_map = <0x00 0x00>;
};
ssenif@1 {
if_type = <0x05>; /* HD_COMMON_VIDEO_IN_MIPI_CSI */
sensor_pinmux = <0x20>;
serial_if_pinmux = <0xC02>;
cmd_if_pinmux = <0x01>;
clk_lane_sel = <0x14>; /* HD_VIDEOCAP_SEN_CLANE_SEL_CSI1_USE_C1 */
sen_2_serial_pin_map = <0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000001 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>;
senout_pxlfmt = <0x410c0000>; /* HD_VIDEO_PXLFMT_RAW12 */
capout_pxlfmt = <0x410c0000>; /* HD_VIDEO_PXLFMT_RAW12 */
data_lane = <0x02>;
};
};
sensor {
/* label for sensor_cfg */
sen_cfg: sen_cfg {
};
};
};
#if defined(__FREERTOS)
/* Note: put include files in the tail since label should be declared first. */
#include <dt-bindings/gpio/nvt-gpio.h>
#include "os05a10_cfg_565.dtsi"
#endif

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#!/bin/bash
# global settings
KEEP_SENSOR_LIST=(sen_imx290 sen_sc401ai sen_os02k10 sen_os05a10 sen_os05b10 sen_gc4653 sen_gc5603)
KEEP_ISP_CFG=(isp_imx290_0.cfg isp_gc4653_0.cfg isp_os05a10_0.cfg isp_os05b10_0.cfg isp_sc401ai_0.cfg isp_gc5603_0.cfg )
KEEP_ISP_BIN=(lut2d_table.bin dpc_table.bin ecs_table.bin ecs_table_ir.bin)
KEEP_LCD_LIST=(disp_if8b_lcd1_psd200_st7789v)
# install appfs: 1. copy isp_xxx.cfg 2.copy isp bin
pushd ${NVT_HDAL_DIR}/vendor/isp/configs/
ISP_CFG_DIR=${ROOTFS_DIR}/rootfs/etc/app/isp
mkdir -p ${ISP_CFG_DIR}
for n in "${KEEP_ISP_CFG[@]}"
do
cp cfg/${n} ${ISP_CFG_DIR}
done
for n in "${KEEP_ISP_BIN[@]}"
do
cp bin/${n} ${ISP_CFG_DIR}
done
popd
# remove sensor ko and install sensor cfg to /etc/app/sensor
KEEP_SENSOR_DIR=${ROOTFS_DIR}/rootfs/lib/modules/${NVT_LINUX_VER}/hdal/keep_sensores
SENSOR_CFG_DIR=${ROOTFS_DIR}/rootfs/etc/app/sensor
mkdir -p ${SENSOR_CFG_DIR}
mkdir ${KEEP_SENSOR_DIR}
for n in "${KEEP_SENSOR_LIST[@]}"
do
cp ${NVT_HDAL_DIR}/ext_devices/sensor/configs/cfg/${n}_565.cfg ${SENSOR_CFG_DIR}
mv ${ROOTFS_DIR}/rootfs/lib/modules/${NVT_LINUX_VER}/hdal/${n} ${KEEP_SENSOR_DIR}
done
rm -rf ${ROOTFS_DIR}/rootfs/lib/modules/${NVT_LINUX_VER}/hdal/sen_*
mv ${KEEP_SENSOR_DIR}/* ${ROOTFS_DIR}/rootfs/lib/modules/${NVT_LINUX_VER}/hdal
rmdir ${KEEP_SENSOR_DIR}
echo ${NVT_LINUX_VER}
KERVER=${NVT_LINUX_VER}
#SENSOR1=sen_os05b10
SENSOR1=`cat configs/cfg_gen/ModelConfig.mk | grep "SENSOR1 =" | sed 's/SENSOR1 = //g'`
#LCD1=disp_if8b_lcd1_psd200_st7789v
LCD1=`cat configs/cfg_gen/ModelConfig.mk | grep "LCD1 =" | sed 's/LCD1 = //g'`
# move ko to ramdisk to speed up boot time.
echo sen1=${SENSOR1}
MV_KO_LIST=(\
/lib/modules/$KERVER/extra/mcu/drv_sf_i2c_mcu.ko \
/lib/modules/$KERVER/extra/crypto/cryptodev-linux/cryptodev.ko \
/lib/modules/$KERVER/vos/kwrap/kwrap.ko \
/lib/modules/$KERVER/hdal/comm/nvtmem/nvtmem.ko \
/lib/modules/$KERVER/hdal/comm/kdrv_comm.ko \
/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_gfx2d.ko \
/lib/modules/$KERVER/hdal/kdrv_videocapture/kdrv_videocapture.ko \
/lib/modules/$KERVER/hdal/kdrv_videoprocess/kdrv_videoprocess.ko \
/lib/modules/$KERVER/hdal/kflow_common/kflow_common.ko \
/lib/modules/$KERVER/hdal/kflow_gfx/videosprite/nvt_videosprite.ko \
/lib/modules/$KERVER/hdal/kflow_videocapture/kflow_videocapture.ko \
/lib/modules/$KERVER/hdal/kflow_videoprocess/kflow_videoprocess.ko \
/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_affine/affine_neon/kdrv_afn_neon.ko \
/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_affine/kdrv_afn.ko \
/lib/modules/$KERVER/hdal/kflow_gfx/nvt_gfx.ko \
/lib/modules/$KERVER/hdal/kdrv_videoout/ide/nvt_ide.ko \
/lib/modules/$KERVER/hdal/kdrv_videoout/dsi/nvt_dsi.ko \
/lib/modules/$KERVER/hdal/kdrv_videoout/display_obj/kdrv_videoout.ko \
/lib/modules/$KERVER/hdal/kflow_videoout/unit/kflow_videoout.ko \
/lib/modules/$KERVER/hdal/display_panel/nvt_dispdev_panel.ko \
/lib/modules/$KERVER/hdal/display_panel/${LCD1}/${LCD1}.ko \
/lib/modules/$KERVER/hdal/kdrv_videocodec/kdrv_h26x.ko \
/lib/modules/$KERVER/hdal/nvt_vencrc/nvt_vencrc.ko \
/lib/modules/$KERVER/hdal/kflow_videoenc/unit/kflow_videoenc.ko \
/lib/modules/$KERVER/hdal/kflow_videodec/unit/kflow_videodec.ko \
/lib/modules/$KERVER/hdal/kdrv_audioio/audio_common/nvt_audio.ko \
/lib/modules/$KERVER/hdal/kdrv_audioio/kdrv_audio/nvt_kdrv_audio.ko \
/lib/modules/$KERVER/hdal/kflow_audiocapture/unit/kflow_audiocap.ko \
/lib/modules/$KERVER/hdal/kflow_audioout/unit/kflow_audioout.ko \
/lib/modules/$KERVER/hdal/kdrv_audioio/audlib_aac/nvt_audlib_aac.ko \
/lib/modules/$KERVER/hdal/kflow_audioenc/unit/kflow_audioenc.ko \
/lib/modules/$KERVER/hdal/kflow_audiodec/unit/kflow_audiodec.ko \
/lib/modules/$KERVER/hdal/isp/nvt_isp.ko \
/lib/modules/$KERVER/hdal/ae/nvt_ae.ko \
/lib/modules/$KERVER/hdal/awb/nvt_awb.ko \
/lib/modules/$KERVER/hdal/iq/nvt_iq.ko \
/lib/modules/$KERVER/hdal/${SENSOR1}/nvt_${SENSOR1}.ko \
/lib/modules/$KERVER/hdal/kdrv_md/kdrv_md.ko \
/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbcopyarea.ko \
/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbfillrect.ko \
/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbimgblt.ko \
/lib/modules/$KERVER/hdal/kdrv_videoout/fbdev/nvt_fb.ko \
/lib/modules/$KERVER/kernel/drivers/usb/common/usb-common.ko \
/lib/modules/$KERVER/kernel/drivers/usb/core/usbcore.ko \
/lib/modules/$KERVER/kernel/drivers/usb/host/ehci-hcd.ko \
/lib/modules/$KERVER/kernel/drivers/net/mii.ko \
/lib/modules/$KERVER/kernel/drivers/net/usb/usbnet.ko \
/lib/modules/$KERVER/extra/net/GobiNet/drv_gobi_net.ko \
/lib/modules/$KERVER/kernel/drivers/net/usb/cdc_ether.ko \
/lib/modules/$KERVER/kernel/drivers/net/usb/rndis_host.ko \
/lib/modules/$KERVER/kernel/drivers/usb/serial/usbserial.ko \
/lib/modules/$KERVER/kernel/drivers/usb/serial/usb_wwan.ko \
/lib/modules/$KERVER/kernel/drivers/usb/serial/option.ko \
/lib/modules/$KERVER/kernel/drivers/usb/class/cdc-wdm.ko \
/lib/modules/$KERVER/kernel/drivers/net/usb/qmi_wwan.ko \
)
#/lib/modules/$KERVER/hdal/comm/uvcp/nvt_uvcp.ko \
#/lib/modules/$KERVER/hdal/comm/usb2dev/nvt_usb2dev.ko \
if [ -d ${ROOTFS_DIR}/rootfs/etc/lib ]; then
echo "remove old rootfs etc/lib"
rm -r ${ROOTFS_DIR}/rootfs/etc/lib
fi
for n in "${MV_KO_LIST[@]}"
do
if [ -f ${ROOTFS_DIR}/rootfs/${n} ]; then
path=$(dirname "${ROOTFS_DIR}/rootfs/etc/${n}")
if [ ! -d ${path} ]; then
mkdir -p ${path}
fi
echo "mv ${ROOTFS_DIR}/rootfs/${n} to ${path}/"
mv ${ROOTFS_DIR}/rootfs/${n} ${path}/
${STRIP} -g --strip-unneeded ${ROOTFS_DIR}/rootfs/etc/${n}
fi
done

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ROOTFS_UBI_SUB_PAGE_SIZE=2048 # Same as page size
ROOTFS_UBI_PAGE_SIZE=2048 # Nand page size
ROOTFS_UBI_ERASE_BLK_SIZE=126976 # (64-2) * Page size=126976
ROOTFS_UBI_MAX_LEB_COUNT=544 # Size = UBI_MAX_LEB_COUNT * UBI_BLK_SIZE; It's calculated by "python ubi_max_leb.py Bytes"
ROOTFS_UBI_RW_MAX_LEB_COUNT=416 # Size = UBI_MAX_LEB_COUNT * UBI_BLK_SIZE; It's calculated by "python ubi_max_leb.py Bytes"
ROOTFS_UBI_BLK_SIZE="128KiB" # UBIFS Nand flash block size (KiB)
ROOTFS_UBI_COMPRESS_MODE="lzo" # UBIFS compression type: "lzo", "favor_lzo", "zlib" "none"
ROOTFS_SQ_COMPRESS_MODE="xz" # Squashfs compression type: "gzip", "lzo" and "xz"
ROOTFS_SQ_BLK_SIZE="64K" # Squashfs Nand flash block size (KiB): e.g. spinand: 128K, spinor: 64K
ROOTFS_JFFS2_COMPRESS_MODE="lzo" # jffs2 compression type: "lzo" "zlib" "rtime"
ROOTFS_JFFS2_SIZE=0x3200000 # jffs2 partition size: get from /proc/mtd
ROOTFS_JFFS2_RW_SIZE=0x2500000 # jffs2 partition size: get from /proc/mtd
ROOTFS_JFFS2_BLK_SIZE="64KiB" # jffs2 block size (KiB): spinand: 128KiB, spinor: 64KiB
ROOTFS_JFFS2_PAGE_SIZE="2048" # jffs2 page size (Bytes): only used by nand, nor flash can be ignored.
ROOTFS_EXT4_SIZE=$(shell printf "%d\n" 0x0A000000)
ROOTFS_FAT_CACHE_SIZE=$(shell printf "%d\n" 0x0A000000)
#APPFS, set EN=OFF to disable building vendor_cfg
ROOTFS_JFFS2_APP_SIZE=0x01E0000
ROOTFS_JFFS2_APP_NOR_SIZE=0x0E20000
ROOTFS_UBI_APP_MAX_LEB_COUNT=233
ROOTFS_EXT4_APP_SIZE=$(shell printf "%d\n" 0x0C000000)

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
/ {
audio@1 { type = "none"; i2s_ctrl = <0>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; };
audio@2 { type = "embedded"; i2s_ctrl = <4>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; };
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
model = "Novatek NA51089";
compatible = "novatek,na51089", "nvt,ca9";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x0>;
next-level-cache = <&L2>;
clock-frequency = <960000000>;
};
};
cg@f0020000 {
compatible = "nvt,core_clk";
reg = <0xf0020000 0x1000>;
};
/* binding to clk framework driver */
periph_clk: periph_clk {
compatible = "nvt,periph_clk";
#clock-cells = <0>;
clock-output-names = "periph_clk";
};
global_timer@ffd00200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xffd00200 0x20>;
interrupts = <GIC_PPI 11 0xf01>;
clocks = <&periph_clk>;
};
private_timer@ffd00600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xffd00600 0x20>;
interrupts = <GIC_PPI 13 0xf01>;
clocks = <&periph_clk>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>;
};
L2: cache-controller@ffe00000 {
compatible = "arm,pl310-cache";
reg = <0xffe00000 0x1000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
cache-unified;
arm,shared-override;
cache-level = <2>;
arm,data-latency = <2 2 2>;
arm,tag-latency = <2 2 2>;
};
gic: interrupt-controller@0xffd00000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0xffd01000 0x1000>, /* GIC Dist */
<0xffd00100 0x1000>; /* GIC CPU */
};
scu: snoop-control-unit@0xffd00000 {
compatible = "arm,cortex-a9-scu";
reg = <0xffd00000 0x100>;
};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
#include <dt-bindings/gpio/nvt-gpio.h>
#include <dt-bindings/pinctrl/nvt_lcd.h>
/* PWM on uboot (nvt_fr_pwm.c) */
/* "Note:\n"
* "Defalut freq is 250KHz,\n"
* "therefore each unit of [period_ns] and [duty_ns] should be 4000 ns,\n"
* "for channel 0 to 7 the maximum unit is 65535, so legal range of [period_ns] is 8000 to 262140000 ns,\n"
* "for other channels the maximum unit is 255, so legal range of [period_ns] is 8000 to 1020000 ns.\n"
*/
/* lcd_bl_gpio = <gpio level>; ==> if the controlled method is GPIO of lcd backlight */
/* lcd_bl2_gpio = <gpio level>; ==> optional for the circuit design */
/* lcd_bl_pwm = <pwm_id inv period duty>; ==> if the controlled method is PWM of lcd backlight*/
/* lcd_rotate = <0>; ==> 0:rotate 90; 1:rotate 90; 270:rotate 270*/
/* lcd_enable = <gpio level>; ==> optional for the circuit design*/
/* lcd_power = <gpio level>; ==> optional for the circuit design*/
/* lcd_standby = <gpio level>; ==> optional for the circuit design*/
/ {
display { type = "lcd"; lcd_ctrl = <1>; sif_channel = <4>; gpio_cs = <P_GPIO(7)>; gpio_clk = <P_GPIO(8)>; gpio_data = <P_GPIO(9)>; };
logo { enable = <1>; lcd_type = <PINMUX_LCD_SEL_SERIAL_RGB_6BITS>; lcd_rotate = <270>; lcd_reset = <L_GPIO(1)>; lcd_bl_gpio = <S_GPIO(3) 1>; lcd_power = <P_GPIO(8) 1>;};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
/dts-v1/;
#include <dt-bindings/gpio/nvt-gpio.h>
#include "nvt-peri.dtsi" /* engine register definition */
#include "nvt-top.dtsi" /* pinmux, made from tool */
#include "nvt-i2c.dtsi" /* i2c */
#include "nvt-gpio.dtsi" /* gpio, made from tool */
#include "nvt-peri-dev.dtsi"/* peripheral device dts config */
#include "nvt-audio.dtsi" /* peripheral: audio */
#include "nvt-display.dtsi" /* peripheral: display */
#include "nvt-media.dtsi" /* ko files relation */
#include "nvt-mem-tbl.dtsi" /* memory partition */
#include "nvt-storage-partition.dtsi" /* flash partition */
#include "nvt-info.dtsi" /* used for turnkey information */
#include "nvt-nvtpack.dtsi" /* used for turnkey to make all-in-one bin */

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&top {
/*
cgpio0{pad_config = <0x0 0x1 0x0 0x2>;};
cgpio1{pad_config = <0x2 0x1 0x2 0x2>;};
cgpio2{pad_config = <0x4 0x1 0x4 0x2>;};
cgpio3{pad_config = <0x6 0x1 0x6 0x2>;};
cgpio4{pad_config = <0x8 0x1 0x8 0x2>;};
cgpio5{pad_config = <0xA 0x1 0xA 0x2>;};
cgpio6{pad_config = <0xC 0x1 0xC 0x2>;};
cgpio7{pad_config = <0xE 0x1 0xE 0x2>;};
cgpio8{pad_config = <0x10000010 0x10 0x10 0x1>;};
cgpio9{pad_config = <0x12 0x1 0x12 0x2>;};
cgpio10{pad_config = <0x14 0x1 0x14 0x2>;};
cgpio11{pad_config = <0x80000000 0x202 0x16 0x1>;};
cgpio12{pad_config = <0x80000004 0x100 0x18 0x2>;};
cgpio13{pad_config = <0x80000008 0x100 0x1A 0x2>;};
cgpio14{pad_config = <0x8000000C 0x100 0x1C 0x2>;};
cgpio15{pad_config = <0x80000010 0x100 0x1E 0x2>;};
cgpio16{pad_config = <0x80000014 0x100 0x20 0x2>;};
cgpio17{pad_config = <0x80000018 0x202 0x22 0x1>;};
cgpio18{pad_config = <0x10000024 0x10 0x24 0x2>;};
cgpio19{pad_config = <0x10000026 0x10 0x26 0x2>;};
cgpio20{pad_config = <0x10000028 0x10 0x28 0x2>;};
cgpio21{pad_config = <0x1000002A 0x10 0x2A 0x2>;};
cgpio22{pad_config = <0x1000002C 0x10 0x2C 0x2>;};
sgpio0{pad_config = <0x10000060 0x10 0x60 0x1>;};
sgpio1{pad_config = <0x10000062 0x10 0x62 0x1>;};
sgpio2{pad_config = <0x64 0x1 0x64 0x1>;};
sgpio3{pad_config = <0x66 0x1 0x66 0x1>;};
sgpio4{pad_config = <0x68 0x1 0x68 0x1>;};
sgpio5{pad_config = <0x1000006A 0x10 0x6A 0x1>;};
sgpio6{pad_config = <0x6C 0x1 0x6C 0x2>;};
sgpio7{pad_config = <0x6E 0x1 0x6E 0x2>;};
sgpio8{pad_config = <0x70 0x1 0x70 0x2>;};
sgpio9{pad_config = <0x72 0x1 0x72 0x2>;};
sgpio10{pad_config = <0x74 0x1 0x74 0x2>;};
sgpio11{pad_config = <0x76 0x1 0x76 0x2>;};
sgpio12{pad_config = <0x78 0x1 0x78 0x1>;};
pgpio0{pad_config = <0x80 0x1 0x80 0x0>;};
pgpio1{pad_config = <0x82 0x1 0x82 0x1>;};
pgpio2{pad_config = <0x84 0x1 0x84 0x1>;};
pgpio3{pad_config = <0x86 0x1 0x86 0x1>;};
pgpio4{pad_config = <0x88 0x1 0x88 0x1>;};
pgpio5{pad_config = <0x8A 0x1 0x8A 0x1>;};
pgpio6{pad_config = <0x8C 0x1 0x8C 0x1>;};
pgpio7{pad_config = <0x8E 0x1 0x8E 0x1>;};
pgpio8{pad_config = <0x10000090 0x10 0x90 0x1>;};
pgpio9{pad_config = <0x92 0x1 0x92 0x1>;};
pgpio10{pad_config = <0x94 0x1 0x94 0x1>;};
pgpio11{pad_config = <0x96 0x1 0x96 0x1>;};
pgpio12{pad_config = <0x98 0x1 0x98 0x2>;};
pgpio13{pad_config = <0x9A 0x1 0x9A 0x2>;};
pgpio14{pad_config = <0x9C 0x1 0x9C 0x2>;};
pgpio15{pad_config = <0x9E 0x1 0x9E 0x2>;};
pgpio16{pad_config = <0xA0 0x1 0xA0 0x2>;};
pgpio17{pad_config = <0xA2 0x1 0xA2 0x2>;};
pgpio18{pad_config = <0xA4 0x1 0xA4 0x2>;};
pgpio19{pad_config = <0xA6 0x1 0xA6 0x2>;};
pgpio20{pad_config = <0xA8 0x1 0xA8 0x1>;};
pgpio21{pad_config = <0xAA 0x1 0xAA 0x2>;};
pgpio22{pad_config = <0xAC 0x1 0xAC 0x2>;};
pgpio23{pad_config = <0xAE 0x1 0xAE 0x2>;};
pgpio24{pad_config = <0xB0 0x1 0xB0 0x2>;};
pgpio25{pad_config = <0xB2 0x202 0xB2 0x2>;};
lgpio0{pad_config = <0xE0 0x1 0xE0 0x1>;};
lgpio1{pad_config = <0xE2 0x1 0xE2 0x1>;};
lgpio2{pad_config = <0xE4 0x1 0xE4 0x1>;};
lgpio3{pad_config = <0xE6 0x1 0xE6 0x1>;};
lgpio4{pad_config = <0xE8 0x1 0xE8 0x1>;};
lgpio5{pad_config = <0xEA 0x1 0xEA 0x1>;};
lgpio6{pad_config = <0xEC 0x1 0xEC 0x1>;};
lgpio7{pad_config = <0xEE 0x1 0xEE 0x1>;};
lgpio8{pad_config = <0x100000F0 0x10 0xF0 0x1>;};
lgpio9{pad_config = <0xF2 0x1 0xF2 0x1>;};
lgpio10{pad_config = <0xF4 0x1 0xF4 0x1>;};
lgpio11{pad_config = <0xF6 0x1 0xF6 0x1>;};
lgpio12{pad_config = <0xF8 0x1 0xF8 0x1>;};
lgpio13{pad_config = <0xFA 0x1 0xFA 0x1>;};
lgpio14{pad_config = <0xFC 0x1 0xFC 0x1>;};
lgpio15{pad_config = <0xFE 0x1 0xFE 0x1>;};
lgpio16{pad_config = <0x100 0x1 0x100 0x1>;};
lgpio17{pad_config = <0x102 0x1 0x102 0x1>;};
lgpio18{pad_config = <0x104 0x1 0x104 0x1>;};
lgpio19{pad_config = <0x106 0x1 0x106 0x1>;};
lgpio20{pad_config = <0x108 0x1 0x108 0x1>;};
lgpio21{pad_config = <0x10A 0x1 0x10A 0x1>;};
lgpio22{pad_config = <0x10C 0x1 0x10C 0x2>;};
lgpio23{pad_config = <0x10E 0x1 0x10E 0x1>;};
lgpio24{pad_config = <0x110 0x1 0x110 0x1>;};
dgpio0{pad_config = <0x10000120 0x10 0x120 0x2>;};
dgpio1{pad_config = <0x10000122 0x10 0x122 0x2>;};
dgpio2{pad_config = <0x10000124 0x10 0x124 0x2>;};
dgpio3{pad_config = <0x10000126 0x10 0x126 0x1>;};
dgpio4{pad_config = <0x10000128 0x10 0x128 0x1>;};
dgpio5{pad_config = <0x1000012A 0x10 0x12A 0x1>;};
dgpio6{pad_config = <0x1000012C 0x10 0x12C 0x1>;};
dgpio7{pad_config = <0x12E 0x1 0x12E 0x1>;};
dgpio8{pad_config = <0x10000130 0x10 0x130 0x1>;};
dgpio9{pad_config = <0x10000132 0x10 0x132 0x1>;};
dgpio10{pad_config = <0x10000134 0x10 0x134 0x1>;};
cgpio0{gpio_config = <C_GPIO(0) 0>;};
cgpio1{gpio_config = <C_GPIO(1) 0>;};
cgpio2{gpio_config = <C_GPIO(2) 0>;};
cgpio3{gpio_config = <C_GPIO(3) 0>;};
cgpio4{gpio_config = <C_GPIO(4) 0>;};
cgpio5{gpio_config = <C_GPIO(5) 0>;};
cgpio6{gpio_config = <C_GPIO(6) 0>;};
cgpio7{gpio_config = <C_GPIO(7) 0>;};
cgpio8{gpio_config = <C_GPIO(8) 0>;};
cgpio9{gpio_config = <C_GPIO(9) 0>;};
cgpio10{gpio_config = <C_GPIO(10) 0>;};
cgpio11{gpio_config = <C_GPIO(11) 0>;};
cgpio12{gpio_config = <C_GPIO(12) 0>;};
cgpio13{gpio_config = <C_GPIO(13) 0>;};
cgpio14{gpio_config = <C_GPIO(14) 0>;};
cgpio15{gpio_config = <C_GPIO(15) 0>;};
cgpio16{gpio_config = <C_GPIO(16) 0>;};
cgpio17{gpio_config = <C_GPIO(17) 0>;};
cgpio18{gpio_config = <C_GPIO(18) 0>;};
cgpio19{gpio_config = <C_GPIO(19) 0>;};
cgpio20{gpio_config = <C_GPIO(20) 0>;};
cgpio21{gpio_config = <C_GPIO(21) 0>;};
cgpio22{gpio_config = <C_GPIO(22) 0>;};
sgpio0{gpio_config = <S_GPIO(0) 0>;};
sgpio1{gpio_config = <S_GPIO(1) 0>;};
sgpio2{gpio_config = <S_GPIO(2) 0>;};
sgpio3{gpio_config = <S_GPIO(3) 0>;};
sgpio4{gpio_config = <S_GPIO(4) 0>;};
sgpio5{gpio_config = <S_GPIO(5) 0>;};
sgpio6{gpio_config = <S_GPIO(6) 0>;};
sgpio7{gpio_config = <S_GPIO(7) 0>;};
sgpio8{gpio_config = <S_GPIO(8) 0>;};
sgpio9{gpio_config = <S_GPIO(9) 0>;};
sgpio10{gpio_config = <S_GPIO(10) 0>;};
sgpio11{gpio_config = <S_GPIO(11) 0>;};
sgpio12{gpio_config = <S_GPIO(12) 0>;};
pgpio0{gpio_config = <P_GPIO(0) 0>;};
pgpio1{gpio_config = <P_GPIO(1) 0>;};
pgpio2{gpio_config = <P_GPIO(2) 0>;};
pgpio3{gpio_config = <P_GPIO(3) 0>;};
pgpio4{gpio_config = <P_GPIO(4) 0>;};
pgpio5{gpio_config = <P_GPIO(5) 0>;};
pgpio6{gpio_config = <P_GPIO(6) 0>;};
pgpio7{gpio_config = <P_GPIO(7) 0>;};
pgpio8{gpio_config = <P_GPIO(8) 0>;};
pgpio9{gpio_config = <P_GPIO(9) 0>;};
pgpio10{gpio_config = <P_GPIO(10) 0>;};
pgpio11{gpio_config = <P_GPIO(11) 0>;};
pgpio12{gpio_config = <P_GPIO(12) 0>;};
pgpio13{gpio_config = <P_GPIO(13) 0>;};
pgpio14{gpio_config = <P_GPIO(14) 0>;};
pgpio15{gpio_config = <P_GPIO(15) 0>;};
pgpio16{gpio_config = <P_GPIO(16) 0>;};
pgpio17{gpio_config = <P_GPIO(17) 0>;};
pgpio18{gpio_config = <P_GPIO(18) 0>;};
pgpio19{gpio_config = <P_GPIO(19) 0>;};
pgpio20{gpio_config = <P_GPIO(20) 0>;};
pgpio21{gpio_config = <P_GPIO(21) 0>;};
pgpio22{gpio_config = <P_GPIO(22) 0>;};
pgpio23{gpio_config = <P_GPIO(23) 0>;};
pgpio24{gpio_config = <P_GPIO(24) 0>;};
pgpio25{gpio_config = <P_GPIO(25) 0>;};
lgpio0{gpio_config = <L_GPIO(0) 0>;};
lgpio1{gpio_config = <L_GPIO(1) 0>;};
lgpio2{gpio_config = <L_GPIO(2) 0>;};
lgpio3{gpio_config = <L_GPIO(3) 0>;};
lgpio4{gpio_config = <L_GPIO(4) 0>;};
lgpio5{gpio_config = <L_GPIO(5) 0>;};
lgpio6{gpio_config = <L_GPIO(6) 0>;};
lgpio7{gpio_config = <L_GPIO(7) 0>;};
lgpio8{gpio_config = <L_GPIO(8) 0>;};
lgpio9{gpio_config = <L_GPIO(9) 0>;};
lgpio10{gpio_config = <L_GPIO(10) 0>;};
lgpio11{gpio_config = <L_GPIO(11) 0>;};
lgpio12{gpio_config = <L_GPIO(12) 0>;};
lgpio13{gpio_config = <L_GPIO(13) 0>;};
lgpio14{gpio_config = <L_GPIO(14) 0>;};
lgpio15{gpio_config = <L_GPIO(15) 0>;};
lgpio16{gpio_config = <L_GPIO(16) 0>;};
lgpio17{gpio_config = <L_GPIO(17) 0>;};
lgpio18{gpio_config = <L_GPIO(18) 0>;};
lgpio19{gpio_config = <L_GPIO(19) 0>;};
lgpio20{gpio_config = <L_GPIO(20) 0>;};
lgpio21{gpio_config = <L_GPIO(21) 0>;};
lgpio22{gpio_config = <L_GPIO(22) 0>;};
lgpio23{gpio_config = <L_GPIO(23) 0>;};
lgpio24{gpio_config = <L_GPIO(24) 0>;};
dgpio0{gpio_config = <D_GPIO(0) 0>;};
dgpio1{gpio_config = <D_GPIO(1) 0>;};
dgpio2{gpio_config = <D_GPIO(2) 0>;};
dgpio3{gpio_config = <D_GPIO(3) 0>;};
dgpio4{gpio_config = <D_GPIO(4) 0>;};
dgpio5{gpio_config = <D_GPIO(5) 0>;};
dgpio6{gpio_config = <D_GPIO(6) 0>;};
dgpio7{gpio_config = <D_GPIO(7) 0>;};
dgpio8{gpio_config = <D_GPIO(8) 0>;};
dgpio9{gpio_config = <D_GPIO(9) 0>;};
dgpio10{gpio_config = <D_GPIO(10) 0>;};
*/
pgpio10{gpio_config = <P_GPIO(10) 0>;}; /* busy led */
sgpio3{gpio_config = <S_GPIO(3) 1>;}; /* backlight */
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
/ {
i2c0: i2c@f0220000 { compatible = "nvt,nvt_i2c"; reg = <0xf0220000 0x100>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <400000>; id = <0>; /*gsr = <2>;*/ /* tsr = <1>; */};
i2c1: i2c2@f0350000 { compatible = "nvt,nvt_i2c"; reg = <0xf0350000 0x100>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <400000>; id = <1>; /*gsr = <2>;*/ /* tsr = <1>; */};
i2c2: i2c3@f03a0000 { compatible = "nvt,nvt_i2c"; reg = <0xf03a0000 0x100>; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <50000>; id = <2>; /*gsr = <2>;*/ /* tsr = <1>; */};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
/ {
nvt_info { /* Get from ModelConfig.txt */
BIN_NAME = "FW98565A";
BIN_NAME_T = "FW98565T";
RTOS_APP_MAIN = "cardv"; /* Optional, if OS type is Linux, dont care it. */
/* EMBMEM_BLK_SIZE, Normally, 2KPageNand=0x20000, 512PageNand=0x4000, SPI=0x10000 */
EMBMEM_BLK_SIZE = "0x10000";
/**
* [EMBMEM]
* EMBMEM_NONE
* EMBMEM_NAND
* EMBMEM_SPI_NOR
* EMBMEM_SPI_NAND
* EMBMEM_EMMC
*/
EMBMEM = "EMBMEM_SPI_NOR";
/**
* [FW_TYPE]
* FW_TYPE_NORMAL
* FW_TYPE_COMPRESS
* FW_TYPE_PARTIAL
* FW_TYPE_PARTIAL_COMPRESS
* FW_TYPE_LZMA
*/
FW_TYPE = "FW_TYPE_PARTIAL";
/**
* [UI_STYLE]
* UI_STYLE_SPORTCAM
*/
UI_STYLE = "UI_STYLE_LVGL";
/**
* ======= Linux common =========
* application/external
*/
NVT_CFG_APP_EXTERNAL = "hostapd wireless_tool iperf-3 wpa_supplicant dhd_priv";
/* application include list */
NVT_CFG_APP = "mem cardv memcpy isp_demon sf_app";
/* rootfs etc folder */
NVT_ROOTFS_ETC = "";
/* strip executable binary and library files: yes/no */
NVT_BINARY_FILE_STRIP = "yes";
/* Using customized kernel config */
NVT_CFG_KERNEL_CFG = "na51089_evb_cardv_defconfig_release";
/* run script befor making rootfs for 'make post' */
NVT_MAKE_POST = "make_post.sh";
/* disable make install on sample, hdal/samples, hdal/test_cases */
NVT_SAMPLES_INSTALL = "DISABLE";
/* Using customized uboot config */
NVT_CFG_UBOOT_CFG = "";
/**
* ======= Linux for different code setting =========
* [NVT_LINUX_SMP]
* NVT_LINUX_SMP_ON
* NVT_LINUX_SMP_OFF
*/
NVT_LINUX_SMP = "NVT_LINUX_SMP_OFF";
/**
* [NVT_CHIP_ID]
* CHIP_NA51055
* CHIP_NA51084
* CHIP_NA51089
*/
NVT_CHIP_ID = "CHIP_NA51089";
/**
* [NVT_LINUX_COMPRESS]
* NVT_LINUX_COMPRESS_AUTO , by linux config
* NVT_LINUX_COMPRESS_GZ
* NVT_LINUX_COMPRESS_NONE
*/
NVT_LINUX_COMPRESS = "NVT_LINUX_COMPRESS_GZ";
/**
* [NVT_DEFAULT_NETWORK_BOOT_PROTOCOL]
* NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_SERVER
* NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_CLIENT
* NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_STATIC_IP
*/
NVT_DEFAULT_NETWORK_BOOT_PROTOCOL = "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_STATIC_IP";
/**
* [NVT_ROOTFS_TYPE]
* NVT_ROOTFS_TYPE_NAND_UBI
* NVT_ROOTFS_TYPE_SQUASH
* NVT_ROOTFS_TYPE_NAND_JFFS2
* NVT_ROOTFS_TYPE_NOR_JFFS2
* NVT_ROOTFS_TYPE_RAMDISK
* NVT_ROOTFS_TYPE_EXT4
*/
NVT_ROOTFS_TYPE = "NVT_ROOTFS_TYPE_RAMDISK";
/**
* [LCD1]
* disp_if8b_lcd1_wm08001_sn75lvds83b
* disp_if8b_lcd1_aucn01
* disp_if8b_lcd1_psd200_st7789v
* disp_if8b_lcd1_pw35p00
* disp_if8b_lcd1_psd300_ili8961
* disp_ifdsi_lcd1_gc9503v_st7701s
*/
LCD1 = "disp_if8b_lcd1_psd200_st7789v";
/**
* [SENSOR]
* sen_off
* sen_ar0237ir
* sen_os02k10
* sen_ov2715
* sen_ar0237
* sen_imx290
* sen_os05a10
* sen_gc5603
*/
SENSOR1 = "sen_os05b10";
SENSOR1_CFG = "sen_os05b10_565";
SENSOR2 = "sen_off";
SENSOR2_CFG = "sen_off";
/**
* [NVT_ROOTFS_RW_PART_EN]
* NVT_ROOTFS_RW_PART_EN_OFF
* NVT_ROOTFS_RW_PART_EN_ON
*/
NVT_ROOTFS_RW_PART_EN = "NVT_ROOTFS_RW_PART_EN_ON";
/**
* [NVT_ETHERNET]
* NVT_ETHERNET_NONE
* NVT_ETHERNET_EQOS
*/
NVT_ETHERNET = "NVT_ETHERNET_NONE";
/**
* [NVT_SDIO_WIFI]: Remember to update root-fs/rootfs/etc/init.d/S05_Net
* NVT_SDIO_WIFI_NONE
* NVT_SDIO_WIFI_RTK
* NVT_SDIO_WIFI_BRCM
* NVT_SDIO_WIFI_NVT
*/
NVT_SDIO_WIFI = "NVT_SDIO_WIFI_RTK";
/**
* [NVT_USB_WIFI]
* NVT_USB_WIFI_NONE
*/
NVT_USB_WIFI = "NVT_USB_WIFI_NONE";
/**
* [NVT_USB_4G]
* NVT_USB_4G_NONE
*/
NVT_USB_4G = "NVT_USB_4G_NONE";
/**
* [WIFI_RTK_MDL] : sub item for NVT_SDIO_WIFI_RTK
* WIFI_RTK_MDL_NONE
* WIFI_RTK_MDL_8189
*/
WIFI_RTK_MDL = "WIFI_RTK_MDL_8189";
/**
* [WIFI_BRCM_MDL] : sub item for NVT_SDIO_WIFI_BRCM
* WIFI_BRCM_MDL_43438a1_ampk6212axtal26
* WIFI_BRCM_MDL_43455c0_ampk6255c0
* WIFI_BRCM_MDL_43456c5_ampk6256c5
*/
WIFI_BRCM_MDL = "WIFI_BRCM_MDL_43456c5_ampk6256c5";
/**
* [WIFI_NVT_MDL] : sub item for NVT_SDIO_WIFI_NVT
* WIFI_NVT_MDL_18202
* WIFI_NVT_MDL_18211
*/
WIFI_NVT_MDL = "WIFI_NVT_MDL_18211";
/**
* [NVT_CURL_SSL]
* NVT_CURL_SSL_OPENSSL
* NVT_CURL_SSL_WOLFSSL
*/
NVT_CURL_SSL = "NVT_CURL_SSL_OPENSSL";
/**
* [NVT_UBOOT_ENV_IN_STORG_SUPPORT]
* NVT_UBOOT_ENV_IN_STORG_SUPPORT_NAND
* NVT_UBOOT_ENV_IN_STORG_SUPPORT_NOR
* NVT_UBOOT_ENV_IN_STORG_SUPPORT_MMC
* NVT_UBOOT_ENV_IN_STORG_SUPPORT_OFF
*/
NVT_UBOOT_ENV_IN_STORG_SUPPORT = "NVT_UBOOT_ENV_IN_STORG_SUPPORT_OFF";
/**
* [TOUCH]
* TOUCH_OFF
* TOUCH_ON
*/
TOUCH = "TOUCH_OFF";
/**
* [UBOOT_ONLY_LOAD_LINUX]
* UBOOT_ONLY_LOAD_LINUX_OFF
* UBOOT_ONLY_LOAD_LINUX_ON
*/
UBOOT_ONLY_LOAD_LINUX = "UBOOT_ONLY_LOAD_LINUX_ON";
};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
#include <dt-bindings/gpio/nvt-gpio.h>
#include "nvt-basic.dtsi"
/ {
nvtmpp {
compatible = "nvt,nvtmpp";
};
isf_stream {
compatible = "nvt,isf_stream";
};
isf_flow {
compatible = "nvt,isf_flow";
};
isf_vdocap {
compatible = "nvt,isf_vdocap";
};
isf_vdoprc {
compatible = "nvt,isf_vdoprc";
};
isf_dummy {
compatible = "nvt,isf_dummy";
};
isf_vdoenc {
compatible = "nvt,isf_vdoenc";
};
isf_vdodec {
compatible = "nvt,isf_vdodec";
};
isf_vdoout {
compatible = "nvt,isf_vdoout";
};
dispobj {
compatible = "nvt,nvt_dispobj";
};
dispdev {
compatible = "nvt,nvt_dispdev";
};
audio {
compatible = "nvt,nvt_audio";
};
msdcnvt {
compatible = "nvt,msdcnvt";
};
msdcnvt_adj {
compatible = "nvt,msdcnvt_adj";
};
msdcnvt_custom_si {
compatible = "nvt,msdcnvt_custom_si";
};
wavstudio {
compatible = "nvt,wavstudio";
};
isf_audenc {
compatible = "nvt,isf_audenc";
};
isf_auddec {
compatible = "nvt,isf_auddec";
};
isf_audcap {
compatible = "nvt,isf_audcap";
};
isf_audout {
compatible = "nvt,isf_audout";
};
nvt_ipc {
compatible = "nvt,nvt_ipc";
};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
/ {
/* Uboot/loader memory layout */
nvt_memory_cfg {
#address-cells = <1>;
#size-cells = <1>;
dram { reg = <0x00000000 0x08000000>; };
shmem{ reg = <0x00007E00 0x00000200>; }; /* always exists */
loader { reg = <0x01000000 0x00080000>; }; /* recycled after uboot started */
fdt { reg = <0x01800000 0x00040000>; }; /* recycled after linux started */
rtos { reg = <0x01840000 0x00FC0000>; }; /* recycled after linux started */
linuxtmp{ reg = <0x02800000 0x04000000>; }; /* recycled after rtos started */
uboot{ reg = <0x06800000 0x01640000>; }; /* recycled after rtos started */
logo-fb{ reg = <0x07E40000 0x001C0000>; }; /* recycled after rtos started */
};
/* Linux system memory region*/
memory { device_type = "memory"; reg = <0x00000000 0x01800000 0x02000000 0x01600000>; };
/* Linux setup reserved memory */
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
/*
* rtos libc heap expected minimum size
* becasue remain of rtos memory will be the libc heap automatically,
* if it too small against your expectation, there will be a assert on boot.
*/
libc-heap { size = <0x00200000>; };
hdal-memory {
#address-cells = <1>;
#size-cells = <1>;
media { reg = <0x03700000 0x04900000>; };
};
hdal-maxpath-cfg {
/* First is for VCAP0, second for VCAP1 and so on.*/
vdocap_active_list = <1 0 0 0 0 0 0 0>;
vdoprc_maxdevice = <2>;
vdoenc_maxpath = <4>;
vdodec_maxpath = <3>;
vdoout_maxdevice = <1>;
adocap_maxdevice = <1>;
adoout_maxdevice = <2>;
adoenc_maxpath = <1>;
adodec_maxpath = <1>;
/* gfx jog list */
gfx_maxjob = <2>;
/* stamp max img buffer number */
stamp_maximg = <9>;
/* First is internal stamp number, second is external stamp number */
vdoprc_maxstamp = <4 4>;
/* First is internal mask number, second is external mask number */
vdoprc_maxmask = <4 4>;
vdoenc_maxstamp = <9 9>;
vdoenc_maxmask = <0 64>;
vdoout_maxstamp = <0 16>;
vdoout_maxmask = <0 64>;
};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
&nor {
/**
* partition_name is $1 as in partition_$1 is referred
* to nvt-na51089-storage-partition. dtsi
*/
nvtpack {
ver = "NVTPACK_FW_INI_16072017"; /* Fixed */
method = <1>; /* Fixed */
index {
id0 { partition_name = "loader"; source_file = ""; }; /* Fixed */
id1 { partition_name = "fdt"; source_file = "nvt-evb.bin"; }; /* Fixed */
id2 { partition_name = "fdt.restore"; source_file = ""; }; /* Fixed */
id3 { partition_name = "fdt.app"; source_file = "../rtos/output/application.bin"; };
id4 { partition_name = "uboot"; source_file = "u-boot.bin"; };
id5 { partition_name = "uenv"; source_file = ""; };
id6 { partition_name = "kernel"; source_file = "uImage.bin"; };
id7 { partition_name = "rootfs"; source_file = "rootfs.ramdisk.bin"; };
id8 { partition_name = "rootfs1"; source_file = "rootfs_1.squash.bin"; };
id9 { partition_name = "rtos"; source_file = "../rtos/output/rtos-main.bin"; };
id10 { partition_name = "app"; source_file = "appfs.cardv.jffs2.nor.bin"; };
id11 { partition_name = "sys"; source_file = ""; };
};
};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
#include <dt-bindings/gpio/nvt-gpio.h>
&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
/* dummy_i2c_dev: dummy_i2c@1a {
compatible = "nvt,dummy_i2c_dev";
reg = <0x1a>;
};
*/
};
&i2c1 {
#address-cells = <1>;
#size-cells = <0>;
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
};
&spi0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* dummy_spi_dev: dummy_spi_dev@0 {
compatible = "dummy_spi_dev.0";
reg = <0>; // Chip select 0
spi-max-frequency = <1000000>;
spi-cpol;
};
*/
};
&spi1 {
status = "okay";
};
&spi2 {
status = "okay";
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
#include <dt-bindings/gpio/nvt-gpio.h>
#include "nvt-basic.dtsi"
/ {
chosen {
bootargs = " ";
};
aliases {
mmc0 = &mmc0; /* Fixed to mmcblk0 for sdio1 */
mmc1 = &mmc1; /* Fixed to mmcblk1 for sdio2 */
};
uart@f0290000 {
compatible = "ns16550a";
reg = <0xf0290000 0x1000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
baud = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
no-loopback-test = <1>;
clock-frequency = <24000000>;
fifo-size = <64>;
uart_id = <0>;
};
uart@f0300000 {
compatible = "ns16550a";
reg = <0xf0300000 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
baud = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
no-loopback-test = <1>;
clock-frequency = <48000000>;
fifo-size = <64>;
hw_flowctrl = <0>;
rx_trig_level = <3>;
uart_id = <1>;
};
uart@f0310000 {
compatible = "ns16550a";
reg = <0xf0310000 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
baud = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
no-loopback-test = <1>;
clock-frequency = <48000000>;
fifo-size = <64>;
hw_flowctrl = <0>;
rx_trig_level = <3>;
uart_id = <2>;
};
kdrv_rpc: cc@f0090000 {
compatible = "kdrv_rpc";
reg = <0xf0090000 0x300>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
};
mmc0: mmc@f0420000 {
compatible = "nvt,nvt_mmc";
reg = <0xf0420000 0x1000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <48000000>;
voltage-switch = <0>;
max-voltage = <3300>;
bus-width = <4>;
neg-sample-edge = <0>;
driving = <15 15 15 20 15 15 25 25 25 25 25 25>;
cd_gpio = <C_GPIO(9) GPIO_FALLING_EDGE GPIO_POLLING>;
card_power_gpio = <P_GPIO(7) GPIO_LOW>;
/*ro_gpio = <D_GPIO(1) GPIO_RISING_EDGE GPIO_POLLING>;*/
/*power_en = <D_GPIO(2) GPIO_RISING_EDGE>;*/
};
mmc1: mmc@f0500000 {
compatible = "nvt,nvt_mmc2";
reg = <0xf0500000 0x1000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <48000000>;
voltage-switch = <0>;
max-voltage = <3300>;
bus-width = <4>;
neg-sample-edge = <0>;
driving = <15 8 8 20 8 8 20 8 8 20 8 8>;
cd_gpio = <0 GPIO_FALLING_EDGE GPIO_INTERRUPT>;
/*ro_gpio = <D_GPIO(3) GPIO_RISING_EDGE GPIO_POLLING>;*/
/*power_en = <D_GPIO(4) GPIO_RISING_EDGE>;*/
/*status = "disabled";*/
};
nand: nand@f0400000 {
#address-cells = <2>;
#size-cells = <2>;
compatible = "nvt,nvt_spinand";
reg = <0xf0400000 0x1000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <96000000>;
nvt-devname = "spi_nand.0";
};
nor: nor@f0400000 {
#address-cells = <2>;
#size-cells = <2>;
compatible = "nvt,nvt_spinor";
reg = <0xf0400000 0x1000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <120000000>;
nvt-devname = "spi_nor.0";
trace-stdtable = <0>;
};
gpio: gpio@f0070000 {
compatible = "nvt,nvt_gpio";
reg = <0xf0070000 0x10000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
};
eth@f02b0000 {
compatible = "nvt,synopsys_eth";
reg = <0xf02b0000 0x3800>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
sp-clk = <0>;
ref-clk-out = <0>;
};
phy@f02b3800 {
compatible = "nvt,eth_phy";
reg = <0xf02b3800 0x400>;
};
wdt@f0050000 {
compatible = "nvt,nvt_wdt";
reg = <0xf0050000 0x10000>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
};
pwm: pwm@f0210000 {
compatible = "nvt,nvt_kdrv_pwm";
reg = <0xf0210000 0x2000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
};
adc@f0260000 {
compatible = "nvt,nvt_adc";
reg = <0xf0260000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
};
rtc@f0060000 {
compatible = "nvt,nvt_rtc";
reg = <0xf0060000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
};
drtc@f00b0000 {
compatible = "nvt,nvt_drtc";
reg = <0xf00b0000 0x100>;
};
crypto: crypto@f0620000 {
compatible = "nvt,nvt_crypto";
reg = <0xf0620000 0x100>;
interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
mclk = <1>;
};
hash: hash@f0670000 {
compatible = "nvt,nvt_hash";
reg = <0xf0670000 0x100>;
interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
mclk = <1>;
};
rsa: rsa@f06a0000 {
compatible = "nvt,nvt_rsa";
reg = <0xf06a0000 0x100>;
interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
mclk = <1>;
};
top: top@f0010000 {
compatible = "nvt,nvt_top";
reg = <0xf0010000 0x2000
0xf0030000 0x2000
0xf0070000 0x10000>;
};
sie@f0c00000 {
compatible = "nvt,drv_sie";
reg = <0xf0c00000 0x900
0xf0d20000 0x900
0xF0D30000 0x900>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
/*sensor_freq = <37125000>;*/
};
tge@f0cc0000 {
compatible = "nvt,kdrv_tge";
reg = <0xf0cc0000 0x150>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
};
rhe@f0ce0000 {
compatible = "nvt,kdrv_rhe";
reg = <0xf0ce0000 0x900>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
};
ime@f0c40000 {
compatible = "nvt,kdrv_ime";
reg = <0xf0c40000 0x1000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
};
ife2@f0d00000 {
compatible = "nvt,kdrv_ife2";
reg = <0xf0d00000 0x100>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
ise@f0c90000 {
compatible = "nvt,kdrv_ise";
reg = <0xf0c90000 0x100>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
};
ipe@f0c30000 {
compatible = "nvt,kdrv_ipe";
reg = <0xf0c30000 0x900>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
};
ife@f0c70000 {
compatible = "nvt,kdrv_ife";
reg = <0xf0c70000 0x800>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
};
vpe@f0cd0000 {
compatible = "nvt,kdrv_vpe";
reg = <0xf0cd0000 0x1040>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
};
ai@f0c60000 {
compatible = "nvt,kdrv_ai";
reg = <0xf0c60000 0x23c
0xf0d50000 0x114
0xf0cb0000 0x22c>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <600000000 480000000 600000000>;
};
md@f0c10000 {
compatible = "nvt,kdrv_md";
reg = <0xf0c10000 0x150>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <240000000>;
};
dis@f0c50000 {
compatible = "nvt,kdrv_dis";
reg = <0xf0c50000 0x114>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
};
coe@f0a11000 {
compatible = "nvt,nvt_coe";
reg = <0xf0a11000 0x2c0>;
};
dce@f0c20000 {
compatible = "nvt,kdrv_dce";
reg = <0xf0c20000 0x650>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
ive@f0d70000 {
compatible = "nvt,kdrv_ive";
reg = <0xf0d70000 0x6c>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
};
sde@f0d90000 {
compatible = "nvt,kdrv_sde";
reg = <0xf0d90000 0x90>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
};
ide@f0800000 {
compatible = "nvt,nvt_ide";
reg = <0xf0800000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
};
dsi@f0840000 {
compatible = "nvt,nvt_dsi";
reg = <0xf0840000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
};
csi@f0280000 {
compatible = "nvt,nvt_csi";
reg = <0xf0280000 0x100
0xf0330000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
};
lvds@f0270000 {
compatible = "nvt,nvt_lvds";
reg = <0xF0270000 0x200
0xF0370000 0x200>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
};
senphy@f06b0000 {
compatible = "nvt,nvt_senphy";
reg = <0xF06B0000 0x100>;
};
ssenif@f0xx0000 {
compatible = "nvt,nvt_ssenif";
reg = <0xF02C0000 0x2000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
};
sif@f0240000 {
compatible = "nvt,nvt_sif";
reg = <0xf0240000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <1000000>;
};
graphic@f0c80000 {
compatible = "nvt,nvt_graphic";
reg = <0xF0C80000 0x300
0xF0D10000 0x100>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
};
affine@f0ca0000 {
compatible = "nvt,nvt_affine";
reg = <0xF0CA0000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
};
h26x@f0a10000 {
compatible = "nvt,nvt_h26x";
reg = <0xf0a10000 0xa00>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
power_saving = <0>; /* 0:using pllf320, 1:using fix96m */
};
timer@f0040000 {
compatible = "nvt,nvt_timer";
reg = <0xf0040000 0x300>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
eac@f0640000 {
compatible = "nvt,nvt_eac";
reg = <0xF0640000 0x200>;
};
jpg@f0a00000 {
compatible = "nvt,nvt_jpg";
reg = <0xf0a00000 0x100>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
};
nvt_usb2host@f0600000 {
compatible = "nvt,ehci-nvtivot";
reg = <0xf0600000 0x10000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
};
nvt_usb2dev@f0600000 {
compatible = "nvt,fotg200_udc";
reg = <0xf0600000 0x10000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
};
nvt_usb_chrg@f0600000 {
compatible = "nvt,nvt_usb_chrgdet";
reg = <0xf0600000 0x10000>;
};
dai@f0630000 {
compatible = "nvt,nvt_dai";
reg = <0xF0630000 0xbc>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
rotate@f0cf0000 {
compatible = "nvt,nvt_rotation";
reg = <0xF0CF0000 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
};
drvdump@0 {
compatible = "nvt,nvt_drvdump";
};
dsp@f1430000 {
compatible = "nvt,nvt_dsp";
reg = <0xF1430000 0x200
0xF2000000 0x1000000
0xF1440000 0x200
0xF3000000 0x1000000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
};
spi0: spi@f0230000 {
compatible = "nvt,nvt_spi";
reg = <0xf0230000 0x10000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
dma-support = <0>;
nvt-devname = <0>;
};
spi1: spi@f0320000 {
compatible = "nvt,nvt_spi";
reg = <0xf0320000 0x10000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
dma-support = <0>;
nvt-devname = <1>;
};
spi2: spi@f0340000 {
compatible = "nvt,nvt_spi";
reg = <0xf0340000 0x10000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
dma-support = <0>;
nvt-devname = <2>;
};
sdp@f0390000 {
compatible = "nvt,nvt_sdp";
reg = <0xf0390000 0x28>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
};
tse@f0650000 {
compatible = "nvt,nvt_tse";
reg = <0xF0650000 0x90>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
};
remote@f0250000 {
compatible = "nvt,nvt_remote";
reg = <0xf0250000 0x28>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
};
rng: rng@f0680000 {
compatible = "nvt,nvt_rng";
reg = <0xf0680000 0x100>;
};
nvt_arb@f0000000 {
compatible = "nvt,nvt_arb";
reg = <0xF0000000 0xA000
0xF0FE0000 0x300>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
};
nvt_otp@f0660000 {
compatible = "nvt,nvt_otp";
reg = <0xF0660000 0x70>;
};
kdrv_ipp {
clock-frequency = <240000000>;
};
uvcp: uvcp@f0690000 {
compatible = "nvt,nvt_uvcp";
reg = <0xf0690000 0x200>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
};
pll_preset@0 {
pll3{pll_config = <3 0 0>;};
pll4{pll_config = <4 0 0>;};
pll5{pll_config = <5 297000000 1>;};
pll6{pll_config = <6 0 0>;};
pll7{pll_config = <7 0 0>;};
pll8{pll_config = <8 0 0>;};
pll9{pll_config = <9 0 0>;};
pll11{pll_config = <11 0 0>;};
pll12{pll_config = <12 0 1>;};
};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
&nor {
partition_loader { label = "loader"; reg = <0x0 0x0000000 0x0 0x10000>; }; /* Fixed */
partition_fdt { label = "fdt"; reg = <0x0 0x10000 0x0 0x10000>; }; /* Fixed */
partition_fdt.restore { label = "fdt.restore"; reg = <0x0 0x20000 0x0 0x10000>; }; /* Fixed */
partition_fdt.app { label = "fdt.app"; reg = <0x0 0x30000 0x0 0x20000>; }; /* Fixed */
partition_uboot { label = "uboot"; reg = <0x0 0x50000 0x0 0xA0000>; };
partition_uenv { label = "uenv"; reg = <0x0 0xF0000 0x0 0x10000>; };
partition_kernel { label = "kernel"; reg = <0x0 0x100000 0x0 0x290000>; };
partition_rootfs { label = "rootfs"; reg = <0x0 0x390000 0x0 0x3E0000>; };
partition_rootfs1 { label = "rootfs1"; reg = <0x0 0x770000 0x0 0xB00000>; };
partition_rtos { label = "rtos"; reg = <0x0 0x1270000 0x0 0x930000>; };
partition_app { label = "app"; reg = <0x0 0x1BA0000 0x0 0x50000>; }; /* app size depneds on hdal/samples/vendor_cfg/Makeile: ROOTFS_UBI_MAX_LEB_COUNT */
partition_sys { label = "sys"; reg = <0x0 0x1D10000 0x0 0x10000>; };
partition_all { label = "all"; reg = <0x0 0x0000000 0x0 0x2000000>; };
};

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&top {
sdio{pinmux = <0x5>;};
sdio2{pinmux = <0x5>;};
sdio3{pinmux = <0x0>;};
nand{pinmux = <0x5>;};
sensor{pinmux = <0x0>;};
sensor2{pinmux = <0x0>;};
mipi_lvds{pinmux = <0x0>;};
i2c{pinmux = <0x40>;};
sif{pinmux = <0x0>;};
uart{pinmux = <0x1825>;};
spi{pinmux = <0x0>;};
sdp{pinmux = <0x0>;};
remote{pinmux = <0x0>;};
pwm{pinmux = <0x8000>;}; /* pwm3: 0x8000 p_gp3 IRLED */
/* pwm2{pinmux = <0x2000000>;}; pwm11: 0x2000000 p_gp11 backlight */
pwm2{pinmux = <0x0000000>;};
ccnt{pinmux = <0x0>;};
audio{pinmux = <0x0>;};
lcd{pinmux = <0x10000000>;};
tv{pinmux = <0x0>;};
eth{pinmux = <0x0>;};
misc{pinmux = <0x0>;};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
/ {
audio@1 { type = "none"; i2s_ctrl = <0>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; };
audio@2 { type = "embedded"; i2s_ctrl = <4>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; };
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
model = "Novatek NA51089";
compatible = "novatek,na51089", "nvt,ca9";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x0>;
next-level-cache = <&L2>;
clock-frequency = <960000000>;
};
};
cg@f0020000 {
compatible = "nvt,core_clk";
reg = <0xf0020000 0x1000>;
};
/* binding to clk framework driver */
periph_clk: periph_clk {
compatible = "nvt,periph_clk";
#clock-cells = <0>;
clock-output-names = "periph_clk";
};
global_timer@ffd00200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xffd00200 0x20>;
interrupts = <GIC_PPI 11 0xf01>;
clocks = <&periph_clk>;
};
private_timer@ffd00600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xffd00600 0x20>;
interrupts = <GIC_PPI 13 0xf01>;
clocks = <&periph_clk>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>;
};
L2: cache-controller@ffe00000 {
compatible = "arm,pl310-cache";
reg = <0xffe00000 0x1000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
cache-unified;
arm,shared-override;
cache-level = <2>;
arm,data-latency = <2 2 2>;
arm,tag-latency = <2 2 2>;
};
gic: interrupt-controller@0xffd00000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0xffd01000 0x1000>, /* GIC Dist */
<0xffd00100 0x1000>; /* GIC CPU */
};
scu: snoop-control-unit@0xffd00000 {
compatible = "arm,cortex-a9-scu";
reg = <0xffd00000 0x100>;
};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
#include <dt-bindings/gpio/nvt-gpio.h>
#include <dt-bindings/pinctrl/nvt_lcd.h>
/* PWM on uboot (nvt_fr_pwm.c) */
/* "Note:\n"
* "Defalut freq is 250KHz,\n"
* "therefore each unit of [period_ns] and [duty_ns] should be 4000 ns,\n"
* "for channel 0 to 7 the maximum unit is 65535, so legal range of [period_ns] is 8000 to 262140000 ns,\n"
* "for other channels the maximum unit is 255, so legal range of [period_ns] is 8000 to 1020000 ns.\n"
*/
/* lcd_bl_gpio = <gpio level>; ==> if the controlled method is GPIO of lcd backlight */
/* lcd_bl2_gpio = <gpio level>; ==> optional for the circuit design */
/* lcd_bl_pwm = <pwm_id inv period duty>; ==> if the controlled method is PWM of lcd backlight*/
/* lcd_rotate = <0>; ==> 0:rotate 90; 1:rotate 90; 270:rotate 270*/
/* lcd_enable = <gpio level>; ==> optional for the circuit design*/
/* lcd_power = <gpio level>; ==> optional for the circuit design*/
/* lcd_standby = <gpio level>; ==> optional for the circuit design*/
/ {
display { type = "lcd"; lcd_ctrl = <1>; sif_channel = <4>; gpio_cs = <P_GPIO(7)>; gpio_clk = <P_GPIO(8)>; gpio_data = <P_GPIO(9)>; };
logo { enable = <0>; lcd_type = <PINMUX_LCD_SEL_SERIAL_RGB_6BITS>; lcd_rotate = <270>; lcd_reset = <L_GPIO(1)>; lcd_bl_gpio = <P_GPIO(11) 1>; lcd_power = <P_GPIO(8) 1>;};
};

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/*
* Novatek Ltd. NA51089 BSP part of dts
*
* Cortex-A9
*
*/
/dts-v1/;
#include <dt-bindings/gpio/nvt-gpio.h>
#include "nvt-peri.dtsi" /* engine register definition */
#include "nvt-top.dtsi" /* pinmux, made from tool */
#include "nvt-i2c.dtsi" /* i2c */
#include "nvt-gpio.dtsi" /* gpio, made from tool */
#include "nvt-peri-dev.dtsi"/* peripheral device dts config */
#include "nvt-audio.dtsi" /* peripheral: audio */
#include "nvt-display.dtsi" /* peripheral: display */
#include "nvt-media.dtsi" /* ko files relation */
#include "nvt-mem-tbl.dtsi" /* memory partition */
#include "nvt-storage-partition.dtsi" /* flash partition */
#include "nvt-info.dtsi" /* used for turnkey information */
#include "nvt-nvtpack.dtsi" /* used for turnkey to make all-in-one bin */

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