From cd39782efe72f4e4f480d5a295fd7f369fc07d18 Mon Sep 17 00:00:00 2001 From: payton Date: Thu, 14 Sep 2023 11:31:34 +0800 Subject: [PATCH] =?UTF-8?q?1.=E5=A2=9E=E5=8A=A0S550=20model?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../init.d/S25_Net | 15 +- .../app/hostap.sh | 304 ++ .../app/isp/dpc_table.bin | Bin 0 -> 16384 bytes .../app/isp/ecs_table.bin | Bin 0 -> 16900 bytes .../app/isp/ecs_table_ir.bin | 1 + .../app/isp/isp_gc4653_0.cfg | 2389 ++++++++++ .../app/isp/isp_gc5603_0.cfg | 2367 ++++++++++ .../app/isp/isp_imx290_0.cfg | 2389 ++++++++++ .../app/isp/isp_os05a10_0.cfg | 2401 ++++++++++ .../app/isp/isp_os05b10_0.cfg | 2409 ++++++++++ .../app/isp/isp_sc401ai_0.cfg | 2389 ++++++++++ .../app/isp/lut2d_table.bin | Bin 0 -> 16900 bytes .../app/sensor/sen_gc4653_565.cfg | 28 + .../app/sensor/sen_gc5603_565.cfg | 28 + .../app/sensor/sen_imx290_565.cfg | 44 + .../app/sensor/sen_os02k10_565.cfg | 43 + .../app/sensor/sen_os05a10_565.cfg | 29 + .../app/sensor/sen_os05b10_565.cfg | 29 + .../app/sensor/sen_sc401ai_565.cfg | 28 + .../application.dtb | Bin 0 -> 293 bytes .../bootchartd.conf | 2 + .../firmware.info | 2 + .../etc_565_HUNTING_EVB_LINUX_4G_S550/fstab | 6 + .../etc_565_HUNTING_EVB_LINUX_4G_S550/group | 1 + .../hostname | 1 + .../etc_565_HUNTING_EVB_LINUX_4G_S550/hosts | 3 + .../inetd.conf | 76 + .../init.d/BS_Net_eth | 34 + .../init.d/BS_Net_wifi | 12 + .../init.d/BS_Net_wifiap | 14 + .../init.d/BS_Net_wifiap8189ftv | 14 + .../init.d/K00_Sys | 4 + .../init.d/K99_Sys | 5 + .../init.d/S00_PreReady | 9 + .../init.d/S05_FS_Overlay | 112 + .../init.d/S07_APP_Overlay | 64 + .../init.d/S07_SysInit | 20 + .../init.d/S10_SysInit2 | 161 + .../init.d/S15_NvtAppInit | 17 + .../init.d/S25_Net | 60 + .../init.d/S99_Sysctl | 13 + .../init.d/rcK | 10 + .../init.d/rcS | 20 + .../etc_565_HUNTING_EVB_LINUX_4G_S550/inittab | 93 + .../localtime | Bin 0 -> 119 bytes .../mdev-script/automount.sh | 36 + .../mdev-script/autoscsi.sh | 258 ++ .../mdev-script/autosd.sh | 240 + .../mdev.conf | 24 + .../network/interfaces | 27 + .../etc_565_HUNTING_EVB_LINUX_4G_S550/passwd | 1 + .../etc_565_HUNTING_EVB_LINUX_4G_S550/profile | 82 + .../resolv.conf | 2 + .../services | 14 + .../sysctl.conf | 68 + .../timezone/localtime | Bin 0 -> 119 bytes .../timezone/localtime.base | Bin 0 -> 171 bytes .../timezone/tzdata | 6 + .../udhcpd.conf | 118 + .../udhcpdw.conf | 90 + .../wifiap_wpa2.conf | 17 + .../wpa_supplicant.conf | 8 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.c | 199 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h | 18 + .../DxDisplay_LCD.c | 667 +++ .../DxInput_Key.c | 261 ++ .../DxPower_Battery.c | 725 +++ .../DxPower_DC.c | 268 ++ .../DxStorage_Card.c | 442 ++ .../DxStorage_EmbMem.c | 574 +++ .../Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c | 205 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c | 550 +++ .../Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h | 475 ++ .../565_HUNTING_EVB_LINUX_4G_S550/Source.mk | 26 + .../application.dts | 10 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi | 30 + .../565_HUNTING_EVB_LINUX_4G_S550/sensor.dts | 48 + .../cardv/SrcCode/PrjCfg_HUNTING_S550.h | 1060 +++++ .../make_post.sh | 132 + .../mtd_cfg.txt | 25 + .../nvt-audio.dtsi | 12 + .../nvt-basic.dtsi | 86 + .../nvt-display.dtsi | 29 + .../nvt-evb.dtb | Bin 0 -> 17582 bytes .../nvt-evb.dts | 21 + .../nvt-evb.tmp.dts | 1183 +++++ .../nvt-gpio.dtsi | 205 + .../nvt-i2c.dtsi | 12 + .../nvt-info.dtsi | 218 + .../nvt-media.dtsi | 96 + .../nvt-mem-tbl.dtsi | 69 + .../nvt-nvtpack.dtsi | 31 + .../nvt-peri-dev.dtsi | 52 + .../nvt-peri.dtsi | 514 +++ .../nvt-storage-partition.dtsi | 22 + .../nvt-top.dtsi | 24 + .../nvt-audio.dtsi | 12 + .../nvt-basic.dtsi | 86 + .../nvt-display.dtsi | 29 + .../nvt-evb.dts | 21 + .../nvt-gpio.dtsi | 205 + .../nvt-i2c.dtsi | 12 + .../nvt-info.dtsi | 217 + .../nvt-media.dtsi | 96 + .../nvt-mem-tbl.dtsi | 69 + .../nvt-nvtpack.dtsi | 31 + .../nvt-peri-dev.dtsi | 52 + .../nvt-peri.dtsi | 514 +++ .../nvt-storage-partition.dtsi | 22 + .../nvt-top.dtsi | 24 + .../DxCamera_Sensor.c | 3946 +++++++++++++++++ .../Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.c | 197 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h | 18 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCmd.c | 201 + .../DxDisplay_LCD.c | 739 +++ .../565_HUNTING_EVB_LINUX_4G_S550/DxHunting.c | 516 +++ .../DxInput_Key.c | 248 ++ .../DxOutput_LED.c | 529 +++ .../DxPower_Battery.c | 727 +++ .../DxPower_DC.c | 272 ++ .../DxSound_Audio.c | 1122 +++++ .../DxStorage_Card.c | 439 ++ .../DxStorage_EmbMem.c | 569 +++ .../Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c | 190 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/DxWiFi.c | 21 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c | 176 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h | 415 ++ .../565_HUNTING_EVB_LINUX_4G_S550/Source.mk | 27 + .../application.dts | 10 + .../Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi | 32 + .../565_HUNTING_EVB_LINUX_4G_S550/sensor.dts | 78 + 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rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCmd.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxDisplay_LCD.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxHunting.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxInput_Key.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxOutput_LED.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_Battery.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_DC.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxSound_Audio.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_Card.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_EmbMem.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxWiFi.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/Source.mk create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/application.dts create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi create mode 100755 rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/sensor.dts create mode 100755 rtos/code/application/source/cardv/SrcCode/PrjCfg_HUNTING_S550.h diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S530/init.d/S25_Net b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S530/init.d/S25_Net index 5e3c4b730..9bb180826 100755 --- a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S530/init.d/S25_Net +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S530/init.d/S25_Net @@ -2,11 +2,24 @@ NETWORK_SETUP_SCRIPT="/etc/init.d/net_init.sh" +SF_BOOT_MODE=1 + +kernel_cmdline=$(cat /proc/cmdline) + +SF_HUNTING_BOOT_MODE=`dmesg | grep -o 'Mode=[0-9]*' | cut -d'=' -f2` + +echo SF_HUNTING_BOOT_MODE=${SF_HUNTING_BOOT_MODE} + do_wifi_init() { if [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_RTK" ]; then #/etc/init.d/BS_Net_wifiap8189ftv - echo "Configuring BS_Net_wifiap8189ftv sf stop" + if [ "${SF_BOOT_MODE}" = "${SF_HUNTING_BOOT_MODE}" ]; then + echo "Configuring BS_Net_wifiap8189ftv sf start" + /etc/init.d/BS_Net_wifiap8189ftv + else + echo "Configuring BS_Net_wifiap8189ftv sf stop" + fi elif [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_BRCM" ]; then modprobe bcmdhd # TBD diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/hostap.sh b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/hostap.sh new file mode 100755 index 000000000..eeb41f656 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/hostap.sh @@ -0,0 +1,304 @@ +#!/bin/sh +# +# History: +# 2013/06/24 - [Tao Wu] Create file +# 2016/06/22 - [Tao Wu] Update file +# +# Copyright (c) 2015 Ambarella International LP +# +# This file and its contents ("Software") are protected by intellectual +# property rights including, without limitation, U.S. and/or foreign +# copyrights. This Software is also the confidential and proprietary +# information of Ambarella International LP and its licensors. You may not use, reproduce, +# disclose, distribute, modify, or otherwise prepare derivative works of this +# Software or any portion thereof except pursuant to a signed license agreement +# or nondisclosure agreement with Ambarella International LP or its authorized affiliates. +# In the absence of such an agreement, you agree to promptly notify and return +# this Software to Ambarella International LP. +# +# This file includes sample code and is only for internal testing and evaluation. If you +# distribute this sample code (whether in source, object, or binary code form), it will be +# without any warranty or indemnity protection from Ambarella International LP or its affiliates. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF NON-INFRINGEMENT, +# MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL AMBARELLA INTERNATIONAL LP OR ITS AFFILIATES BE LIABLE FOR ANY DIRECT, +# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; COMPUTER FAILURE OR MALFUNCTION; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +HOSTAP_VERSION="1.1.2" + +encryption=$1 +ssid=$2 +passwd=$3 +channel=$4 + +DEVICE=$5 +DIR_CONFIG=/tmp/config + +############# HOSTAP CONFIG ############### +WOWLAN=1 +HOSTAP_CTRL_INTERFACE=/var/run/hostapd +HOST_CONFIG=$DIR_CONFIG/hostapd.conf +DEFAULT_CHANNEL=1 +HOST_MAX_STA=1 +AP_PIN=12345670 +DRIVER=nl80211 + +wpa_group_rekey=120 +############# DHCP Server ############### +LOCAL_IP=192.168.1.1 +LOCAL_NETMASK=255.255.255.0 +DHCP_IP_START=192.168.1.20 +DHCP_IP_END=192.168.1.100 + +############# Exit Error Number ############### +ERRNO_OK=0 +ERRNO_PARAM=1 +ERRNO_ENV=2 +#ERRNO_SSID_NOT_FOUND=3 +#ERRNO_PASSWORD_WRONG=4 + +##################################### +usages() +{ + echo "Version: ${HOSTAP_VERSION}" + echo "This script used to Setup/Stop WiFi AP mode with hostapd" + echo "usage: $0 [open|wpa3|wpa2|wpa|wpawpa2|wps] " + echo "" + echo "Example:" + echo "Setup AP[Open]: $0 open 0 " + echo "Setup AP[Encrypt]: $0 [wpa3|wpa2|wpa|wpawpa2] " + echo "Setup AP[WPA2+WPS]:$0 wps " + echo " [Control AP] # hostapd_cli -i [wps_pbc | wps_pin any ] (PIN:${AP_PIN})" + echo "Stop AP mode: $0 stop" + echo "" + echo "NOTICE: Using interface AP[${DEVICE}] by default, change it if necessary." + + exit $ERRNO_OK +} + +# kill process +kill_apps() +{ + #the max times to kill app + local KILL_NUM_MAX=10 + + for app in "$@" + do + local kill_num=0 + while [ "$(pgrep "${app}")" != "" ] + do + if [ $kill_num -ge $KILL_NUM_MAX ]; then + echo "Please try execute \"killall ${app}\" by yourself" + exit $ERRNO_ENV + else + killall -9 "${app}" + sleep 1 + fi + kill_num=$((kill_num + 1)); + done + done +} + +stop_wifi_app() +{ + kill_apps udhcpc dnsmasq NetworkManager hostapd_cli hostapd + ifconfig ${DEVICE} down +} + +################ AP Mode ##################### +check_encrypt() +{ + if [ "${encryption}" != "open" ]; then + len=${#passwd} + if [ "$len" -lt 8 ]; then + echo "Password length at least 8" + exit 1 + fi + fi +} + +check_channel() +{ + if [ ${#channel} -gt 0 ]; then + if [ "${channel}" -gt 196 ] || [ "${channel}" -lt 1 ]; then + echo "Your Channel is wrong(1 ~ 196), using Channel ${DEFAULT_CHANNEL} by default." + channel=$DEFAULT_CHANNEL + fi + else + echo "No specified channel, using default channel ${DEFAULT_CHANNEL}." + channel=$DEFAULT_CHANNEL + fi +} + +generate_hostapd_conf() +{ + if [ -f ${HOST_CONFIG} ]; then + ## Use the saved config, Do not need generate new config except failed to connect. + return ; + fi + mkdir -p $DIR_CONFIG + + check_encrypt + check_channel + echo "AP: SSID[${ssid}], Password[${passwd}], Encryption[${encryption}], Channel[${channel}]." + + echo "interface=${DEVICE}" > ${HOST_CONFIG} + echo "ctrl_interface=${HOSTAP_CTRL_INTERFACE}" >> ${HOST_CONFIG} + echo "driver=${DRIVER}" >> ${HOST_CONFIG} + echo "ctrl_interface_group=0" >> ${HOST_CONFIG} + echo "ignore_broadcast_ssid=0" >> ${HOST_CONFIG} + echo "auth_algs=1" >> ${HOST_CONFIG} +# echo "country_code=CN" >> ${HOST_CONFIG} + + ## This for WiFi suspend/resume + #if [ $WOWLAN -eq 1 ]; then + #echo "wowlan_triggers=any" >> ${HOST_CONFIG} + #fi + + { + echo "beacon_int=100" + echo "dtim_period=1" + echo "preamble=0" + echo "ssid=${ssid}" + echo "max_num_sta=${HOST_MAX_STA}" + } >> ${HOST_CONFIG} + + if [ ${channel} -gt 14 ]; then + echo "hw_mode=a" >> ${HOST_CONFIG} + fi + echo "channel=${channel}" >> ${HOST_CONFIG} + + if [ "${encryption}" != "open" ]; then + local len_passwd=${#passwd} + local local_passwd_value="" + + if [ "$len_passwd" -eq 64 ]; then + echo "passphrase length is 64, using hex type" + local_passwd_value="${passwd}" + elif [ "$len_passwd" -ge 8 ] && [ "$len_passwd" -le 63 ]; then + local_passwd_value="${passwd}" + else + echo "Invalid passphrase length ${len_passwd} (expected: 8..63 or 64 hex)" + rm -rf ${HOST_CONFIG} + exit $ERRNO_PARAM + fi + fi + + case ${encryption} in + open) + ;; + wpa3) + echo "wpa=2" >> ${HOST_CONFIG} + echo "wpa_key_mgmt=SAE" >> ${HOST_CONFIG} + echo "rsn_pairwise=CCMP" >> ${HOST_CONFIG} + echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG} + echo "ieee80211w=2" >> ${HOST_CONFIG} +# echo "sae_password=${local_passwd_value}" >> ${HOST_CONFIG} + ;; + wpa2) + echo "wpa=2" >> ${HOST_CONFIG} + echo "wpa_key_mgmt=WPA-PSK" >> ${HOST_CONFIG} + echo "wpa_pairwise=CCMP" >> ${HOST_CONFIG} + echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG} + ;; + wpa) + echo "wpa=1" >> ${HOST_CONFIG} + echo "wpa_key_mgmt=WPA-PSK" >> ${HOST_CONFIG} + echo "wpa_pairwise=TKIP" >> ${HOST_CONFIG} + echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG} + ;; + wpawpa2) + echo "wpa=2" >> ${HOST_CONFIG} + echo "wpa_key_mgmt=WPA-PSK" >> ${HOST_CONFIG} + echo "wpa_pairwise=CCMP" >> ${HOST_CONFIG} + echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG} + ;; + wps) + echo "wpa=2" >> ${HOST_CONFIG} + echo "wpa_key_mgmt=WPA-PSK" >> ${HOST_CONFIG} + echo "wpa_pairwise=CCMP" >> ${HOST_CONFIG} + echo "wpa_passphrase=${local_passwd_value}" >> ${HOST_CONFIG} + + echo "wps_state=2" >> ${HOST_CONFIG} + echo "eap_server=1" >> ${HOST_CONFIG} + echo "ap_pin=${AP_PIN}" >> ${HOST_CONFIG} + echo "config_methods=label display push_button keypad ethernet" >> ${HOST_CONFIG} + echo "wps_pin_requests=/var/run/hostapd.pin-req" >> ${HOST_CONFIG} + ;; + *) + echo "Not support encryption [$encryption]" + exit $ERRNO_PARAM + ;; + esac + + #echo "wpa_group_rekey=$wpa_group_rekey" >> ${HOST_CONFIG} + #echo "ignore_broadcast_ssid=0" >> ${HOST_CONFIG} + #echo "ap_setup_locked=0" >> ${HOST_CONFIG} + echo "hw_mode=g" >> ${HOST_CONFIG} + echo "ieee80211n=1">>${HOST_CONFIG} +} + +start_dhcp_server() +{ +## Start DHCP Server ## + #mkdir -p /var/lib/misc + #mkdir -p /etc/dnsmasq.d + #dnsmasq -i${DEVICE} --no-daemon --no-resolv --no-poll --dhcp-range=${DHCP_IP_START},${DHCP_IP_END},1h & + udhcpd /appfs/etc/udhcpd.conf & +} + +hostapd_start_ap() +{ + ## Setup interface and set IP,gateway## + echo "Using Interface AP:[${DEVICE}]" + ifconfig ${DEVICE} ${LOCAL_IP} up + route add default netmask ${LOCAL_NETMASK} gw ${LOCAL_IP} + ## Start Hostapd ## + CMD="hostapd ${HOST_CONFIG} -e /appfs/etc/bpi/entropy.bin -B" + echo "CMD=${CMD}" + $CMD + + #start_dhcp_server + echo "HostAP Setup Finished." +} + +clear_config() +{ + rm -rf ${HOST_CONFIG} +} + +################ Main ################### + +## Show usage when no parameter +if [ $# -eq 0 ]; then + usages +fi + +## Start WiFi +if [ $# -gt 1 ]; then + clear_config +fi + +case ${encryption} in + "stop") + stop_wifi_app + ;; + open|wpa3|wpa2|wpa|wpawpa2|wps) + generate_hostapd_conf + hostapd_start_ap + ;; + *) + echo "Please Select Encryption [open|wpa3|wpa2|wpa|wpawpa2|wps] or stop" + exit $ERRNO_PARAM + ;; +esac +######################################## diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/isp/dpc_table.bin b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/isp/dpc_table.bin new file mode 100755 index 0000000000000000000000000000000000000000..267a7e19870063f89c5692b07c08f19df5f832ce GIT binary patch literal 16384 zcmeIuAprmY00JQYpVk=`m_Qp07%*VKfB^#r3>YwAz<>b*1`HT5V8DO@0|pEjFkrxd r0RsjM7%*VKfB^#r3>YwAz<>b*1`HT5V8DO@0|pEjFkrxdf%Cus#&QAw literal 0 HcmV?d00001 diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/isp/ecs_table.bin b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/isp/ecs_table.bin new file mode 100755 index 0000000000000000000000000000000000000000..71c253124b8a676e215e1bfea001a48afc2e8094 GIT binary patch literal 16900 zcmeIwF%19!48yQa8i4XgI~aR>gh1rXHu8W01{h#~0R|XgfB^;=V1NMz7+`<_1{h#~ z0R|XgfB^;=V1NMz7+`<_1{h#~0R|XgfB^;=V1NMz7+`<_1{h#~0R|XgfB^;=V1NMz H7YwAz<>b*1`HT5V8DO@0|pEjFkrxd0RsjM s7%*VKfB^#r3>YwAz<>b*1`HT5V8DO@0|pEjFkrxd0RsjM7%=c27(xU90RR91 literal 0 HcmV?d00001 diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_gc4653_565.cfg b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_gc4653_565.cfg new file mode 100755 index 000000000..491d87d1e --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_gc4653_565.cfg @@ -0,0 +1,28 @@ +[MAP] +path_1 = 1 #Path 1 Enable +path_2 = 0 #Path 2 Disable +path_3 = 0 #Path 3 Disable +path_4 = 0 #Path 4 Disable +path_5 = 0 #Path 5 Disable +path_6 = 0 #Path 6 Disable +path_7 = 0 #Path 7 Disable +path_8 = 0 #Path 8 Disable + +[PRESET] +id_0_expt_time = 10000 #10000us +id_0_gain_ratio = 1000 #1x gain + +[DIRECTION] +id_0_mirror = 0 #no mirror +id_0_flip = 0 #no flip + +[POWER] +id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_0_pwdn_pin = 0xFFFFFFFF #S_GPIO_9, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_time = 2 #2ms +id_0_stable_time = 2 #2ms + +[I2C] +id_0_i2c_id = 0 #SEN_I2C_ID_1 +id_0_i2c_addr = 0x29 #0x52 >> 1 \ No newline at end of file diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_gc5603_565.cfg b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_gc5603_565.cfg new file mode 100755 index 000000000..62528214a --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_gc5603_565.cfg @@ -0,0 +1,28 @@ +[MAP] +path_1 = 1 #Path 1 Enable +path_2 = 0 #Path 2 Disable +path_3 = 0 #Path 3 Disable +path_4 = 0 #Path 4 Disable +path_5 = 0 #Path 5 Disable +path_6 = 0 #Path 6 Disable +path_7 = 0 #Path 7 Disable +path_8 = 0 #Path 8 Disable + +[PRESET] +id_0_expt_time = 10000 #10000us +id_0_gain_ratio = 1000 #1x gain + +[DIRECTION] +id_0_mirror = 0 #no mirror +id_0_flip = 0 #no flip + +[POWER] +id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_time = 1 #1ms +id_0_stable_time = 1 #1ms + +[I2C] +id_0_i2c_id = 0 #SEN_I2C_ID_1 +id_0_i2c_addr = 0x31 #0x62>> 1 \ No newline at end of file diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_imx290_565.cfg b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_imx290_565.cfg new file mode 100755 index 000000000..6c11533c5 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_imx290_565.cfg @@ -0,0 +1,44 @@ +[MAP] +path_1 = 1 #Path 1 Enable +path_2 = 1 #Path 2 Enable +path_3 = 0 #Path 3 Disable +path_4 = 0 #Path 4 Disable +path_5 = 0 #Path 5 Disable +path_6 = 0 #Path 6 Disable +path_7 = 0 #Path 7 Disable +path_8 = 0 #Path 8 Disable + +[PRESET] +id_0_expt_time = 10000 #10000us +id_0_gain_ratio = 1000 #1x gain + +id_1_expt_time = 10000 #10000us +id_1_gain_ratio = 1000 #1x gain + +[DIRECTION] +id_0_mirror = 0 #no mirror +id_0_flip = 0 #no flip + +id_1_mirror = 0 #no mirror +id_1_flip = 0 #no flip + +[POWER] +id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_time = 1 #1ms +id_0_stable_time = 1 #1ms + +id_1_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_1_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_1_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_1_rst_time = 1 #1ms +id_1_stable_time = 1 #1ms + +[I2C] +id_0_i2c_id = 0 #SEN_I2C_ID_1 +id_0_i2c_addr = 0x1A #0x34 >> 1 = 0x1A + +id_1_i2c_id = 1 #SEN_I2C_ID_2 +id_1_i2c_addr = 0x1A #0x34 >> 1 = 0x1A + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os02k10_565.cfg b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os02k10_565.cfg new file mode 100755 index 000000000..6e8ea81c5 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os02k10_565.cfg @@ -0,0 +1,43 @@ +[MAP] +path_1 = 1 #Path 1 Enable +path_2 = 1 #Path 2 Enable +path_3 = 0 #Path 3 Disable +path_4 = 0 #Path 4 Enable +path_5 = 0 #Path 5 Enable +path_6 = 0 #Path 6 Disable +path_7 = 0 #Path 7 Disable +path_8 = 0 #Path 8 Disable + +[PRESET] +id_0_expt_time = 10000 #10000us +id_0_gain_ratio = 1000 #1x gain + +id_1_expt_time = 10000 #10000us +id_1_gain_ratio = 1000 #1x gain + +[DIRECTION] +id_0_mirror = 1 #mirror +id_0_flip = 0 #no flip + +id_1_mirror = 1 #mirror +id_1_flip = 0 #no flip + +[POWER] +id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_time = 1 #1ms +id_0_stable_time = 1 #1ms + +id_1_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_1_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_1_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_1_rst_time = 1 #1ms +id_1_stable_time = 1 #1ms + +[I2C] +id_0_i2c_id = 0 #SEN_I2C_ID_1 +id_0_i2c_addr = 0x36 #0x6C >> 1 = 0x36 + +id_1_i2c_id = 1 #SEN_I2C_ID_2 +id_1_i2c_addr = 0x36 #0x6C >> 1 = 0x36 diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os05a10_565.cfg b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os05a10_565.cfg new file mode 100755 index 000000000..b5f5726d6 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os05a10_565.cfg @@ -0,0 +1,29 @@ +[MAP] +path_1 = 1 #Path 1 Enable +path_2 = 0 #Path 2 Disable +path_3 = 0 #Path 3 Disable +path_4 = 0 #Path 4 Disable +path_5 = 0 #Path 5 Disable +path_6 = 0 #Path 6 Disable +path_7 = 0 #Path 7 Disable +path_8 = 0 #Path 8 Disable + +[PRESET] +id_0_expt_time = 10000 #10000us +id_0_gain_ratio = 1000 #1x gain + +[DIRECTION] +id_0_mirror = 0 #no mirror +id_0_flip = 1 #flip + +[POWER] +id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_time = 1 #1ms +id_0_stable_time = 1 #1ms + +[I2C] +id_0_i2c_id = 0 #SEN_I2C_ID_1 +id_0_i2c_addr = 0x36 #0x6C >> 1 + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os05b10_565.cfg b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os05b10_565.cfg new file mode 100755 index 000000000..679462a4e --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_os05b10_565.cfg @@ -0,0 +1,29 @@ +[MAP] +path_1 = 1 #Path 1 Enable +path_2 = 0 #Path 2 Disable +path_3 = 0 #Path 3 Disable +path_4 = 0 #Path 4 Disable +path_5 = 0 #Path 5 Disable +path_6 = 0 #Path 6 Disable +path_7 = 0 #Path 7 Disable +path_8 = 0 #Path 8 Disable + +[PRESET] +id_0_expt_time = 10000 #10000us +id_0_gain_ratio = 1000 #1x gain + +[DIRECTION] +id_0_mirror = 1 #no mirror +id_0_flip = 0 #flip + +[POWER] +id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_time = 1 #1ms +id_0_stable_time = 1 #1ms + +[I2C] +id_0_i2c_id = 0 #SEN_I2C_ID_1 +id_0_i2c_addr = 0x36 #0x6C >> 1 + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_sc401ai_565.cfg b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_sc401ai_565.cfg new file mode 100755 index 000000000..c3a88213d --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/app/sensor/sen_sc401ai_565.cfg @@ -0,0 +1,28 @@ +[MAP] +path_1 = 1 #Path 1 Enable +path_2 = 0 #Path 2 Disable +path_3 = 0 #Path 3 Disable +path_4 = 0 #Path 4 Disable +path_5 = 0 #Path 5 Disable +path_6 = 0 #Path 6 Disable +path_7 = 0 #Path 7 Disable +path_8 = 0 #Path 8 Disable + +[PRESET] +id_0_expt_time = 10000 #10000us +id_0_gain_ratio = 1000 #1x gain + +[DIRECTION] +id_0_mirror = 1 #mirror +id_0_flip = 1 #flip + +[POWER] +id_0_mclk = 0 #CTL_SEN_CLK_SEL_SIEMCLK +id_0_pwdn_pin = 0xFFFFFFFF #no pwdn pin, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_pin = 0x44 #S_GPIO_4, C_GPIO:+0x0; P_GPIO:+0x20; S_GPIO:+0x40; L_GPIO:0x60 +id_0_rst_time = 1 #1ms +id_0_stable_time = 1 #1ms + +[I2C] +id_0_i2c_id = 0 #SEN_I2C_ID_1 +id_0_i2c_addr = 0x30 #0x60>> 1 \ No newline at end of file diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/application.dtb b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/application.dtb new file mode 100755 index 0000000000000000000000000000000000000000..1a490d938b57d59335663abb0705f06dd8b603bb GIT binary patch literal 293 zcmcb>`|m9S1EVSf1A_&S76H;4Kr9Hv0zeD`Aod+F3zcAmav6(L^NRC}91Nj+W+2TE zV&|2W!~^BxGjl79EFrQWIRzl*M2N>Hr==S*pz@7?N*F+DIe?fK!~p`3eM}%4Y9Ck; zkdMtiV +# inetd will re-read this file whenever it gets that signal. +# +# +#:INTERNAL: Internal services +# It is generally considered safer to keep these off. +echo stream tcp nowait root internal +echo dgram udp wait root internal +#discard stream tcp nowait root internal +#discard dgram udp wait root internal +daytime stream tcp nowait root internal +daytime dgram udp wait root internal +#chargen stream tcp nowait root internal +#chargen dgram udp wait root internal +time stream tcp nowait root internal +time dgram udp wait root internal + +# These are standard services. +# +#ftp stream tcp nowait root /usr/sbin/tcpd in.ftpd +#telnet stream tcp nowait root /sbin/telnetd /sbin/telnetd +#nntp stream tcp nowait root tcpd in.nntpd +#smtp stream tcp nowait root tcpd sendmail -v +# +# Shell, login, exec and talk are BSD protocols. +# +# If you run an ntalk daemon (such as netkit-ntalk) on the old talk +# port, that is, "talk" as opposed to "ntalk", it won't work and may +# cause certain broken talk clients to malfunction. +# +# The talkd from netkit-ntalk 0.12 and higher, however, can speak the +# old talk protocol and can be used safely. +# +#shell stream tcp nowait root /usr/sbin/tcpd in.rshd -L +#login stream tcp nowait root /usr/sbin/tcpd in.rlogind -L +#exec stream tcp nowait root /usr/sbin/tcpd in.rexecd +#talk dgram udp wait root /usr/sbin/tcpd in.talkd +#ntalk dgram udp wait root /usr/sbin/tcpd in.talkd +# +# Pop et al +# Leave these off unless you're using them. +#pop2 stream tcp nowait root /usr/sbin/tcpd in.pop2d +#pop3 stream tcp nowait root /usr/sbin/tcpd in.pop3d +# +# The Internet UUCP service. +# uucp stream tcp nowait uucp /usr/sbin/tcpd /usr/lib/uucp/uucico -l +# +# Tftp service is provided primarily for booting. Most sites +# run this only on machines acting as "boot servers." If you don't +# need it, don't use it. +# +#tftp dgram udp wait nobody /usr/sbin/tcpd in.tftpd +#bootps dgram udp wait root /usr/sbin/in.bootpd in.bootpd +# +# Finger, systat and netstat give out user information which may be +# valuable to potential "system crackers." Many sites choose to disable +# some or all of these services to improve security. +# +#finger stream tcp nowait nobody /usr/sbin/tcpd in.fingerd -w +#systat stream tcp nowait nobody /usr/sbin/tcpd /bin/ps -auwwx +#netstat stream tcp nowait root /bin/netstat /bin/netstat -a +#ident stream tcp nowait root /usr/sbin/in.identd in.identd + +21 stream tcp nowait root ftpd ftpd -w /mnt/sd +69 dgram udp nowait root tftpd tftpd -l -c /home \ No newline at end of file diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_eth b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_eth new file mode 100755 index 000000000..d17d7373a --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_eth @@ -0,0 +1,34 @@ +#!/bin/sh + +NETWORK_SETUP_SCRIPT="/etc/init.d/net_init.sh" + +echo "eth" > /proc/nvt_info/bootts +modprobe ntkimethmac + +#FOR NVTIMETHMAC +ifconfig eth0 down +ifconfig eth0 hw ether 00:80:48:BA:D1:30 +ifconfig eth0 up + +if [ -f "$NETWORK_SETUP_SCRIPT" ]; then + $NETWORK_SETUP_SCRIPT +else + echo "Configuring loopback interface" + ifconfig lo 127.0.0.1 + + ifconfig eth0 192.168.0.3 + + #FOR WiFi Sample + # ifup wlan0 + # hostapd -B -dd /etc/wifiap_wpa2.conf + + #DHCP Deamon + udhcpd -fS /etc/udhcpd.conf & + + #FTP + #inetd & +fi + +echo "eth" > /proc/nvt_info/bootts + +uctrl usys -notify net_init_ok diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifi b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifi new file mode 100755 index 000000000..6b830f91a --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifi @@ -0,0 +1,12 @@ +#!/bin/sh + +modprobe 8189es + +#set essid,psk,... +wpa_supplicant -B -Dwext -d -i wlan0 -c /etc/wpa_supplicant.conf + +#get an ip +udhcpc -i wlan0 + +#check got ip +ifconfig diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifiap b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifiap new file mode 100755 index 000000000..e39d83119 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifiap @@ -0,0 +1,14 @@ +#!/bin/sh + +modprobe 8189es + +echo "Configuring loopback interface" +ifconfig lo 127.0.0.1 + +#FOR WiFi Sample +ifconfig wlan0 up +ifconfig wlan0 192.168.1.3 +hostapd -B -dd /etc/wifiap_wpa2.conf + +#DHCP Deamon +udhcpd -S /etc/udhcpdw.conf diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifiap8189ftv b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifiap8189ftv new file mode 100755 index 000000000..8d65a442d --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/BS_Net_wifiap8189ftv @@ -0,0 +1,14 @@ +#!/bin/sh + +modprobe 8189fs + +echo "Configuring loopback interface 8189fs" +ifconfig lo 127.0.0.1 + +#FOR WiFi Sample +ifconfig wlan0 up +ifconfig wlan0 192.168.1.1 +#hostapd -B -dd /etc/wifiap_wpa2.conf + +#DHCP Deamon +#udhcpd -fS /etc/udhcpdw.conf & diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/K00_Sys b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/K00_Sys new file mode 100755 index 000000000..2fb598b97 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/K00_Sys @@ -0,0 +1,4 @@ +#!/bin/sh + +echo "K00 power off" + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/K99_Sys b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/K99_Sys new file mode 100755 index 000000000..4c4f03bb2 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/K99_Sys @@ -0,0 +1,5 @@ +#!/bin/sh + +umount /mnt/sd +echo "K99 power off end" + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S00_PreReady b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S00_PreReady new file mode 100755 index 000000000..1050566f3 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S00_PreReady @@ -0,0 +1,9 @@ +device_node_create() +{ + if [ ! -e /dev/$1 ]; then mknod /dev/$1 c `cat /sys/class/$1/$1/dev | sed "s/:/\ /g"`; fi +} + +mkdir /var/run/lock + +mkdir /dev/pts +mount -t devpts devpts /dev/pts diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S05_FS_Overlay b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S05_FS_Overlay new file mode 100755 index 000000000..6e4b7771c --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S05_FS_Overlay @@ -0,0 +1,112 @@ +#!/bin/sh +KERVER=`cat /proc/version | awk -F'version ' '{print $2}' | awk -F' ' '{print $1}'` + +overlay_files() +{ + if [ ! -f /mnt/overlay_rw0/rootfs/.fileexisted ]; then + mkdir /mnt/overlay_rw0/rootfs + cp -arf /etc /mnt/overlay_rw0/rootfs + cp -arf /var /mnt/overlay_rw0/rootfs + sync + mkdir /mnt/overlay_rw0/rootfs/lib + cp -arf /lib/modules /mnt/overlay_rw0/rootfs/lib/modules + sync; + touch /mnt/overlay_rw0/rootfs/.fileexisted + sync; + fi + mount /mnt/overlay_rw0/rootfs/etc /etc + mount /mnt/overlay_rw0/rootfs/var /var + mount /mnt/overlay_rw0/rootfs/lib/modules /lib/modules +} + +wait_dev_or_exit() +{ + x=0 + timeout=5 + while [ "$x" -lt "$timeout" -a ! -e $1 ]; do + x=$((x+1)) + sleep .1 + done + if [ "$x" -ge "$timeout" ]; then + echo "[app mount] $1 not found" + exit -1 + fi +} + +echo "/sbin/mdev" > /proc/sys/kernel/hotplug +mdev -s + +if [ "$EMBMEM" == "EMBMEM_EMMC" ]; then + # if /proc/mtd not exist, exit + wait_dev_or_exit /proc/nvt_info/emmc + if [ ! -f /proc/nvt_info/emmc ]; then + echo "[fs overlay] /proc/nvt_info/emmc not ready" + exit -1 + fi + mmcblkpn=`cat /proc/nvt_info/emmc | grep '^rootfs1 ' | awk -F' ' '{print $NF}'`; + mmcblkn=`echo $mmcblkpn | sed 's/.*\(mmcblk.\)p.*/\1/g'` + wait_dev_or_exit /sys/class/block/$mmcblkn/dev + mknod /dev/$mmcblkn b `cat /sys/class/block/$mmcblkn/dev | sed "s/:/\ /g"` + mknod /dev/$mmcblkpn b `cat /sys/class/block/$mmcblkpn/dev | sed "s/:/\ /g"` +else + # if /proc/mtd not exist, exit + if [ ! -f /proc/mtd ]; then + echo "[fs overlay] /proc/mtd not ready" + exit -1 + fi + + # if the partition not found, exit + num=`cat /proc/mtd | grep \"rootfs1\" | awk -F' ' '{print $1}' | tr -d 'mtd' | tr -d ':'`; + if [ -z "$num" ]; then + echo "[fs overlay] no rootfs1 partition" + exit 0 + fi + + mknod /dev/mtdblock$num b `cat /sys/block/mtdblock$num/dev | sed "s/:/\ /g"` +fi + + +if [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_NAND_UBI" ]; then + echo "[fs overlay] ubi mount rootfs1" + ubiattach /dev/ubi_ctrl -m $num + wait_dev_or_exit /dev/ubi1_0 + mount -t ubifs /dev/ubi1_0 /mnt/overlay_rw0; + overlay_files; + sync + echo 1 > /proc/sys/vm/drop_caches +elif [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_SQUASH" ] && [ "$EMBMEM" != "EMBMEM_NONE" ]; then + echo "[fs overlay] squash mount rootfs1" + if [ "$EMBMEM" == "EMBMEM_SPI_NAND" ]; then + ubiattach /dev/ubi_ctrl -m $num + wait_dev_or_exit /dev/ubi1_0 + mount -t ubifs /dev/ubi1_0 /lib/modules; + elif [ "$EMBMEM" == "EMBMEM_EMMC" ]; then + mount -t ext4 /dev/$mmcblkpn /lib/modules; + else + mount -t squashfs /dev/mtdblock$num /lib/modules; + fi + mount /lib/modules/usr/bin/ /usr/bin/; + mount /lib/modules/usr/lib/ /usr/lib/; +elif [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_RAMDISK" ] && [ "$EMBMEM" != "EMBMEM_NONE" ]; then + if [ "$EMBMEM" == "EMBMEM_SPI_NAND" ]; then + echo "[fs overlay] ubi mount rootfs1" + mknod /dev/ubi_ctrl c `cat /sys/class/misc/ubi_ctrl/dev | sed "s/:/\ /g"` + ubiattach /dev/ubi_ctrl -m $num + mknod /dev/ubi0_0 c `cat /sys/class/ubi/ubi0_0/dev | sed "s/:/\ /g"` + wait_dev_or_exit /dev/ubi0_0 + mount -t ubifs /dev/ubi0_0 /lib/modules; + elif [ "$EMBMEM" == "EMBMEM_EMMC" ]; then + echo "[fs overlay] ext4 mount rootfs1" + mount -t ext4 /dev/$mmcblkpn /lib/modules; + else + echo "[fs overlay] squash mount rootfs1" + #echo "mount -t squashfs /dev/mtdblock$num /lib/modules" + mount -t squashfs /dev/mtdblock$num /lib/modules; + fi + mount /lib/modules/usr/bin/ /usr/bin/; + mount /lib/modules/usr/lib/ /usr/lib/; +else + echo "[fs overlay] jffs2 mount rootfs1" + mount -t jffs2 /dev/mtdblock$num /mnt/overlay_rw0 + overlay_files; +fi diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S07_APP_Overlay b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S07_APP_Overlay new file mode 100755 index 000000000..e48625bbe --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S07_APP_Overlay @@ -0,0 +1,64 @@ +#!/bin/sh +wait_dev_or_exit() +{ + x=0 + timeout=5 + while [ "$x" -lt "$timeout" -a ! -e $1 ]; do + x=$((x+1)) + sleep .1 + done + if [ "$x" -ge "$timeout" ]; then + echo "[app overlay] $1 not found" + exit -1 + fi +} + +# if /proc/mtd not exist, exit +if [ ! -f /proc/mtd ]; then + echo "[app overlay] /proc/mtd not ready" + exit -1 +fi + +# if the partition not found, exit +num=`cat /proc/mtd | grep \"app\" | awk -F' ' '{print $1}' | tr -d 'mtd' | tr -d ':'`; +if [ -z "$num" ]; then + echo "[app overlay] no app partition" + exit 0 +fi + +# mount app partition by type +if [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_NAND_UBI" ]; then + echo "[app overlay] ubi mount app" + ubiattach /dev/ubi_ctrl -m $num + wait_dev_or_exit /dev/ubi1_0 + mount -t ubifs /dev/ubi1_0 /mnt/app; +elif [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_SQUASH" ] && [ "$EMBMEM" != "EMBMEM_SPI_NOR" ]; then + echo "[app overlay] squash mount app" + ubiattach /dev/ubi_ctrl -m $num + wait_dev_or_exit /dev/ubi1_0 + mount -t ubifs /dev/ubi1_0 /mnt/app; +elif [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_RAMDISK" ] && [ "$EMBMEM" != "EMBMEM_NONE" ]; then + if [ "$EMBMEM" == "EMBMEM_SPI_NAND" ]; then + echo "[app overlay] ubi mount app" + ubiattach /dev/ubi_ctrl -m $num + mknod /dev/ubi1_0 c `cat /sys/class/ubi/ubi1_0/dev | sed "s/:/\ /g"` + wait_dev_or_exit /dev/ubi1_0 + mount -t ubifs /dev/ubi1_0 /mnt/app; + elif [ "$EMBMEM" == "EMBMEM_EMMC" ]; then + echo "[app overlay] ext4 mount app" + mount -t ext4 /dev/$mmcblkpn /mnt/app; + else + #echo "[app overlay] jffs2 mount app" + #cat /proc/mtd + #ls /dev/mtdblock* + wait_dev_or_exit /dev/mtdblock$num + wait_dev_or_exit /mnt/app + #echo "mount -t jffs2 /dev/mtdblock$num /mnt/app" + mount -t jffs2 /dev/mtdblock$num /mnt/app; + fi +else + echo "[app overlay] jffs2 mount app" + mount -t jffs2 /dev/mtdblock$num /mnt/app; +fi + + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S07_SysInit b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S07_SysInit new file mode 100755 index 000000000..7ece30fb3 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S07_SysInit @@ -0,0 +1,20 @@ +#!/bin/sh + +device_node_create() +{ + mknod /dev/$1 c `cat /sys/class/$1/$1/dev | sed "s/:/\ /g"` +} + +# Setup mdev +echo "fs" > /proc/nvt_info/bootts +echo "/sbin/mdev" > /proc/sys/kernel/hotplug +#modprobe mmc_na51055 +mdev -s + +# Scan for without insert card +if [ ! -f /tmp/.nvt_mounts ]; then + /etc/mdev-script/autosd.sh + rm -rf /tmp/.nvt_mounts; +fi + +echo "fs" > /proc/nvt_info/bootts diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S10_SysInit2 b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S10_SysInit2 new file mode 100755 index 000000000..f2bdc2ac1 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S10_SysInit2 @@ -0,0 +1,161 @@ +#!/bin/sh +KERVER=`cat /proc/version | awk -F'version ' '{print $2}' | awk -F' ' '{print $1}'` +RAMDISK_KO=ON +if [ "${RAMDISK_KO}" == "ON" ]; then +PREFIX="/etc" +else +PREFIX="" +fi + +HUNTING_BOOT_MODE_4G_ONLY=4G_ONLY + +# System Driver Init +#modprobe ehci-hcd +#modprobe xhci_plat_hcd +#modprobe nvt_status +#modprobe nvt_pstore + +HUNTING_BOOT_MODE=`dmesg | grep "Kernel command line" | sed 's/.* hunt_boot_mode=\(.*\) .*/\1/'` + +echo HUNTING_BOOT_MODE=${HUNTING_BOOT_MODE} + + +if [ -f /usr/bin/sf_app ]; then + sf_app & +else + echo "sf_app not found" +fi + +if [ "${HUNTING_BOOT_MODE_4G_ONLY}" = "${HUNTING_BOOT_MODE}" ]; then + +echo "skip insert ko" + +else + +#insmod ${PREFIX}/lib/modules/$KERVER/extra/mcu/drv_sf_i2c_mcu.ko +insmod ${PREFIX}/lib/modules/$KERVER/extra/crypto/cryptodev-linux/cryptodev.ko + +#insmod /lib/modules/$KERVER/vos/kwrap/kwrap.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/comm/nvtmem/nvtmem.ko +#insmod /lib/modules/$KERVER/hdal/kdrv_builtin/kdrv_builtin.ko +#insmod /lib/modules/$KERVER/kernel/fs/fat/fat.ko +#insmod /lib/modules/$KERVER/kernel/fs/fat/vfat.ko +#insmod /lib/modules/$KERVER/extra/fs/exfat/exfat.ko + +if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/comm/kdrv_comm.ko ]]; then +insmod ${PREFIX}/lib/modules/$KERVER/hdal/comm/kdrv_comm.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_gfx2d.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videocapture/kdrv_videocapture.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoprocess/kdrv_videoprocess.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_common/kflow_common.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_gfx/videosprite/nvt_videosprite.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videocapture/kflow_videocapture.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videoprocess/kflow_videoprocess.ko +fi + +# kdrv_gfx2d +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_affine/affine_neon/kdrv_afn_neon.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_affine/kdrv_afn.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_gfx/nvt_gfx.ko + +# kdrv_vdoout +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoout/ide/nvt_ide.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoout/display_obj/kdrv_videoout.ko + +# kflow_videoout +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videoout/unit/kflow_videoout.ko + +# panel device +insmod ${PREFIX}/lib/modules/$KERVER/hdal/display_panel/nvt_dispdev_panel.ko +case "${LCD1}" in + disp_off) + ;; + disp_if8b_lcd1_pw35p00) + insmod /lib/modules/$KERVER/hdal/display_panel/${LCD1}_hx8238d/$LCD1.ko + ;; + *) + if [[ $(echo $LCD1 | grep -c 'ifdsi') == "1" ]]; then + insmod /lib/modules/$KERVER/hdal/kdrv_videoout/dsi/nvt_dsi.ko + fi + insmod ${PREFIX}/lib/modules/$KERVER/hdal/display_panel/${LCD1}/${LCD1}.ko + ;; +esac + +# nvt_h26x +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videocodec/kdrv_h26x.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/nvt_vencrc/nvt_vencrc.ko + +# isf vdoenc +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videoenc/unit/kflow_videoenc.ko + +# isf vdodec +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_videodec/unit/kflow_videodec.ko + +# audio +if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_audioio/audio_common/nvt_audio.ko ]]; then +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_audioio/audio_common/nvt_audio.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_audioio/kdrv_audio/nvt_kdrv_audio.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_audiocapture/unit/kflow_audiocap.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_audioout/unit/kflow_audioout.ko +fi + +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_audioio/audlib_aac/nvt_audlib_aac.ko + +# isf audenc +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_audioenc/unit/kflow_audioenc.ko + +# isf auddec +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kflow_audiodec/unit/kflow_audiodec.ko + +# iq, 3a +#echo "isp_id_list: 0x3, ae_id_list: 0x3, awb_id_list: 0x3, iq_id_list 0x3" +insmod ${PREFIX}/lib/modules/$KERVER/hdal/isp/nvt_isp.ko + +if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/awb/nvt_awb.ko ]]; then +insmod ${PREFIX}/lib/modules/$KERVER/hdal/ae/nvt_ae.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/awb/nvt_awb.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/iq/nvt_iq.ko +fi + +insmod ${PREFIX}/lib/modules/$KERVER/hdal/${SENSOR1}/nvt_${SENSOR1}.ko sen_cfg_path=/mnt/app/sensor/${SENSOR1_CFG}.cfg + +#cv +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_md/kdrv_md.ko + +#fb +if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoout/fbdev/nvt_fb.ko ]]; then +insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbcopyarea.ko +insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbfillrect.ko +insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbimgblt.ko +insmod ${PREFIX}/lib/modules/$KERVER/hdal/kdrv_videoout/fbdev/nvt_fb.ko +fi + +#iio & adc (for keyscan) + +if [[ -f ${PREFIX}/lib/modules/$KERVER/kernel/drivers/iio/industrialio.ko ]]; then +insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/iio/industrialio.ko +fi + +if [[ -f ${PREFIX}/lib/modules/$KERVER/kernel/drivers/iio/adc/nvt_adc.ko ]]; then +insmod ${PREFIX}/lib/modules/$KERVER/kernel/drivers/iio/adc/nvt_adc.ko +fi + +#usb +#if [[ -f ${PREFIX}/lib/modules/$KERVER/hdal/comm/uvcp/nvt_uvcp.ko ]]; then +#insmod ${PREFIX}/lib/modules/$KERVER/hdal/comm/uvcp/nvt_uvcp.ko +#insmod ${PREFIX}/lib/modules/$KERVER/hdal/comm/usb2dev/nvt_usb2dev.ko +#fi + +if [ -f /usr/bin/isp_demon ]; then + /usr/bin/isp_demon +else + echo "isp_demon not found" +fi + +if [ -f /usr/bin/cardv ]; then + cardv & +else + echo "cardv not found" +fi + +fi diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S15_NvtAppInit b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S15_NvtAppInit new file mode 100755 index 000000000..78a14265a --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S15_NvtAppInit @@ -0,0 +1,17 @@ +#!/bin/sh +# System Daemon Run +echo "nvtapp" > /proc/nvt_info/bootts + +inetd + +crond + +#DeviceDiscovery -d & +echo "nvtapp" > /proc/nvt_info/bootts + +# for ISP tool +#echo "run isp_demon" +#/usr/bin/isp_demon + +# disable childless pll +echo d > /proc/nvt_info/nvt_clk/clk_childless diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S25_Net b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S25_Net new file mode 100755 index 000000000..9bb180826 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S25_Net @@ -0,0 +1,60 @@ +#!/bin/sh + +NETWORK_SETUP_SCRIPT="/etc/init.d/net_init.sh" + +SF_BOOT_MODE=1 + +kernel_cmdline=$(cat /proc/cmdline) + +SF_HUNTING_BOOT_MODE=`dmesg | grep -o 'Mode=[0-9]*' | cut -d'=' -f2` + +echo SF_HUNTING_BOOT_MODE=${SF_HUNTING_BOOT_MODE} + +do_wifi_init() +{ + if [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_RTK" ]; then + #/etc/init.d/BS_Net_wifiap8189ftv + if [ "${SF_BOOT_MODE}" = "${SF_HUNTING_BOOT_MODE}" ]; then + echo "Configuring BS_Net_wifiap8189ftv sf start" + /etc/init.d/BS_Net_wifiap8189ftv + else + echo "Configuring BS_Net_wifiap8189ftv sf stop" + fi + elif [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_BRCM" ]; then + modprobe bcmdhd + # TBD + fi +} + +echo "net" > /proc/nvt_info/bootts + +if [ "$NVT_ETHERNET" == "NVT_ETHERNET_NONE" ] && [ "$NVT_SDIO_WIFI" == "NVT_SDIO_WIFI_NONE" ]; then + echo "Without network" +else + if [ "$NVT_SDIO_WIFI" != "NVT_SDIO_WIFI_NONE" ]; then + do_wifi_init; + fi + + if [ "$NVT_ETHERNET" != "NVT_ETHERNET_NONE" ]; then + modprobe ntkimethmac + ifconfig eth0 up + # nvtsystem will generate this network setup script + if [ -f "$NETWORK_SETUP_SCRIPT" ]; then + $NETWORK_SETUP_SCRIPT + else + echo "Configuring loopback interface" + ifconfig lo 127.0.0.1 + if [ "$NVT_DEFAULT_NETWORK_BOOT_PROTOCOL" == "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_SERVER" ]; then + ifconfig eth0 192.168.0.3 + udhcpd -fS /etc/udhcpd.conf & + elif [ "$NVT_DEFAULT_NETWORK_BOOT_PROTOCOL" == "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_CLIENT" ]; then + udhcpc -i %s -p /var/run/udhcpc_%s.pid -T 10 -t 1 -x hostname:$(hostname) & + else + ifconfig eth0 192.168.0.3 + fi + fi + fi +fi + +echo "net" > /proc/nvt_info/bootts +telnetd diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S99_Sysctl b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S99_Sysctl new file mode 100755 index 000000000..625c99fbd --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/S99_Sysctl @@ -0,0 +1,13 @@ +[ -f /etc/sysctl.conf ] && sysctl -p >&- +modprobe drvdump +# coredump setting +# echo 1 > /proc/sys/kernel/core_uses_pid +ulimit -c unlimited +# echo "/var/log/core-%e-%p-%t" > /proc/sys/kernel/core_pattern +# cardv & +# echo 7 4 1 7 > /proc/sys/kernel/printk +# cat /proc/{cardv_pid}/maps for debug purpose +# sleep 0.2 +# cat /proc/$(ps | grep 'cardv' | awk 'NR==1{print $1}')/maps +#cat /proc/$(ps | grep 'sf_app' | awk 'NR==1{print $1}')/maps + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/rcK b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/rcK new file mode 100755 index 000000000..5985ac4e1 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/rcK @@ -0,0 +1,10 @@ +#!/bin/sh +# To run /etc/init.d/S* script +for deinitscript in /etc/init.d/K[0-9][0-9]* +do + if [ -x $deinitscript ] ; + then + echo "[End] $deinitscript" + $deinitscript + fi +done diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/rcS b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/rcS new file mode 100755 index 000000000..7bf1d7eac --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/init.d/rcS @@ -0,0 +1,20 @@ +#!/bin/sh +# source profile_prjcfg on /etc/init.d/rcS (init script cycle) and /etc/profile (after startup cycle) +source /etc/profile_prjcfg + +# fstab devices create +mount -a + +echo "ker" > /proc/nvt_info/bootts +echo "rcS" > /proc/nvt_info/bootts + +# To run /etc/init.d/S* script +for initscript in /etc/init.d/S[0-9][0-9]* +do + if [ -x $initscript ]; then + echo "[Start] $initscript" + $initscript + fi +done + +echo "rcS" > /proc/nvt_info/bootts diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/inittab b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/inittab new file mode 100755 index 000000000..91b3678d7 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/inittab @@ -0,0 +1,93 @@ +# /etc/inittab init(8) configuration for BusyBox +# +# Copyright (C) 1999-2004 by Erik Andersen +# +# +# Note, BusyBox init doesn't support runlevels. The runlevels field is +# completely ignored by BusyBox init. If you want runlevels, use sysvinit. +# +# +# Format for each entry: ::: +# +# : WARNING: This field has a non-traditional meaning for BusyBox init! +# +# The id field is used by BusyBox init to specify the controlling tty for +# the specified process to run on. The contents of this field are +# appended to "/dev/" and used as-is. There is no need for this field to +# be unique, although if it isn't you may have strange results. If this +# field is left blank, it is completely ignored. Also note that if +# BusyBox detects that a serial console is in use, then all entries +# containing non-empty id fields will be ignored. BusyBox init does +# nothing with utmp. We don't need no stinkin' utmp. +# +# : The runlevels field is completely ignored. +# +# : Valid actions include: sysinit, respawn, askfirst, wait, once, +# restart, ctrlaltdel, and shutdown. +# +# Note: askfirst acts just like respawn, but before running the specified +# process it displays the line "Please press Enter to activate this +# console." and then waits for the user to press enter before starting +# the specified process. +# +# Note: unrecognized actions (like initdefault) will cause init to emit +# an error message, and then go along with its business. +# +# : Specifies the process to be executed and it's command line. +# +# Note: BusyBox init works just fine without an inittab. If no inittab is +# found, it has the following default behavior: +# ::sysinit:/etc/init.d/rcS +# ::askfirst:/bin/sh +# ::ctrlaltdel:/sbin/reboot +# ::shutdown:/sbin/swapoff -a +# ::shutdown:/bin/umount -a -r +# ::restart:/sbin/init +# +# if it detects that /dev/console is _not_ a serial console, it will +# also run: +# tty2::askfirst:/bin/sh +# tty3::askfirst:/bin/sh +# tty4::askfirst:/bin/sh +# +# Boot-time system configuration/initialization script. +# This is run first except when booting in single-user mode. +# +::sysinit:sh /etc/init.d/rcS + +# /bin/sh invocations on selected ttys +# +# Note below that we prefix the shell commands with a "-" to indicate to the +# shell that it is supposed to be a login shell. Normally this is handled by +# login, but since we are bypassing login in this case, BusyBox lets you do +# this yourself... +# +# Start an "askfirst" shell on the console (whatever that may be) +# Start a shell whatever it is. +ttyS0::respawn:-/bin/login -f root +#ttyS0::sysinit:/bin/sh +#ttyUSB0::sysinit:/bin/sh +# Start an "askfirst" shell on /dev/tty2-4 +#tty2::askfirst:-/bin/sh +#tty3::askfirst:-/bin/sh +#tty4::askfirst:-/bin/sh + +# /sbin/getty invocations for selected ttys +#tty4::respawn:/sbin/getty 38400 tty5 +#tty5::respawn:/sbin/getty 38400 tty6 + +# Example of how to put a getty on a serial line (for a terminal) +#::respawn:/sbin/getty -L ttyS0 9600 vt100 +#::respawn:/sbin/getty -L ttyS1 9600 vt100 +# +# Example how to put a getty on a modem line. +#::respawn:/sbin/getty 57600 ttyS2 + +# Stuff to do when restarting the init process +::restart:/sbin/init + +# Stuff to do before rebooting +::ctrlaltdel:/sbin/reboot +::shutdown:/etc/init.d/rcK +::shutdown:/bin/umount -a -r +::shutdown:/sbin/swapoff -a diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/localtime b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/localtime new file mode 100755 index 0000000000000000000000000000000000000000..06db2eff71c5715c8736bb36771be2332102dbff GIT binary patch literal 119 ocmWHE%1kq2zyORu5fFv}5Ss /tmp/error.txt +exit 1 +fi +mounted=`mount | grep $1 | wc -l` + +# mounted, assume we umount +if [ $mounted -ge 1 ]; then +echo "R/media/$1" >> /tmp/usbmnt.log +echo "R/media/$1" > /tmp/fifo.1 +if ! umount "/media/$1"; then +exit 1 +fi + +if ! rmdir "/media/$1"; then +exit 1 +fi +# not mounted, lets mount under /media +else +if ! mkdir -p "/media/$1"; then +exit 1 +fi + +if ! mount "/dev/$1" "/media/$1"; then +# failed to mount, clean up mountpoint +if ! rmdir "/media/$1"; then +exit 1 +fi +exit 1 +fi +echo "A/media/$1" >> /tmp/usbmnt.log +echo "A/media/$1" > /tmp/fifo.1 +fi + +exit 0 diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev-script/autoscsi.sh b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev-script/autoscsi.sh new file mode 100755 index 000000000..73ffe4070 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev-script/autoscsi.sh @@ -0,0 +1,258 @@ +#!/bin/sh +ISCSI_CONF_FILE=/etc/event_iscsi.conf + +# the first session path or the current device +G_SESSION_PATH1= + +# values of the configuration file +G_CFG_NAME= +G_CFG_IP= +G_CFG_TARGET= +G_CFG_USER= +G_CFG_PASSWD= +G_CFG_BMOUNT= + +# parsing values in sysfs +G_SYS_PTNUM= +G_SYS_IP= +G_SYS_USER= +G_SYS_PASSWD= +G_SYS_TARGET= + +myecho() +{ + # normal echo + # echo "$*" + # output to file + # echo "$*" >> /autoscsi.log + : +} + +reset_cfg_value() +{ + G_CFG_NAME= + G_CFG_IP= + G_CFG_TARGET= + G_CFG_USER= + G_CFG_PASSWD= + G_CFG_BMOUNT= +} + +get_cfg_setting() +{ + #File content example: + #iscsi_name=iscsi_name + #iscsi_ip=192.168.0.6 + #iscsi_target_name=iqn.2006-03.com.kernsafe:jtv208-PC.RamDisk0 + #iscsi_user= + #iscsi_password= + #iscsi_bmount=0 + + #assume TARGET_TAG=my_iscsi_name + local FIND_IP=$1 + local FIND_TARGET=$2 + + myecho FIND_IP=$FIND_IP + myecho FIND_TARGET=$FIND_TARGET + + reset_cfg_value + + if [ ! -e $ISCSI_CONF_FILE ]; then + myecho $ISCSI_CONF_FILE not found + return 1 + fi + + exec < $ISCSI_CONF_FILE + while read line; do + #myecho $line + TAG_NAME=${line%%=*} + TAG_VAL=${line##*=} + + case "${TAG_NAME}" in + "iscsi_name") + #the following belongs to other groups, check the previous group + if [ ! -z $G_CFG_NAME ] && [ $FIND_IP == $G_CFG_IP ] && [ $FIND_TARGET == $G_CFG_TARGET ]; then + break #break while read line + fi + reset_cfg_value + G_CFG_NAME=$TAG_VAL + ;; + "iscsi_ip") + G_CFG_IP=$TAG_VAL + ;; + "iscsi_target_name") + G_CFG_TARGET=$TAG_VAL + ;; + "iscsi_user") + G_CFG_USER=$TAG_VAL + ;; + "iscsi_password") + G_CFG_PASSWD=$TAG_VAL + ;; + "iscsi_bmount") + G_CFG_BMOUNT=$TAG_VAL + ;; + *) + ;; + esac + done + + # check the last group, it may double check here when we found it before the file end + if [ ! -z $G_CFG_NAME ] && [ $FIND_IP == $G_CFG_IP ] && [ $FIND_TARGET == $G_CFG_TARGET ]; then + myecho G_CFG_NAME=$G_CFG_NAME + myecho G_CFG_IP=$G_CFG_IP + myecho G_CFG_TARGET=$G_CFG_TARGET + myecho G_CFG_USER=$G_CFG_USER + myecho G_CFG_PASSWD=$G_CFG_PASSWD + myecho G_CFG_BMOUNT=$G_CFG_BMOUNT + return 0 + fi + + return 1 +} + +get_session_path1() +{ + #assume $1 is the iscsi device name, such as "sda" + local TARGET_ISCSI_DEV=$1 + local HOST_DIR + local SESSION_PATH1 + local BLOCK_FILE + local BLOCK_DEV + + myecho TARGET_ISCSI_DEV=$TARGET_ISCSI_DEV + + for HOST_DIR in /sys/devices/platform/host*; do + #e.g. HOST_DIR=/sys/devices/platform/host0 + if ! [ -d $HOST_DIR/iscsi_host* ]; then + continue + fi + for SESSION_PATH1 in $HOST_DIR/session*; do + #e.g. SESSION_PATH1=/sys/devices/platform/host0/session1 + if ! [ -d $SESSION_PATH1/target* ]; then + continue + fi + for BLOCK_FILE in $SESSION_PATH1/target*/*\:*/block/*; do + #e.g. BLOCK_FILE=/sys/devices/platform/host0/session1/target0:0:0/0:0:0:0/block/sda + BLOCK_DEV=`echo "$BLOCK_FILE" | sed 's/.*block\///'` + #e.g. BLOCK_DEV=sda + if [ $BLOCK_DEV == $TARGET_ISCSI_DEV ]; then + myecho BLOCK_DEV=$BLOCK_DEV + G_SESSION_PATH1=$SESSION_PATH1 + return 0 + fi + done + done + done + + G_SESSION_PATH1= + return 1 +} + +get_sys_devinfo() +{ + local SESSION_PATH1=$1 + local SESSION_PATH2 + local BLOCK_DEVPATH + local DEV_PARTIPATH + local CONNECTION_PATH + local BLOCK_DEV + local DEV_PARTINAME + + for BLOCK_DEVPATH in $SESSION_PATH1/target*/*\:*/block/*; do + #e.g. BLOCK_DEVPATH=/sys/devices/platform/host2/session3/target2:0:0/2:0:0:0/block/sda + myecho BLOCK_DEVPATH=$BLOCK_DEVPATH + BLOCK_DEV=`echo "$BLOCK_DEVPATH" | sed 's/.*block\///'` + #e.g. BLOCK_DEV=sda + myecho BLOCK_DEV=$BLOCK_DEV + + G_SYS_PTNUM=0 + for DEV_PARTIPATH in $BLOCK_DEVPATH/$BLOCK_DEV*; do + #e.g. DEV_PARTIPATH=/sys/devices/platform/host2/session3/target2:0:0/2:0:0:0/block/sda/sda1 + myecho DEV_PARTIPATH=$DEV_PARTIPATH + + DEV_PARTINAME=`echo "$DEV_PARTIPATH" | sed "s/.*$BLOCK_DEV\///"` + #e.g. DEV_PARTINAME=sda1 + myecho DEV_PARTINAME=$DEV_PARTINAME + let "G_SYS_PTNUM += 1" + done + done + + for SESSION_PATH2 in $SESSION_PATH1/iscsi_session/session*; do + #e.g. SESSION_PATH2=/sys/devices/platform/host1/session2/iscsi_session/session2 + #myecho SESSION_PATH2=$SESSION_PATH2 + G_SYS_USER=`cat $SESSION_PATH2/username` + G_SYS_PASSWD=`cat $SESSION_PATH2/password` + G_SYS_TARGET=`cat $SESSION_PATH2/targetname` + done + + for CONNECTION_PATH in $SESSION_PATH1/connection*/iscsi_connection/connection*\:*; do + #e.g. CONNECTION_PATH=/sys/devices/platform/host1/session2/connection2:0/iscsi_connection/connection2:0 + myecho CONNECTION_PATH=$CONNECTION_PATH + G_SYS_IP=`cat $CONNECTION_PATH/address` + done + + myecho G_SYS_PTNUM=$G_SYS_PTNUM + myecho G_SYS_IP=$G_SYS_IP + myecho G_SYS_USER=$G_SYS_USER + myecho G_SYS_PASSWD=$G_SYS_PASSWD + myecho G_SYS_TARGET=$G_SYS_TARGET + + return 0 +} + +my_umount() +{ + FOLDER=`grep "/dev/$1" /proc/mounts | cut -d ' ' -f 2` + if [ ! -z "$FOLDER" ]; then + umount -l "$FOLDER"; + fi +} + +my_mount() +{ + #assume $1=sda, sdb, ... + local DEV_NAME=$1 + + #set default values + local MOUNT_DEV=/dev/$DEV_NAME + local MOUNT_FOLDER=/mnt/$DEV_NAME + + #if it is iscsi, update the values + get_session_path1 $DEV_NAME + if [ $? = 0 ]; then + #is iscsi device + get_sys_devinfo $G_SESSION_PATH1 + if [ $? = 0 ]; then + get_cfg_setting $G_SYS_IP $G_SYS_TARGET + if [ $? = 0 ]; then + myecho G_SYS_PTNUM=$G_SYS_PTNUM + if [ $G_SYS_PTNUM = 0 ]; then + MOUNT_DEV=/dev/$DEV_NAME + MOUNT_FOLDER=/mnt/iscsi/$G_CFG_NAME + elif [ $G_SYS_PTNUM = 1 ]; then + MOUNT_DEV=/dev/$DEV_NAME$G_SYS_PTNUM + MOUNT_FOLDER=/mnt/iscsi/$G_CFG_NAME + else + myecho Partition Num $G_SYS_PTNUM not supported + return 1 + fi + fi + fi + fi + + myecho MOUNT_DEV=$MOUNT_DEV + myecho MOUNT_FOLDER=$MOUNT_FOLDER + + mkdir -p "${MOUNT_FOLDER}" || return 1 + mount "${MOUNT_DEV}" "${MOUNT_FOLDER}" || return 1 +} + +case "${ACTION}" in +add|"") + my_mount ${MDEV} + ;; +remove) + my_umount ${MDEV} + ;; +esac diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev-script/autosd.sh b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev-script/autosd.sh new file mode 100755 index 000000000..c806018e3 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev-script/autosd.sh @@ -0,0 +1,240 @@ +#!/bin/sh + +MNT_PATH=/mnt + +MNT_DIR= +SD1_DIR=sd +SD2_DIR=sd2 +SD3_DIR=sd3 +EMMC1_DIR=emmc1 +EMMC2_DIR=emmc2 +CACHE_DIR=cache +DRIVE_A="" +DRIVE_B="" + +my_umount() +{ + FOLDER=`grep "/dev/$1" /proc/mounts | cut -d ' ' -f 2` + if [ ! -z "$FOLDER" ]; then + umount -l "$FOLDER"; + fi +} + +my_mount() +{ + MMCBUSNUM=`echo $DEVPATH | cut -d '/' -f 4` + if [ "$MMCBUSNUM" == "nt96660_mmc.0" ] || [ "$MMCBUSNUM" == "f0420000.mmc" ]; then + MNT_DIR=$SD1_DIR + elif [ "$MMCBUSNUM" == "nt96660_mmc.1" ] || [ "$MMCBUSNUM" == "f0500000.mmc" ]; then + MNT_DIR=$SD2_DIR + else + MNT_DIR=$SD3_DIR + fi + + if [ -b /dev/$1 ]; then + MOUNTDEV="/dev/$1" + if [ -b "/dev/$1p1" ]; then + MOUNTDEV="/dev/$1p1" + fi + fi + + time_offset_sig=`date +%z | cut -c 1` + time_offset_h=`date +%z | cut -c 2-3` + time_offset_m=`date +%z | cut -c 4-5` + time_offset=`expr $local_time - $utc_time` + if [ $time_offset_sig == + ]; then + time_offset_sig=""; + fi + time_offset_total_m=$time_offset_sig`expr $time_offset_h \* 60 + $time_offset_m` + + mkdir -p "${MNT_PATH}/${MNT_DIR}" || exit 1 + fat_type=`blkid "$MOUNTDEV" | awk -F'TYPE=' '{print $NF}'` + if [ "${fat_type}" == "\"vfat\"" ]; then + if ! mount -o usefree,dirsync,time_offset=$time_offset_total_m "$MOUNTDEV" "${MNT_PATH}/${MNT_DIR}" 2>&1 | tee -a /tmp/mountstat; then + echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts + exit 1 + fi + elif [ "${fat_type}" == "\"exfat\"" ]; then + if ! mount -t exfat "$MOUNTDEV" "${MNT_PATH}/${MNT_DIR}" 2>&1 | tee -a /tmp/mountstat; then + echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts + continue + fi + else + echo "$MOUNTDEV FAIL" >> /tmp/.nvt_mounts + exit 1 + fi +} + +check_mmc_ready() +{ + MMCBUSPATH="/sys/bus/mmc/devices/" + x=0 + timeout=100 + while [ "$x" -lt "$timeout" -a ! -d $MMCBUSPATH ]; do + x=$((x+1)) + sleep .1 + done + if [ "$x" -ge "$timeout" ]; then + return -1; + fi + return 0; +} + +if [ -z $DEVPATH ]; then + # This is for boot stage handling + MMCBUSPATH="/sys/bus/mmc/devices/" + check_mmc_ready + if [ $? != 0 ]; then + exit; + fi + MMCDEVLIST=`ls $MMCBUSPATH` + time_offset_sig=`date +%z | cut -c 1` + time_offset_h=`date +%z | cut -c 2-3` + time_offset_m=`date +%z | cut -c 4-5` + time_offset=`expr $local_time - $utc_time` + if [ $time_offset_sig == + ]; then + time_offset_sig=""; + fi + time_offset_total_m=$time_offset_sig`expr $time_offset_h \* 60 + $time_offset_m` + + for n in $MMCDEVLIST + do + # Check if it is not SD device + SD_TYPE=`cat $MMCBUSPATH/$n/type` + if [ $SD_TYPE == SDIO ]; then + continue + fi + + if [ $SD_TYPE == MMC ]; then + # To check if it's the emmc storage device + if [ -f $MMCBUSPATH/$n/bga ]; then + BGA=`cat $MMCBUSPATH/$n/bga` + if [ 1 == $BGA ]; then + # Get the block device name + BLOCKDEV=`ls $MMCBUSPATH/$n/block` + + # Check if device is mounted + MOUNTED=`grep $BLOCKDEV /proc/mounts` + if [ ! -z "$MOUNTED" ]; then + continue + fi + + if [ "$NVT_ROOTFS_TYPE" == "NVT_ROOTFS_TYPE_EMMC" ]; then + if [ -b "/dev/${BLOCKDEV}p2" ]; then + if ! mount -t vfat /dev/${BLOCKDEV}p2 /mnt/${CACHE_DIR}; then + echo yes | mkfs.vfat /dev/${BLOCKDEV}p2; + if ! mount -t vfat /dev/${BLOCKDEV}p2 /mnt/${CACHE_DIR}; then + exit 1; + fi + fi + fi + if [ -b "/dev/${BLOCKDEV}p5" ]; then + if ! mount -t ext4 /dev/${BLOCKDEV}p5 /mnt/${EMMC1_DIR}; then + echo yes | mkfs.ext4 /dev/${BLOCKDEV}p5; + if ! mount -t ext4 /dev/${BLOCKDEV}p5 /mnt/${EMMC1_DIR}; then + exit 1; + fi + fi + fi + if [ -b "/dev/${BLOCKDEV}p6" ]; then + if ! mount -t ext4 /dev/${BLOCKDEV}p6 /mnt/${EMMC2_DIR}; then + echo yes | mkfs.ext4 /dev/${BLOCKDEV}p6; + if ! mount -t ext4 /dev/${BLOCKDEV}p6 /mnt/${EMMC2_DIR}; then + exit 1; + fi + fi + fi + else + # Using fdisk to check if it needs to be partitioned + if [ -f /etc/autofdisk.sh ]; then + mknod /dev/${BLOCKDEV} b `cat /sys/block/${BLOCKDEV}/dev | sed "s/:/\ /g"` + /etc/autofdisk.sh ${BLOCKDEV} + if [ $? != 0 ]; then + echo -e "\e[1;31m\rUpdate rootfs failed. #1\r\e[0m" + exit 1; + fi + fi + sync + sleep 1 + if [ -b "/dev/${BLOCKDEV}p1" ]; then + if ! mount -t ext4 /dev/${BLOCKDEV}p1 /mnt/${EMMC1_DIR}; then + echo yes | mkfs.ext4 /dev/${BLOCKDEV}p1; + if ! mount -t ext4 /dev/${BLOCKDEV}p1 /mnt/${EMMC1_DIR}; then + exit 1; + fi + fi + fi + if [ -b "/dev/${BLOCKDEV}p2" ]; then + if ! mount -t ext4 /dev/${BLOCKDEV}p2 /mnt/${EMMC2_DIR}; then + echo yes | mkfs.ext4 /dev/${BLOCKDEV}p2; + if ! mount -t ext4 /dev/${BLOCKDEV}p2 /mnt/${EMMC2_DIR}; then + exit 1; + fi + fi + fi + fi + fi + fi + continue + fi + + # Get the block device name + BLOCKDEV=`ls $MMCBUSPATH/$n/block` + # Check if device is mounted + MOUNTED=`grep $BLOCKDEV /proc/mounts` + + # Create folder + if [ ! -z `echo $n | grep mmc0` ]; then + MNT_DIR=$SD1_DIR + elif [ ! -z `echo $n | grep mmc1` ]; then + MNT_DIR=$SD2_DIR + else + MNT_DIR=$SD3_DIR + fi + + if [ ! -z "$MOUNTED" ]; then + continue + fi + + # Check if /dev/mmcblk* exists + if [ -b /dev/$BLOCKDEV ]; then + MOUNTDEV="/dev/$BLOCKDEV" + if [ -b "/dev/${BLOCKDEV}p1" ]; then + MOUNTDEV="/dev/${BLOCKDEV}p1" + fi + else + continue + fi + + # Inserted but can't be mounted + fat_type=`blkid "$MOUNTDEV" | awk -F'TYPE=' '{print $NF}'` + if [ "${fat_type}" == "\"vfat\"" ]; then + if ! mount -o usefree,dirsync,time_offset=$time_offset_total_m "$MOUNTDEV" "${MNT_PATH}/${MNT_DIR}" 2>&1 | tee -a /tmp/mountstat; then + echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts + continue + fi + elif [ "${fat_type}" == "\"exfat\"" ]; then + if ! mount -t exfat "$MOUNTDEV" "${MNT_PATH}/${MNT_DIR}" 2>&1 | tee -a /tmp/mountstat; then + echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts + continue + fi + else + echo "Unkown SD type!!!" + echo "$MOUNTDEV $MNT_PATH/$MNT_DIR ignore defaults 0 0" >> /tmp/.nvt_mounts + continue + fi + + done + touch /tmp/.nvt_mounts +else + # This is for booted up stage + case "${ACTION}" in + add|"") + my_umount ${MDEV} + my_mount ${MDEV} + ;; + remove) + my_umount ${MDEV} + ;; + esac +fi diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev.conf b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev.conf new file mode 100755 index 000000000..e1b97432c --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/mdev.conf @@ -0,0 +1,24 @@ +# +# This is a sample mdev.conf +# + +# Provide user, group, and mode information for devices. If a regex matches +# the device name provided by sysfs, use the appropriate user:group and mode +# instead of the default 0:0 660. +# +# Syntax: +# [-]devicename_regex user:group mode [=path]|[>path]|[!] [@|$|*cmd args...] +# [-]$ENVVAR=regex user:group mode [=path]|[>path]|[!] [@|$|*cmd args...] +# [-]@maj,min[-min2] user:group mode [=path]|[>path]|[!] [@|$|*cmd args...] +# +# [-]: do not stop on this match, continue reading mdev.conf +# =: move, >: move and create a symlink +# !: do not create device node +# @|$|*: run@cmd if $ACTION=add, $cmd if $ACTION=remove, *cmd in all cases + +# support module loading on hotplug +$MODALIAS=.* root:root 660 @modprobe "$MODALIAS" + +#mmcblk[0-9]p[0-9] root:root 660 */etc/mdev-script/autosd.sh +mmcblk[0-2] root:root 660 */etc/mdev-script/autosd.sh +#sd[a-z] root:root 660 */etc/mdev-script/autoscsi.sh diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/network/interfaces b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/network/interfaces new file mode 100755 index 000000000..088932e61 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/network/interfaces @@ -0,0 +1,27 @@ +# Configure Loopback +auto lo +iface lo inet loopback + +# Configure eth0, dhcp client +auto eth0 +iface eth0 inet dhcp + +# Configure wlan0, dhcp client +#auto wlan0 +#iface wlan0 inet dhcp + +# Configure wlan0, fix ip +auto wlan0 +iface wlan0 inet static +address 192.168.1.2 +netmask 255.255.255.0 + +# Configure eth0 +#auto eth0 +#iface eth0 inet static + #address 192.168.0.2 + #netmask 255.255.255.0 + #gateway 192.168.0.1 + + + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/passwd b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/passwd new file mode 100755 index 000000000..bcaab647a --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/passwd @@ -0,0 +1 @@ +root::0:0:root:/root:/bin/sh diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/profile b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/profile new file mode 100755 index 000000000..365a33844 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/profile @@ -0,0 +1,82 @@ +# /etc/profile: system-wide .profile file for the Bourne shell (sh(1)) +# and Bourne compatible shells (bash(1), ksh(1), ash(1), ...). + +# source profile_prjcfg on /etc/init.d/rcS (init script cycle) and /etc/profile (after startup cycle) +source /etc/profile_prjcfg +export PATH="/usr/bin:/usr/sbin:/usr/local/bin:/usr/local/sbin:/bin:/sbin" +export LD_LIBRARY_PATH="/lib:/usr/local/lib:/usr/lib" +export TERMINFO=/usr/share/terminfo +#export LD_PRELOAD="libnvtlibc.so" + +if [ -f /etc/hostname ]; then + /bin/hostname -F /etc/hostname +fi + +# coredump setting +echo 1 > /proc/sys/kernel/core_uses_pid +ulimit -c unlimited +echo "/var/log/core-%e-%p-%t" > /proc/sys/kernel/core_pattern + +export HOSTNAME=`/bin/hostname` + +export PS1='\u@\h:\w$ ' + +echo "$HOSTNAME Linux shell..." + +alias camname='cardv sys camname' +alias cammode='cardv sys cammode' +alias imgsize='cardv sys imgsize' +alias videosize='cardv sys videosize' +alias videolen='cardv sys videolen' +alias flashled='cardv sys flashled' +alias nightmode='cardv sys nightmode' +alias multishot='cardv sys multishot' +alias pirsw='cardv sys pirsw' +alias pirsen='cardv sys pirsen' +alias pirdelay='cardv sys pirdelay' +alias timelapse='cardv sys timelapse' +alias worktime='cardv sys worktime' +alias dateauto='cardv sys dateauto' +alias datestyle='cardv sys datestyle' +alias campwd='cardv sys campwd' +alias battype='cardv sys battype' +alias sdloop='cardv sys sdloop' +alias rtcset='cardv sys rtcset' +alias gprsmode='cardv sys gprsmode' +alias sendmaxnum='cardv sys sendmaxnum' +alias sendpicsize='cardv sys sendpicsize' +alias sendphoto='cardv sys sendphoto' +alias sendvideo='cardv sys sendvideo' +alias piccount='cardv sys piccount' +alias dailyreport='cardv sys dailyreport' +alias dailyreporttest='cardv sys dailyreporttest' +alias simautomatch='cardv sys simautomatch' +alias simpinflag='cardv sys simpinflag' +alias simpinset='cardv sys simpinset' +alias sim4gapn='cardv sys sim4gapn' +alias sim4gusername='cardv sys sim4gusername' +alias sim4gpsw='cardv sys sim4gpsw' +alias imei='cardv sys imei' +alias modulever='cardv sys modulever' +alias modulesubver='cardv sys modulesubver' +alias gpssw='cardv sys gpssw' +alias latitude='cardv sys latitude' +alias longitude='cardv sys longitude' +alias webip='cardv sys webip' +alias acmip='cardv sys acmip' +alias debugmode='cardv sys debugmode' +alias autooffsw='cardv sys autooffsw' +alias autoofftime='cardv sys autoofftime' +alias qlogsw='cardv sys qlogsw' +alias rawsw='cardv sys rawsw' +alias batterysw='cardv sys batterysw' +alias state='cardv sys state' +alias reset='cardv sys reset' +alias mcupara='cardv sys mcupara' +alias setusbmuxs='cardv sys setusbmuxs' +alias 4gusbboot='cardv sys 4gusbboot' +alias ftpsw='cardv sys ftpsw' +alias ftpset='cardv sys ftpset' +alias ftpsset='cardv sys ftpsset' +alias stampsw='cardv sys stampsw' +alias gprssw='cardv sys gprssw' \ No newline at end of file diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/resolv.conf b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/resolv.conf new file mode 100755 index 000000000..20227dbbc --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/resolv.conf @@ -0,0 +1,2 @@ +nameserver 192.168.0.1 + diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/services b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/services new file mode 100755 index 000000000..9fef63c91 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/services @@ -0,0 +1,14 @@ +# Network services, Internet style +# +# Note that it is presently the policy of IANA to assign a single well-known +# port number for both TCP and UDP; hence, officially ports have two entries +# even if the protocol doesn't support UDP operations. +# +# Updated from http://www.iana.org/assignments/port-numbers and other +# sources like http://www.freebsd.org/cgi/cvsweb.cgi/src/etc/services . +# New ports will be added on request if they have been officially assigned +# by IANA and used in the real-world or are needed by a debian package. +# If you need a huge list of used numbers please install the nmap package. + +ntp 123/tcp +ntp 123/udp # Network Time Protocol diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/sysctl.conf b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/sysctl.conf new file mode 100755 index 000000000..1ce3a65f4 --- /dev/null +++ b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/sysctl.conf @@ -0,0 +1,68 @@ +# +# /etc/sysctl.conf - Configuration file for setting system variables +# + +#kernel.domainname = example.com + +# Uncomment the following to stop low-level messages on console +#kernel.printk = 3 4 1 3 + +##############################################################3 +# Functions previously found in netbase +# + +# Uncomment the next two lines to enable Spoof protection (reverse-path filter) +# Turn on Source Address Verification in all interfaces to +# prevent some spoofing attacks +#net.ipv4.conf.default.rp_filter=1 +#net.ipv4.conf.all.rp_filter=1 + +# Uncomment the next line to enable TCP/IP SYN cookies +# See http://lwn.net/Articles/277146/ +# Note: This may impact IPv6 TCP sessions too +#net.ipv4.tcp_syncookies=1 + +# Uncomment the next line to enable packet forwarding for IPv4 +#net.ipv4.ip_forward=1 + +# Uncomment the next line to enable packet forwarding for IPv6 +# Enabling this option disables Stateless Address Autoconfiguration +# based on Router Advertisements for this host +#net.ipv6.conf.all.forwarding=1 + + +################################################################### +# Additional settings - these settings can improve the network +# security of the host and prevent against some network attacks +# including spoofing attacks and man in the middle attacks through +# redirection. Some network environments, however, require that these +# settings are disabled so review and enable them as needed. +# +# Do not accept ICMP redirects (prevent MITM attacks) +#net.ipv4.conf.all.accept_redirects = 0 +#net.ipv6.conf.all.accept_redirects = 0 +# _or_ +# Accept ICMP redirects only for gateways listed in our default +# gateway list (enabled by default) +# net.ipv4.conf.all.secure_redirects = 1 +# +# Do not send ICMP redirects (we are not a router) +#net.ipv4.conf.all.send_redirects = 0 +# +# Do not accept IP source route packets (we are not a router) +#net.ipv4.conf.all.accept_source_route = 0 +#net.ipv6.conf.all.accept_source_route = 0 +# +# Log Martian Packets +#net.ipv4.conf.all.log_martians = 1 +# + +kernel.panic=10 +kernel.panic_on_oops=0 + +vm.min_free_kbytes=1500 +vm.vfs_cache_pressure=300 +vm.dirty_writeback_centisecs=100 +vm.dirty_bytes=5000000 +vm.dirty_background_bytes=5000000 +vm.dirty_expire_centisecs=300 diff --git a/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/timezone/localtime b/BSP/root-fs/rootfs/etc_Model/etc_565_HUNTING_EVB_LINUX_4G_S550/timezone/localtime new file mode 100755 index 0000000000000000000000000000000000000000..06db2eff71c5715c8736bb36771be2332102dbff GIT binary patch literal 119 ocmWHE%1kq2zyORu5fFv}5Ss +/////////////////////////////////////////////////////////////////////////////// + +//IO +/* +[PinmuxCfg.c] +pinmux + +[GpioMapping.c] +cgpio x32 (Storage) +pgpio x64 (Peripheral) +sgpio x30 (SENSOR) +lgpio x28 (LCD) +dgpio x9 (Dedicated) +pwm x20 +pwm_ccnt x3 + +[VoltageDet.c] +adc x8 + +[SerialComm.c] +i2c x2 x2 +sif x1 x6 +csi x2 x4 +lvds x1 x10 +spi x3 +uart x2 +*/ + + +extern DX_OBJECT gDevLCD; +extern DX_OBJECT gDevPowerBATT; +extern DX_OBJECT gDevPowerDC; +extern DX_OBJECT gDevEmbMem0; +extern DX_OBJECT gDevEmbMem1; +extern DX_OBJECT gDevEmbMem2; +extern DX_OBJECT gDevEmbMem3; +extern DX_OBJECT gDevEmbMem4; +extern DX_OBJECT gDevEmbMem5; +extern DX_OBJECT gDevEmbMem6; +extern DX_OBJECT gDevEmbMem7; +extern DX_OBJECT gDevEmbMem8; +extern DX_OBJECT gDevCARD1; +extern DX_OBJECT gDevCARD3; +extern DX_OBJECT gDevUSB; +#if _TODO +extern DX_OBJECT gDevTV; +extern DX_OBJECT gDevLCD2; +extern DX_OBJECT gDevHDMI; +extern DX_OBJECT gDevSnd; +extern DX_OBJECT gDevLED; +#endif + + +DX_HANDLE Dx_GetObject(UINT32 DxClassType) // Query device object +{ + UINT32 hDevice = 0; + + switch (DxClassType & DX_CLASS_MASK) { + + //external device + case DX_CLASS_DISPLAY_EXT: + #if !defined(_Disp_VIRTUAL_LCD1_OFF_) + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_LCD) { + hDevice = (UINT32)(&gDevLCD); + } + #endif + break; + case DX_CLASS_POWER_EXT: + #if defined(_POWER_BATT_) + hDevice = (UINT32)(&gDevPowerBATT); + #elif defined(_POWER_DC_) + hDevice = (UINT32)(&gDevPowerDC); + #else + hDevice = 0; + DBG_ERR("Require a POWER EXT device!\r\n"); + #endif + break; + case DX_CLASS_STORAGE_EXT: + #if (!defined(_EMBMEM_NONE_)) && (!defined(_EMBMEM_UITRON_OFF_)) + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM0) { + hDevice = (UINT32)(&gDevEmbMem0); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM1) { + hDevice = (UINT32)(&gDevEmbMem1); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM2) { + hDevice = (UINT32)(&gDevEmbMem2); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM3) { + hDevice = (UINT32)(&gDevEmbMem3); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM4) { + hDevice = (UINT32)(&gDevEmbMem4); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM5) { + hDevice = (UINT32)(&gDevEmbMem5); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM6) { + hDevice = (UINT32)(&gDevEmbMem6); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM7) { + hDevice = (UINT32)(&gDevEmbMem7); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM8) { + hDevice = (UINT32)(&gDevEmbMem8); + } + #endif + #if !defined(_CARD1_NONE_) + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_CARD1) { + hDevice = (UINT32)(&gDevCARD1); + } + #endif + #if !defined(_CARD3_NONE_) + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_CARD3) { + hDevice = (UINT32)(&gDevCARD3); + } + #endif + break; + case DX_CLASS_USB_EXT: + hDevice = (UINT32)(&gDevUSB); + break; +#if _TODO + case DX_CLASS_AUDIO_EXT: + #if (defined(_AUDIO_ON_)) + hDevice = (UINT32)(&gDevSnd); + #endif + break; + case DX_CLASS_SENSOR_EXT: + break; + case DX_CLASS_INPUT_EXT: + break; + case DX_CLASS_STATUS_EXT: + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_OUTLED) { +#if (defined(_MODEL_IPCAM1_EVB_) || defined(_MODEL_IPCAM2_EVB_)) +#elif (defined(_MODEL_DVCAM1_EVB_) || defined(_MODEL_DVCAM2_EVB_)) + hDevice = (UINT32)(&gDevLED); +#endif + } + break; +#endif + } + + if (hDevice == 0) { + DBG_ERR("[Dx] GetObject %08x failed\r\n", DxClassType); + } + return (DX_HANDLE)hDevice; +} + +UINT8 *Dx_GetModelExtCfg(MODELEXT_TYPE type, MODELEXT_HEADER **header) +{ +#if _TODO + UINT8 *p_modelext = NULL; +#if defined(_MODELEXT_BUILT_IN_ON_) +#define LABEL_NAME(_name_) _name_ + extern char LABEL_NAME(_section_modelext_info_addr)[]; + extern char LABEL_NAME(_section_modelext_info_size)[]; + static BOOL bInit = FALSE; + if (!bInit) { + MODELEXT_HEADER *header; + MODELEXT_INFO *pData; + pData = (MODELEXT_INFO *)modelext_get_cfg((unsigned char *)_section_modelext_info_addr, MODELEXT_TYPE_INFO, &header); + if (pData == NULL) { + DBG_FATAL("MODELEXT_INFO is null, call by = 0x%08X\r\n", __CALL__ - 8); + return NULL; + } + pData->ext_bin_length = (UINT32)_section_modelext_info_size; + bInit = TRUE; + } + UINT8 *p_modelext = (UINT8 *)modelext_get_cfg((unsigned char *)_section_modelext_info_addr, type, header); //_TODO: VOS need nvt_mem converting address +#else + UINT8 *p_modelext = (UINT8 *)modelext_get_cfg((unsigned char *)_BOARD_IPC_ADDR_, type, header); //_TODO: VOS need nvt_mem converting address +#endif + + if (p_modelext == NULL || *header == NULL) { + DBG_FATAL("MODELEXT_TYPE = %d is null\r\n", type); + return NULL; + } + + return p_modelext; +#else + return 0; +#endif +} + +void Install_DrvExt(void) +{ + #if defined(_MCU_ENABLE_) + MCUCtrl_InstallID(); + MCU2Ctrl_InstallID(); + #endif +} + diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h new file mode 100755 index 000000000..dd8b3c563 --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h @@ -0,0 +1,18 @@ +#ifndef _DXCFG_H +#define _DXCFG_H + +//#define _Disp_VIRTUAL_LCD1_OFF_ +//#define _AUDIO_ON_ +//#define _EMBMEM_NONE_ +//#define _EMBMEM_UITRON_OFF_ +//#define _CARD1_NONE_ +//#define _CARD3_NONE_ +#define _POWER_DC_ +//#define _POWER_BATT_ +//#define _MCU_ENABLE_ + +#define USB_CHARGE_FUNCTION DISABLE +#define TV_SWITCH_FUNCTION DISABLE +#define GPIO_DUMMYLOAD_FUNCTION DISABLE + +#endif diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxDisplay_LCD.c b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxDisplay_LCD.c new file mode 100755 index 000000000..8429d53bf --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxDisplay_LCD.c @@ -0,0 +1,667 @@ +#include "kwrap/type.h" +#include "Dx.h" +#include "DxCommon.h" +#include "DxDisplay.h" +#include "IOCfg.h" +#include "hdal.h" +#include "vendor_videoout.h" +#include "GxVideo.h" +#include "Utility/SwTimer.h" +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDisp +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +//EVB default is _Disp_IF8B_LCD1_PW35P00_HX8238D_ +#define LCD_MAX_W ALIGN_CEIL_16(240) //device w of DISP_LCDMODE_xxx, to support rotate, it must align to 16 +#define LCD_MAX_H ALIGN_CEIL_16(320) //device h of DISP_LCDMODE_xxx, to support rotate, it must align to 16 + +#define LCD_ASPECT_W 3 +#define LCD_ASPECT_H 4 + +#define DISP_DUAL DISABLE + +#if !defined(_Disp_VIRTUAL_LCD1_OFF_) + +#define LCDMODE 0 + +//Configure +#define CFG_IDE_DMA_HIGH DISABLE //Enable will cause IPE bandwith not enough + +// Local Variables +static UINT32 g_LCDDout = 0; //current dout +static UINT32 g_LCDMode = 0; //current mode +static UINT32 g_LCDLastMode = 0; //current mode +static UINT32 g_LCDEnable = FALSE; //not yet enable +static UINT32 g_LCDSleep = FALSE; +#define DRVLCD_BRT_LEVEL_MAX 10 +#define DRVLCD_BRT_LEVEL_INIT 5 +static BOOL g_LCDBacklightEn = FALSE; +static INT32 g_LCDBacklightLvl = DRVLCD_BRT_LEVEL_INIT; + +static UINT32 g_LCDDual = FALSE; + +// LCD control object +static BOOL g_bLCDWaitTurnOnFinish = FALSE; + +static UINT32 g_localMode = 0; //new mode +static USIZE *pCurrentSize = 0; //return size + +//public func +static UINT32 DrvLCDGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +static UINT32 DrvLCDSetcfgs(UINT32 CfgID, UINT32 Param1); // Set Config Setting +static UINT32 DrvLCDInit(void *pInitParam); // Set Init Parameters +static UINT32 DrvLCDOpen(void); // Common Constructor +static UINT32 DrvLCDClose(void); // Common Destructor +static UINT32 DrvLCDState(UINT32 StateID, UINT32 Value); // General Properties +static UINT32 DrvLCDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +static UINT32 DrvLCDCommand(CHAR *pcCmdStr); //General Command Console + +//internal func +static void DrvLCD_TurnOn(void); +static void DrvLCD_TurnOn_WaitFinish(void); +static void DrvLCD_TurnOff(void); +static void DrvLCD_Dump(void); +static void DrvLCD_SleepEnter(void); +static void DrvLCD_SleepLeave(void); + +static void GPIOMap_TurnOnLCDBacklight(void); +static void GPIOMap_TurnOffLCDBacklight(void); +static void GPIOMap_SetLCDBacklightBrightLevel(INT32 uiLevel); +static void GPIOMap_AdjustLCDBacklight(UINT32 uiAdjValue); +static BOOL GPIOMap_IsLCDBacklightOn(void); +static void GPIOMap_DumpBacklight(void); + +static void GPIOMap_TurnOnLCDPower(void); +static void GPIOMap_TurnOffLCDPower(void); +static void GPIOMap_LCDReset(void); +//static BOOL GPIOMap_IsLCDPowerOn(void); + +//dx object +DX_OBJECT gDevLCD = { + DXFLAG_SIGN, + DX_CLASS_DISPLAY_EXT | DX_TYPE_LCD, + DISPLAY_VER, + "Display_LCD", + 0, 0, 0, 0, + DrvLCDGetcaps, + DrvLCDSetcfgs, + DrvLCDInit, + DrvLCDOpen, + DrvLCDClose, + DrvLCDState, + DrvLCDControl, + DrvLCDCommand, + 0, +}; + +static UINT32 DrvLCDGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID & 0x0000ffff) { + case DISPLAY_CAPS_BASE: + v = DISPLAY_BF_BACKLIGHT; + break; + case DISPLAY_CAPS_DEFMODE: + v = LCDMODE; + break; +#if 0 + case DISPLAY_CAPS_MODEINFO: { +// int mode = (CapID & 0xffff0000) >> 16; + ISIZE *pModeInfo = (ISIZE *)Param1; + #if 0 + _DrvLCDHookDout(g_LCDDout); + pDev->SEL.SET_LCDMODE.Mode = mode; + pObj->devCtrl(DISPDEV_SET_LCDMODE, pDev); + pDev->SEL.GET_PREDISPSIZE.DevID = DISPDEV_ID_PANEL; + pObj->devCtrl(DISPDEV_GET_PREDISPSIZE, pDev); + if (pModeInfo) { + pModeInfo->w = pDev->SEL.GET_PREDISPSIZE.uiBufWidth; + pModeInfo->h = pDev->SEL.GET_PREDISPSIZE.uiBufHeight; + } + #else + pModeInfo->w = 960; + pModeInfo->w = 240; + DBG_ERR("need porting\r\n"); + #endif + } + break; +#endif + case DISPLAY_CAPS_MAXSIZE: { + ISIZE *pSizeInfo = (ISIZE *)Param1; + if (pSizeInfo) { + pSizeInfo->w = LCD_MAX_W; + pSizeInfo->h = LCD_MAX_H; + } + } + break; + case DISPLAY_CAPS_ASPECT: { + ISIZE *pAspectInfo = (ISIZE *)Param1; + if (pAspectInfo) { + pAspectInfo->w = LCD_ASPECT_W; + pAspectInfo->h = LCD_ASPECT_H; + } + } + break; + default: + break; + } + return v; +} + +static UINT32 DrvLCDSetcfgs(UINT32 CfgID, UINT32 Param1) // Set Config Setting +{ + switch (CfgID) { + case DISPLAY_CFG_MODE: + DBG_IND("set mode %08x\r\n", Param1); + g_LCDLastMode = Param1; + break; + case DISPLAY_CFG_DOUT: + g_LCDDout = Param1; + break; + case DISPLAY_CFG_DUAL: + g_LCDDual = Param1; + break; + case DISPLAY_CFG_INFOBUF: + pCurrentSize = (USIZE *)Param1; + break; + default: + break; + } + return DX_OK; +} + +static UINT32 DrvLCDInit(void *pInitParam) // Set Init Parameters +{ + DBG_FUNC_BEGIN("\r\n"); + + g_LCDLastMode = DrvLCDGetcaps(DISPLAY_CAPS_DEFMODE, 0); + + return DX_OK; +} + +static UINT32 DrvLCDOpen(void) // Common Constructor +{ + DBG_FUNC_BEGIN("\r\n"); + + + DBG_IND("LCD dout by IDE%d\r\n", g_LCDDout + 1); + + GPIOMap_TurnOnLCDPower(); + GPIOMap_LCDReset(); + + g_localMode = g_LCDLastMode; + DBG_IND("open mode %08x\r\n", g_localMode); + DrvLCD_TurnOn(); + + g_LCDEnable = TRUE; + + return DX_OK; +} + +static UINT32 DrvLCDClose(void) // Common Destructor +{ + DBG_FUNC_BEGIN("\r\n"); + + DrvLCD_TurnOff(); + + // Panel enter sleep mode + GPIOMap_TurnOffLCDPower(); + + g_LCDLastMode = g_LCDMode; + g_LCDMode = 0; + g_LCDEnable = FALSE; + + return DX_OK; +} + +static void DrvLCD_TurnOn(void) +{ + DBG_FUNC_BEGIN("\r\n"); + + g_LCDMode = g_localMode; +} + +static void DrvLCD_TurnOn_WaitFinish(void) +{ + DBG_FUNC_BEGIN("\r\n"); + + g_LCDEnable = TRUE; +} + + +static void DrvLCD_TurnOff(void) +{ + DBG_FUNC_BEGIN("\r\n"); + + //NOTE: VERY VERY VERY VERY VERY IMPORTANT!!!!! + //上層è¦ç¢ºä¿SleepEnter()è·ŸTurnOff()ä¸æœƒé‡è¤‡ç™¼ç”Ÿ!!! + //if DrvLCD_SleepEnter() is called ClosePanel, then here DrvLCD_TurnOff() also call ClosePanel again, + //=> it will cause sif_close() is call twice by LCD driver internal, + //=> then ALL sif_send() command of other devices will become abnormally!!! + //=> å¯èƒ½ç¾è±¡1: 造æˆCCD無法wakeup (TG會用到sif) + //=> å¯èƒ½ç¾è±¡2: 造æˆCCDæ‹å‡ºå£žç…§ç‰‡ (TG會用到sif) +#if 0 + //LCD panel close + pObj->devCtrl(DISPDEV_CLOSE_DEVICE, NULL); +#endif + // Turn off LCD power + g_LCDEnable = FALSE; +} + +static void DrvLCD_SleepEnter(void) +{ + HD_RESULT ret =0 ; + HD_PATH_ID video_out_path = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_PATH); + + // LCD backlight + GPIOMap_TurnOffLCDBacklight(); + hd_videoout_stop(video_out_path); + ret = vendor_videoout_set(VENDOR_VIDEOOUT_ID0,VENDOR_VIDEOOUT_ITEM_ENTER_SLEEP,NULL); + if(ret!=HD_OK){ + DBG_ERR("ret %d\r\n", ret); + } + GPIOMap_LCDReset(); + + g_LCDSleep = TRUE; +} + +static void DrvLCD_SleepLeave(void) +{ + HD_RESULT ret =0 ; + HD_PATH_ID video_out_path = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_PATH); + HD_PATH_ID video_out_ctrl = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_CTRLPATH); + HD_FB_ENABLE video_out_enable={0}; + ret = vendor_videoout_set(VENDOR_VIDEOOUT_ID0,VENDOR_VIDEOOUT_ITEM_EXIT_SLEEP,NULL); + if(ret!=HD_OK){ + DBG_ERR("wake %d\r\n"); + } + hd_videoout_start(video_out_path); + video_out_enable.fb_id = HD_FB0; + video_out_enable.enable = 1; + ret = hd_videoout_set(video_out_ctrl, HD_VIDEOOUT_PARAM_FB_ENABLE, &video_out_enable); + if(ret!=HD_OK){ + DBG_ERR("fb enable %d\r\n", ret); + } + // LCD backlight + GPIOMap_TurnOnLCDBacklight(); + + g_LCDSleep = FALSE; +} + + +static UINT32 DrvLCDState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + DBG_IND("get %08x\r\n", StateID); + switch (StateID) { + case DRVDISP_STATE_ENBALE: + //lost device? ---> cannot determine enable or not + //under flow like: enable/disable + rvalue = g_LCDEnable; + break; + case DRVDISP_STATE_MODE: + //lost device? ---> cannot determine mode + //under flow like: change mode + rvalue = g_LCDMode; + break; + case DRVDISP_STATE_LASTMODE: + rvalue = g_LCDLastMode; + break; + case DRVDISP_STATE_SLEEP: + rvalue = g_LCDSleep; + break; + case DRVDISP_STATE_BACKLIGHT: + rvalue = GPIOMap_IsLCDBacklightOn() ? DRVDISP_BACKLIGHT_ON : DRVDISP_BACKLIGHT_OFF; + break; + case DRVDISP_STATE_BRIGHTLVL: + rvalue = g_LCDBacklightLvl; + break; + default: + DBG_WRN("get state=0x%02X not support!\r\n", StateID); + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("set %08x\r\n", StateID); + switch (StateID) { + case DRVDISP_STATE_BACKLIGHT: + if (Value == DRVDISP_BACKLIGHT_OFF) { + DBG_IND("DRVDISP_BACKLIGHT_OFF\r\n"); + GPIOMap_TurnOffLCDBacklight(); + } else { //if(value == DRVDISP_BACKLIGHT_ON) + DBG_IND("DRVDISP_BACKLIGHT_ON\r\n"); + GPIOMap_TurnOnLCDBacklight(); + } + break; + case DRVDISP_STATE_BRIGHTLVL: { + DBG_IND("DRVDISP_BRIGHTLVL=%d\r\n", Value); + GPIOMap_SetLCDBacklightBrightLevel((INT32)Value); + } + break; + case DRVDISP_STATE_DIRECT: + #if 0 //set direct by LCD driver! + if(pObj) { + ////////////////////////////////////////////////////////////////////// + // special operation for this project! + // + //if (Value == (0x01 | 0x02)) { + // pDev->SEL.SET_ROTATE.Rot = DISPDEV_LCD_ROTATE_180; + //} else { + // pDev->SEL.SET_ROTATE.Rot = DISPDEV_LCD_ROTATE_NONE; + //} + //pObj->devCtrl(DISPDEV_SET_ROTATE,pDev); + ////////////////////////////////////////////////////////////////////// + } + #endif + #if 0 //set direct by IDE! + //NOTE: project must set GxDisplay OSD1 layer's uiWinAttr = MIRROR_KEEP; + //NOTE: project must set VdoOut VDO1 layer's desc.degree = VDODISP_ROTATE_NO_HANDLE; + if(pObj) { + DISPLAYER_PARAM LyrParam; + memset(&LyrParam, 0, sizeof(DISPLAYER_PARAM)); + if (Value == (0x01 | 0x02)) { + LyrParam.SEL.SET_OUTDIR.BufOutDir = DISPOUTDIR_ROT_180; + } else { + LyrParam.SEL.SET_OUTDIR.BufOutDir = DISPOUTDIR_NORMAL; + } + pObj->dispLyrCtrl(DISPLAYER_OSD1, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress + pObj->dispLyrCtrl(DISPLAYER_OSD2, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress + pObj->dispLyrCtrl(DISPLAYER_VDO1, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress + pObj->dispLyrCtrl(DISPLAYER_VDO2, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress + pObj->load(TRUE); + } + #endif + break; + + default: + DBG_WRN("set state=0x%02X not support!\r\n", StateID); + break; + } + } + return DX_OK; +} + +static UINT32 DrvLCDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + DBG_IND("ctrl %08x\r\n", CtrlID); + + switch (CtrlID) { + case DRVDISP_CTRL_MODE: { + //DrvLCD_TurnOff(); + g_localMode = Param1; + //DrvLCD_TurnOn(); + //g_bLCDWaitTurnOnFinish = TRUE; + } + break; + case DRVDISP_CTRL_SLEEP: + if (Param1 == TRUE) { + DBG_IND("DRVDISP_CTRL_SLEEP 1\r\n"); + DrvLCD_SleepEnter(); + } else if (Param1 == FALSE) { + DBG_IND("DRVDISP_CTRL_SLEEP 0\r\n"); + DrvLCD_SleepLeave(); + } + break; + case DRVDISP_CTRL_WAITFINISH: + if (g_bLCDWaitTurnOnFinish == TRUE) { + DrvLCD_TurnOn_WaitFinish(); + g_bLCDWaitTurnOnFinish = FALSE; + } + break; + + default: + DBG_WRN("ctrl id=0x%02X not support!\r\n", CtrlID); + break; + } + return DX_OK; +} + +static UINT32 DrvLCDCommand(CHAR *pcCmdStr) //General Command Console +{ + switch (*pcCmdStr) { + case 'd': + if (!strncmp(pcCmdStr, "disp lcd dump", 13)) { + DrvLCD_Dump(); + return TRUE; + } + break; + } + return FALSE; +} + +static void DrvLCD_Dump(void) +{ + GPIOMap_DumpBacklight(); +} + + +//////////////////////////////////////////////////////////////////////////////// +// GPIO related +static void GPIOMap_LCDReset(void) +{ + FILE *fp = NULL; + UINT32 u32LogoEnable = 0; + UINT32 u32Size = 0; + char *pStrSrc = NULL; + + fp = fopen("/sys/firmware/devicetree/base/logo/enable", "r"); + if(fp != NULL){ + fseek(fp, 0, SEEK_END); + u32Size = ftell(fp); + fseek(fp, 0, SEEK_SET); + pStrSrc = (char *) malloc(u32Size * sizeof(char)); + + if(pStrSrc){ + fread(pStrSrc, 1, u32Size, fp); + u32LogoEnable = ((UINT32) pStrSrc[0] << 24) + ((UINT32) pStrSrc[1] << 16) + ((UINT32) pStrSrc[2] << 8) + ((UINT32) pStrSrc[3]); + free(pStrSrc); + DBG_IND("u32LogoEnable = 0x%X\n", u32LogoEnable); + } + + fclose(fp); + pStrSrc = NULL; + u32Size = 0; + } + + if(u32LogoEnable == 1){ + return; + } + + // Reset LCD + gpio_setDir(GPIO_LCD_RESET, GPIO_DIR_OUTPUT); + gpio_setPin(GPIO_LCD_RESET); + SwTimer_DelayMs(10); + gpio_clearPin(GPIO_LCD_RESET); + SwTimer_DelayMs(10); + gpio_setPin(GPIO_LCD_RESET); +} + +/** + Turn on LCD power + + Turn on LCD power. + + @param void + @return void +*/ +static void GPIOMap_TurnOnLCDPower(void) +{ +} + +/** + Turn off LCD power + + Turn off LCD power. + + @param void + @return void +*/ +static void GPIOMap_TurnOffLCDPower(void) +{ + +} + +/** + Check whether LCD power is on or not + + Check whether LCD power is on or not. + Return TRUE if LCD power is on, return FALSE if LCD power is off. + + @param void + @return BOOL +*/ +//static BOOL GPIOMap_IsLCDPowerOn(void) +//{ +// return TRUE; +//} + +//////////////////////////////////////////////////////////////////////// + +//#NT#2009/12/15#Lincy Lin -begin +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) +static PWM_CFG g_LCDBacklightPWMInfo = {1, 60, 0, 60, 0, 0}; +static UINT32 g_LCDBacklightLvlPWMDuty[DRVLCD_BRT_LEVEL_MAX] = { + 59,//48,// level 0 + 44,// level 1 + 35,// level 2 + 28,// level 3 + 25,// level 4 + 22,// level 5 + 20,// level 6 + 18,// level 7 + 17,// level 8 + 5, //10 // level 9 +}; +#endif + + +/** + Turn on LCD backlight + + Turn on LCD backlight. + + @param void + @return void +*/ +static void GPIOMap_TurnOnLCDBacklight(void) +{ + DBG_IND("GPIOMap_TurnOnLCDBacklight: Adjust value %d\r\n", g_LCDBacklightLvl); + + if (g_LCDBacklightEn == FALSE) { +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) + g_LCDBacklightPWMInfo.uiRise = g_LCDBacklightLvlPWMDuty[g_LCDBacklightLvl]; + DBG_IND("PWM: rise=%d\r\n", g_LCDBacklightPWMInfo.uiRise); + pwm_open(PWMID_LCD_BLG_PCTL); + pwm_pwmConfig(PWMID_LCD_BLG_PCTL, &g_LCDBacklightPWMInfo); + pwm_pwmEnable(PWMID_LCD_BLG_PCTL); +#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO) + gpio_setPin(GPIO_LCD_BLG_PCTL); +#else + DrvLCD_TurnOn(); + DrvLCD_TurnOn_WaitFinish(); +#endif + g_LCDBacklightEn = TRUE; + } +} + +static void GPIOMap_SetLCDBacklightBrightLevel(INT32 uiLevel) +{ + g_LCDBacklightLvl = uiLevel; + if (g_LCDBacklightLvl < 0) { + DBG_WRN("DrvLCDSetCtrl Warning! brightlvl=0x%02X out of range\r\n", g_LCDBacklightLvl); + g_LCDBacklightLvl = 0; + } + if (g_LCDBacklightLvl >= DRVLCD_BRT_LEVEL_MAX) { + DBG_WRN("DrvLCDSetCtrl Warning! brightlvl=0x%02X out of range\r\n", g_LCDBacklightLvl); + g_LCDBacklightLvl = DRVLCD_BRT_LEVEL_MAX - 1; + } + + if (!g_LCDBacklightEn) { + return; + } + + GPIOMap_AdjustLCDBacklight(g_LCDBacklightLvl); +} + +/** + Turn off LCD backlight + + Turn off LCD backlight. + + @param void + @return void +*/ +static void GPIOMap_TurnOffLCDBacklight(void) +{ + DBG_IND("GPIOMap_TurnOffLCDBacklight: Adjust value %d\r\n", g_LCDBacklightLvl); + + if (g_LCDBacklightEn == TRUE) { +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) + pwm_pwmDisable(PWMID_LCD_BLG_PCTL); + pwm_close(PWMID_BLG_PCTL, TRUE); +#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO) + gpio_clearPin(GPIO_LCD_BLG_PCTL); +#else + DrvLCD_TurnOff(); +#endif + g_LCDBacklightEn = FALSE; + } +} + +/** + Adjust LCD backlight level + + Adjust LCD backlight level. + + @param UINT32 uiAdjValue + @return void +*/ +static void GPIOMap_AdjustLCDBacklight(UINT32 uiAdjValue) +{ + DBG_IND("GPIOMap_AdjustLCDBacklight: Adjust value %d\r\n", uiAdjValue); + + /* Re-start PWM */ + if (g_LCDBacklightEn) { +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) + g_LCDBacklightPWMInfo.uiRise = g_LCDBacklightLvlPWMDuty[g_LCDBacklightLvl]; + DBG_IND("PWM: rise=%d\r\n", g_LCDBacklightPWMInfo.uiRise); + pwm_pwmDisable(PWMID_LCD_BLG_PCTL); + pwm_pwmConfig(PWMID_LCD_BLG_PCTL, &g_LCDBacklightPWMInfo); + pwm_pwmEnable(PWMID_LCD_BLG_PCTL); +#endif + } +} + +/** + Check whether LCD backlight is on or not + + Check whether LCD backlight is on or not. + Return TRUE if LCD backlight is on, return FALSE if LCD backlight is off. + + @param void + @return BOOL +*/ +static BOOL GPIOMap_IsLCDBacklightOn(void) +{ + return g_LCDBacklightEn; +} + +static void GPIOMap_DumpBacklight(void) +{ +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) + DBG_DUMP("BACKLIGHT clk :\t\t%d MHz\r\n", 48 / (g_LCDBacklightPWMInfo.uiDiv + 1)); + DBG_DUMP("BACKLIGHT Duty :\t%d %\r\n", (g_LCDBacklightPWMInfo.uiFall - g_LCDBacklightPWMInfo.uiRise) * 100 / g_LCDBacklightPWMInfo.uiPrd); +#endif +} + +#endif + diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxInput_Key.c b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxInput_Key.c new file mode 100755 index 000000000..79f8645fe --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxInput_Key.c @@ -0,0 +1,261 @@ +/** + Copyright Novatek Microelectronics Corp. 2009. All rights reserved. + + @file DetKey.c + @ingroup mIPRJAPKeyIO + + @brief Scan key, modedial + Scan key, modedial + + @note Nothing. + + @date 2017/05/02 +*/ + +/** \addtogroup mIPRJAPKeyIO */ +//@{ + +#include "DxCfg.h" +#include "IOCfg.h" +#include "DxInput.h" +#include "KeyDef.h" +#include "comm/hwclock.h" +#include "comm/hwpower.h" +#if 0 +#include "rtc.h" +#include "Delay.h" +#endif +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxKey +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// ADC related +//////////////////////////////////////////////////////////////////////////////// +#if (ADC_KEY == ENABLE) +#define VOLDET_KEY_ADC_LVL1 (251) +#define VOLDET_KEY_ADC_LVL2 (155) +#define VOLDET_KEY_ADC_LVL3 (51) +#define VOLDET_KEY_ADC_TH (460) +#define VOLDET_KEY_ADC_LVL4 (358) + +#define VOLDET_KEY_LVL_UNKNOWN 0xFFFFFFFF +#define VOLDET_KEY_LVL_0 0 +#define VOLDET_KEY_LVL_1 1 +#define VOLDET_KEY_LVL_2 2 +#define VOLDET_KEY_LVL_3 3 +#define VOLDET_KEY_LVL_4 4 +#define VOLDET_KEY_LVL_5 5 +#endif +#if (ADC_KEY == ENABLE) +static UINT32 VolDet_GetKey1ADC(void) +{ +#if (VOLDET_ADC_CONT_MODE == DISABLE) + UINT32 uiADCValue; + + uiADCValue = adc_readData(ADC_CH_VOLDET_KEY1); + // One-Shot Mode, trigger one-shot + adc_triggerOneShot(ADC_CH_VOLDET_KEY1); + + return uiADCValue; +#else + return adc_readData(ADC_CH_VOLDET_KEY1); +#endif +} +/** + Get ADC key voltage level + + Get ADC key 2 voltage level. + + @param void + @return UINT32 key level, refer to VoltageDet.h -> VOLDET_MS_LVL_XXXX +*/ +static UINT32 VolDet_GetKey1Level(void) +{ + static UINT32 uiRetKey1Lvl; + UINT32 uiKey1ADC, uiCurKey2Lvl; + + uiKey1ADC = VolDet_GetKey1ADC(); + DBG_IND("uiKey1ADC %d \r\n", uiKey1ADC); + if (uiKey1ADC < VOLDET_KEY_ADC_TH) { + if (uiKey1ADC < VOLDET_KEY_ADC_LVL3) { + uiCurKey2Lvl = VOLDET_KEY_LVL_4; + } else if (uiKey1ADC < VOLDET_KEY_ADC_LVL2) { + uiCurKey2Lvl = VOLDET_KEY_LVL_3; + } else if (uiKey1ADC < VOLDET_KEY_ADC_LVL1) { + uiCurKey2Lvl = VOLDET_KEY_LVL_2; + } else if (uiKey1ADC < VOLDET_KEY_ADC_LVL4) { + uiCurKey2Lvl = VOLDET_KEY_LVL_1; + } else { + uiCurKey2Lvl = VOLDET_KEY_LVL_0; + } + } else { + uiCurKey2Lvl = VOLDET_KEY_LVL_UNKNOWN; + } + + uiRetKey1Lvl = uiCurKey2Lvl; + + return uiRetKey1Lvl; +} + +/** + Detect Mode Switch state. + + Detect Mode Switch state. + + @param void + @return UINT32 Mode Switch state (DSC Mode) +*/ +#endif + +//////////////////////////////////////////////////////////////////////////////// +// GPIO related + +//static BOOL g_bIsShutter2Pressed = FALSE; + +/** + Delay between toggle GPIO pin of input/output + + Delay between toggle GPIO pin of input/output + + @param void + @return void +*/ +static void DrvKey_DetKeyDelay(void) +{ + gpio_readData(0); + gpio_readData(0); + gpio_readData(0); + gpio_readData(0); +} + +void DrvKey_Init(void) +{ +} +/** + Detect normal key is pressed or not. + + Detect normal key is pressed or not. + Return key pressed status (refer to KeyDef.h) + + @param void + @return UINT32 +*/ +UINT32 DrvKey_DetNormalKey(void) +{ + UINT32 uiKeyCode = 0; + +#if (ADC_KEY == ENABLE) + UINT32 uiKey1Lvl = VolDet_GetKey1Level(); + switch (uiKey1Lvl) { + case VOLDET_KEY_LVL_UNKNOWN: + default: + break; + case VOLDET_KEY_LVL_0: + uiKeyCode |= FLGKEY_RIGHT; + break; + case VOLDET_KEY_LVL_1: + uiKeyCode |= FLGKEY_DOWN; + break; + case VOLDET_KEY_LVL_2: + uiKeyCode |= FLGKEY_SHUTTER2; + break; + case VOLDET_KEY_LVL_3: + uiKeyCode |= FLGKEY_UP; + break; + case VOLDET_KEY_LVL_4: + uiKeyCode |= FLGKEY_ENTER; + break; + } +#endif + + +#if (GPIO_KEY == ENABLE) + if (!gpio_getPin(GPIO_KEY_SHUTTER2)) { + uiKeyCode |= FLGKEY_SHUTTER2; + } + if (!gpio_getPin(GPIO_KEY_UP)) { + uiKeyCode |= FLGKEY_UP; + } + if (!gpio_getPin(GPIO_KEY_DOWN)) { + uiKeyCode |= FLGKEY_DOWN; + } + if (!gpio_getPin(GPIO_KEY_MENU)) { + uiKeyCode |= FLGKEY_MENU; + } +// if (!gpio_getPin(GPIO_KEY_PLAYBACK)) { +// uiKeyCode |= FLGKEY_MENU; +// } + if (!gpio_getPin(GPIO_KEY_RIGHT)) { + uiKeyCode |= FLGKEY_RIGHT; + } + if (!gpio_getPin(GPIO_KEY_LEFT)) { + uiKeyCode |= FLGKEY_LEFT; + } + if (gpio_getPin(GPIO_KEY_DATAREADY)) { + uiKeyCode |= FLGKEY_DATAREADY; + } +#endif + /* + //detect if power-on by press playback key + if (!hwpower_get_power_key(POWER_ID_PSW2)) + { + uiKeyCode |= FLGKEY_PLAYBACK; + } + */ + DBG_IND("KEY= %08x\r\n", uiKeyCode); +// DBG_DUMP("KEY= %d\r\n", gpio_getPin(GPIO_KEY_LEFT)); + + DrvKey_DetKeyDelay(); + return uiKeyCode; +} +/** + Detect power key is pressed or not. + + Detect power key is pressed or not. + Return key pressed status (refer to KeyDef.h) + + @param void + @return UINT32 +*/ +UINT32 DrvKey_DetPowerKey(void) +{ + UINT32 uiKeyCode = 0; + return uiKeyCode; + if (hwpower_get_power_key(POWER_ID_PSW1)) { + uiKeyCode = FLGKEY_KEY_POWER; + // Reset shutdown timer + hwpower_set_power_key(POWER_ID_PSW1, 0xf0); + + } + + return uiKeyCode; +} +UINT32 DrvKey_DetStatusKey(DX_STATUS_KEY_GROUP KeyGroup) +{ + UINT32 uiReturn = STATUS_KEY_LVL_UNKNOWN; + switch (KeyGroup) { + case DX_STATUS_KEY_GROUP1: + break; + + case DX_STATUS_KEY_GROUP2: + break; + + case DX_STATUS_KEY_GROUP3: + break; + + case DX_STATUS_KEY_GROUP4: + break; + + case DX_STATUS_KEY_GROUP5: + break; + + default: + DBG_ERR("[StatusKey]no this attribute"); + break; + } + return uiReturn; +} diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_Battery.c b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_Battery.c new file mode 100755 index 000000000..17559700d --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_Battery.c @@ -0,0 +1,725 @@ +#include "DxCfg.h" +#include "IOCfg.h" +#include "DxPower.h" +//#include "DxFlash.h" +#include "DxCommon.h" +//#include "DxApi.h" +#include "Dx.h" +#include +#include +#include +#include +#if defined(_MCU_ENABLE_) +#include "MCUCtrl.h" +#endif + +#define THIS_DBGLVL 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxPwr +#define __DBGLVL__ THIS_DBGLVL +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include + +#if defined(_POWER_BATT_) + +#define TEMPDET_FUNCTION DISABLE +#define TEMPDET_TEST DISABLE +#define ADC_TEST ENABLE +#define DUMMY_LOAD 0 +#define BATT_SLIDE_WINDOW_COUNT 8 + +#define VOLDET_BATTERY_420V 782 +#define VOLDET_BATTERY_415V 772 +#define VOLDET_BATTERY_410V 763 +#define VOLDET_BATTERY_405V 754 +#define VOLDET_BATTERY_400V 744 +#define VOLDET_BATTERY_390V 726 +#define VOLDET_BATTERY_380V 707 +#define VOLDET_BATTERY_378V 703 +#define VOLDET_BATTERY_377V 701 +#define VOLDET_BATTERY_376V 699 +#define VOLDET_BATTERY_375V 698 +#define VOLDET_BATTERY_374V 696 +#define VOLDET_BATTERY_373V 694 +#define VOLDET_BATTERY_372V 692 +#define VOLDET_BATTERY_371V 690 +#define VOLDET_BATTERY_370V 688 +#define VOLDET_BATTERY_369V 687 +#define VOLDET_BATTERY_367V 683 +#define VOLDET_BATTERY_366V 681 +#define VOLDET_BATTERY_360V 670 +#define VOLDET_BATTERY_355V 660 +#define VOLDET_BATTERY_350V 651 +#define VOLDET_BATTERY_340V 633 +#define VOLDET_BATTERY_004V 7 +#define CHARGE_ADC_OFFSET 25 +#define LENS_ADC_OFFSET 23 +#define LENS_ADC_OFFSET2 12 + + + +DummyLoadType dummyLoadData[11]; + +//*********************************************** +//* +//* Battery Rule depend on Model +//* +//*********************************************** + +//#define VOLDET_BATTERY_ADC_TH 0 + +#if TEMPDET_TEST +INT32 temperature_value = 0; +#endif + + +static INT32 gTempValue = 25; +#if ADC_TEST +UINT32 gAdcValue = 3000; +#endif +#if defined(_MCU_ENABLE_) +UINT32 gMCUValue = 99; +#endif + +//------------------ Battery Status Level -------------------// +#define BATT_LEVEL_COUNT 4 + +static UINT32 LiBattAdcLevelValue[BATT_LEVEL_COUNT] = { + VOLDET_BATTERY_355V, + VOLDET_BATTERY_371V, + VOLDET_BATTERY_376V, + VOLDET_BATTERY_380V, +}; + + + +#define DUMMY_LOAD_OFFSETV VOLDET_BATTERY_004V +#define LENS_MOVE_MAX_COUNT 10 + +static UINT32 *pBattAdcLevelValue = &LiBattAdcLevelValue[0];; +static UINT32 uiBattADCSlideWin[BATT_SLIDE_WINDOW_COUNT] = {0}; +static UINT8 uiBattSlideIdx = 0; +static UINT8 uiCurSlideWinCnt = 0; +static INT32 iBattAdcCalOffset = 0; +#if USB_CHARGE_FUNCTION +static UINT32 u32BattChargeCurrent = BATTERY_CHARGE_CURRENT_LOW; +#endif +#if DUMMY_LOAD +static void DrvPower_dummy_process(UINT32 *V1, UINT32 *V2, BOOL bIris); +#endif +static INT32 DrvPower_GetTempCompentation(INT32 tempValue); + +static UINT32 bDummyLoadPwrOff = FALSE; + +//static DX_CALLBACK_PTR g_fpDxPowerCB = NULL; +/** + Get battery voltage ADC value + + Get battery voltage ADC value + + @param void + @return UINT32 ADC value +*/ + + +static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1); +static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1); +static UINT32 DrvPowerInit(void *pInitParam); +static UINT32 DrvPowerOpen(void); +static UINT32 DrvPowerClose(void); +static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value); +static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); +static UINT32 DrvPowerCommand(CHAR *pcCmdStr); +static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl); +static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value); +#if USB_CHARGE_FUNCTION +static INT32 DrvPower_BattTempGet(void); +#endif +static void DrvPower_PowerOnInit(void); +DX_OBJECT gDevPowerBATT = { + DXFLAG_SIGN, + DX_CLASS_POWER_EXT, + POWER_VER, + "Power", + 0, 0, 0, 0, + DrvPowerGetcaps, + DrvPowercfgs, + DrvPowerInit, + DrvPowerOpen, + DrvPowerClose, + DrvPowerState, + DrvPowerControl, + DrvPowerCommand, + 0, +}; + + + + +static UINT32 DrvPower_GetBatteryADC(void) +{ + + UINT32 uiADCValue; + INT32 TempCompentationADC; + +#if ADC_TEST + uiADCValue = gAdcValue; +#else + #if defined(_MCU_ENABLE_) + MCUCtrl_SendCmd(UART_CMD_VBAT_DETECT,0,0,0); + uiADCValue = gMCUValue; + return uiADCValue; + #else + uiADCValue = (adc_readData(ADC_CH_VOLDET_BATTERY)); + #endif +#endif + { + TempCompentationADC = DrvPower_GetTempCompentation(gTempValue); + DBG_MSG("Temp= %d\r\n", gTempValue); +#if 0 //charlie need wait DrvFlash_IsCharge finish + if (DrvFlash_IsCharge()) { + //DBG_MSG("ADC = %d,",uiADCValue); + uiADCValue += (CHARGE_ADC_OFFSET + TempCompentationADC); + DBG_MSG("Charge ADC+= %d\r\n", CHARGE_ADC_OFFSET + TempCompentationADC); + } else { + if (gDevPower.pfCallback) { + + gDevPower.pfCallback(DRVPWR_CB_IS_LENS_MOVING, 0, 0); + DBG_MSG("ADC = %d,", uiADCValue); + uiADCValue += (LENS_ADC_OFFSET + TempCompentationADC); + DBG_MSG("lens2 ADC+= %d\r\n", LENS_ADC_OFFSET + TempCompentationADC); + + + + } + } +#else + if (gDevPowerBATT.pfCallback) { + + gDevPowerBATT.pfCallback(DRVPWR_CB_IS_LENS_MOVING, 0, 0); + DBG_MSG("ADC = %d,", uiADCValue); + uiADCValue += (LENS_ADC_OFFSET + TempCompentationADC); + DBG_MSG("lens2 ADC+= %d\r\n", LENS_ADC_OFFSET + TempCompentationADC); + + + + } +#endif + uiADCValue += (iBattAdcCalOffset / 2); + return 782;//uiADCValue; + } + +} +//#NT#2009/09/02#Lincy Lin -begin +//#Add function for check battery overheat +/** + Get battery + + Get battery Temperature ADC value + + @param void + @return UINT32 ADC value +*/ +static BOOL DrvPower_IsBattOverHeat(void) +{ + return FALSE; +} +//#NT#2009/09/02#Lincy Lin -end + + + + +/** + Get battery voltage level + + Get battery voltage level. + If battery voltage level is DRVPWR_BATTERY_LVL_EMPTY, it means + that you have to power off the system. + + @param void + @return UINT32 Battery Level, refer to VoltageDet.h -> VOLDET_BATTERY_LVL_XXXX +*/ + +static UINT32 DrvPower_GetBatteryLevel(void) +{ + static UINT32 uiPreBatteryLvl = DRVPWR_BATTERY_LVL_UNKNOWN; + //static UINT32 uiPreBatteryADC = 0; + static UINT32 uiRetBatteryLvl; + static UINT32 uiEmptycount = 0; + static UINT32 uiCount = 0; + UINT32 uiCurBatteryADC, uiCurBatteryLvl, i; + BOOL isMatch = FALSE; + + uiCurBatteryLvl = 0; + if (uiPreBatteryLvl == DRVPWR_BATTERY_LVL_UNKNOWN) { + uiCurBatteryADC = DrvPower_GetBatteryADC(); + //uiPreBatteryADC = DrvPower_GetBatteryADC() - 1; + for (i = 0; i < BATT_SLIDE_WINDOW_COUNT; i++) { + uiBattADCSlideWin[i] = uiCurBatteryADC; + DBG_MSG("AVG=%d\r\n", uiCurBatteryADC); + } + } else { + + uiCurSlideWinCnt = BATT_SLIDE_WINDOW_COUNT; + uiBattADCSlideWin[uiBattSlideIdx++] = DrvPower_GetBatteryADC(); + if (uiBattSlideIdx >= uiCurSlideWinCnt) { + uiBattSlideIdx = 0; + } + uiCurBatteryADC = 0; + for (i = 0; i < uiCurSlideWinCnt; i++) { + uiCurBatteryADC += uiBattADCSlideWin[i]; + DBG_MSG("A[%d]=%d,", i, uiBattADCSlideWin[i]); + } + uiCurBatteryADC /= uiCurSlideWinCnt; + DBG_MSG("AVG=%d", uiCurBatteryADC); + DBG_MSG(", V=%d", uiCurBatteryADC * 42 / 9100); + DBG_MSG(".%02d\r\n", (uiCurBatteryADC * 42 / 91) % 100); + } + + //DBG_IND("%d,%d,%d\r\n",VOLDET_BATTERY_ADC_LVL0,VOLDET_BATTERY_ADC_LVL1,VOLDET_BATTERY_ADC_LVL2); + for (i = BATT_LEVEL_COUNT; i > 0; i--) { + if (uiCurBatteryADC > pBattAdcLevelValue[i - 1]) { + uiCurBatteryLvl = i; + isMatch = TRUE; + break; + } + } + if (isMatch != TRUE) { + uiCurBatteryLvl = 0; + } + + // Debounce + if ((uiCurBatteryLvl == uiPreBatteryLvl) || + (uiPreBatteryLvl == DRVPWR_BATTERY_LVL_UNKNOWN)) { + uiRetBatteryLvl = uiCurBatteryLvl; + } + uiPreBatteryLvl = uiCurBatteryLvl; + //uiPreBatteryADC = uiCurBatteryADC; + + if (uiCount % 2 == 0) { + uiRetBatteryLvl = uiPreBatteryLvl; + } + uiCount++; + // + if (uiEmptycount || uiRetBatteryLvl == DRVPWR_BATTERY_LVL_0) { + uiEmptycount++; + if (uiEmptycount == 4) { + return DRVPWR_BATTERY_LVL_EMPTY; + } + } + + return DRVPWR_BATTERY_LVL_4;//uiRetBatteryLvl; +} + + +static void DrvPower_PowerOnInit(void) +{ + pBattAdcLevelValue = &LiBattAdcLevelValue[0]; +#if USB_CHARGE_FUNCTION + gTempValue = DrvPower_BattTempGet(); +#endif +} + +UINT32 DrvPower_DummyLoad(void) +{ +#if DUMMY_LOAD + UINT32 Ave_V, deltaV, V1, V2; + + DrvPower_dummy_process(&V1, &V2, FALSE); + deltaV = V2 - V1; + Ave_V = V1; + dummyLoadData[0].deltaV = deltaV; + dummyLoadData[0].Ave_V = Ave_V; + + + if (dummyLoadData[0].Ave_V < (LiBattAdcLevelValue[0] + DUMMY_LOAD_OFFSETV)) { + bDummyLoadPwrOff = TRUE; + + } else { + bDummyLoadPwrOff = FALSE; + } + DBG_IND("Ave_V=%d ; deltaV=%d , bDummyLoadPwrOff=%d\r\n", Ave_V, deltaV, bDummyLoadPwrOff); + return (!bDummyLoadPwrOff); +#else + return TRUE; +#endif +} +#if DUMMY_LOAD +static void DrvPower_dummy_process(UINT32 *V1, UINT32 *V2, BOOL bIris) +{ + UINT32 i, Va; + UINT32 Vtotal, DetectLoop = 25; + float Vtmp1, Vtmp2, Vtmp3; + + if (gDevPower.pfCallback) { + gpio_clearPin(GPIO_LENS_MD_RST); // Enable motor driver.GPIO_LENS_MD_RST + Delay_DelayMs(5); + gpio_setPin(GPIO_LENS_MD_RST); // Enable motor driver.GPIO_LENS_MD_RST + gDevPower.pfCallback(DRVPWR_CB_DUMMY_LOAD_START, 0, 0); + } + Delay_DelayMs(40); + + Vtotal = 0; + for (i = 0; i < DetectLoop ; i++) { //sample 25 times. + Va = DrvPower_GetBatteryADC(); //sample average value.(In loading) + Delay_DelayUs(200); + Vtotal += Va; + } + *V1 = Vtotal / DetectLoop; + if (gDevPower.pfCallback) { + gDevPower.pfCallback(DRVPWR_CB_DUMMY_LOAD_END, 0, 0); + } + Delay_DelayMs(5); + Vtotal = 0; + for (i = 0; i < DetectLoop ; i++) { //sample 25 times. + Va = DrvPower_GetBatteryADC(); //sample average value.(after loading) + Delay_DelayUs(200); + Vtotal += Va; + } + + *V2 = Vtotal / DetectLoop; + + + Vtmp1 = (float)(*V1) * 3.3 * 1.39 / 4096; + Vtmp2 = (float)(*V2) * 3.3 * 1.39 / 4096; + + + Vtmp3 = Vtmp2 - Vtmp1; + + DBG_IND("delta=(%1.3f, %d) Ave_V:%1.3f V2:%1.3f, %d, %d, Cal = %d \r\n", Vtmp3, (*V2) - (*V1), Vtmp1, Vtmp2, *V1, *V2, iBattAdcCalOffset); + +} +#endif + +static void DrvPower_BattADC_Calibration(BOOL enable) +{ +} + +#if USB_CHARGE_FUNCTION +static void DrvPower_EnableChargeIC(BOOL bCharge) +{ + +} + +static void DrvPower_ChargeBattEn(BOOL bCharge) +{ + +} + + +static void DrvPower_ChargeCurrentSet(UINT32 Current) +{ + u32BattChargeCurrent = Current; +} + +static UINT32 DrvPower_ChargeCurrentGet(void) +{ + return u32BattChargeCurrent; +} + +static void DrvPower_ChargeISet(BOOL isHigh) +{ + +} + +static BOOL DrvPower_ChargeIGet(void) +{ + return 0; +} + +static void DrvPower_ChargeVSet(BOOL isHigh) +{ + +} + +static BOOL DrvPower_ChargeVGet(void) +{ + return 0; +} + + +static BOOL DrvPower_IsUnderCharge(void) +{ + return 0; +} + +static BOOL DrvPower_IsUSBChargeOK(void) +{ + return 0; +} + +static BOOL DrvPower_IsBattIn(void) +{ + return TRUE; + +} + +static BOOL DrvPower_IsDeadBatt(void) +{ + return FALSE; +} + +static BOOL DrvPower_IsNeedRecharge(void) +{ + return FALSE; +} + +static INT32 DrvPower_BattTempGet(void) +{ + return 25; +} +#endif + +static INT32 DrvPower_GetTempCompentation(INT32 tempValue) +{ + return 0; +} + +static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value) +{ + DBG_IND("DrvPwrCtrl(%d), value(%d)\r\n", DrvPwrCtrl, value); + switch (DrvPwrCtrl) { + case DRVPWR_CTRL_BATTERY_CALIBRATION_EN: + DrvPower_BattADC_Calibration((BOOL)value); + break; + + case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET: + iBattAdcCalOffset = (INT32)value; + break; + +#if USB_CHARGE_FUNCTION + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + DrvPower_ChargeBattEn((BOOL)value); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT: + DrvPower_ChargeCurrentSet(value); + break; + + case DRVPWR_CTRL_BATTERY_CHARGE_ISET: + DrvPower_ChargeISet((BOOL)value); + break; + + case DRVPWR_CTRL_BATTERY_CHARGE_VSET: + DrvPower_ChargeVSet((BOOL)value); + break; + + case DRVPWR_CTRL_ENABLE_CHARGEIC: + DrvPower_EnableChargeIC((BOOL)value); + break; + +#endif +#if defined(_MCU_ENABLE_) + case DRVPWR_CTRL_PIR_EN: + if(value!=0) { + gpio_setPin(PIR_POWER_ON); + Delay_DelayMs(100); + gpio_clearPin(PIR_POWER_ON); + MCUCtrl_SendCmd(UART_CMD_PIR_SWITCH,UART_PAR_ON,0,0); + } else { + gpio_setPin(PIR_POWER_OFF); + Delay_DelayMs(100); + gpio_clearPin(PIR_POWER_OFF); + MCUCtrl_SendCmd(UART_CMD_PIR_SWITCH,UART_PAR_OFF,0,0); + } + break; +#endif + case DRVPWR_CTRL_PSW1: + hwpower_set_power_key(POWER_ID_PSW1, value); + break; + case DRVPWR_CTRL_HWRT: + hwpower_set_power_key(POWER_ID_HWRT, value); + break; + case DRVPWR_CTRL_SWRT: + hwpower_set_power_key(POWER_ID_SWRT, value); + break; + default: + DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl); + break; + } +} + +static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl) +{ + UINT32 rvalue = 0; + switch (DrvPwrCtrl) { + case DRVPWR_CTRL_BATTERY_LEVEL: + rvalue = DrvPower_GetBatteryLevel(); + break; + case DRVPWR_CTRL_BATTERY_ADC_VALUE: + rvalue = DrvPower_GetBatteryADC(); + break; + case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET: + rvalue = iBattAdcCalOffset; + break; + case DRVPWR_CTRL_IS_DUMMUYLOAD_POWEROFF: + rvalue = bDummyLoadPwrOff; + break; + case DRVPWR_CTRL_IS_BATT_OVERHEAT: + rvalue = (UINT32)DrvPower_IsBattOverHeat(); + break; +#if USB_CHARGE_FUNCTION + case DRVPWR_CTRL_IS_BATT_INSERT: + rvalue = (UINT32)DrvPower_IsBattIn(); + break; + case DRVPWR_CTRL_IS_DEAD_BATT: + rvalue = (UINT32)DrvPower_IsDeadBatt(); + break; + case DRVPWR_CTRL_IS_NEED_RECHARGE: + rvalue = (UINT32)DrvPower_IsNeedRecharge(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + rvalue = (UINT32)DrvPower_IsUnderCharge(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_OK: + rvalue = (UINT32)DrvPower_IsUSBChargeOK(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT: + rvalue = DrvPower_ChargeCurrentGet(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_ISET: + rvalue = (UINT32)DrvPower_ChargeIGet(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_VSET: + rvalue = (UINT32)DrvPower_ChargeVGet(); + break; + case DRVPWR_CTRL_BATTERY_TEMPERATURE: +#if USB_CHARGE_FUNCTION + rvalue = DrvPower_BattTempGet(); +#endif + break; + +#else + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + rvalue = FALSE; + break; +#endif + case DRVPWR_CTRL_POWERON_SOURCE: + #if defined(_MCU_ENABLE_) + rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0); + #else + rvalue = hwpower_get_poweron_state(POWER_STATE_SRC); + #endif + break; + case DRVPWR_CTRL_POWER_LOST: + #if defined(_MCU_ENABLE_) + rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0); + #else + rvalue = hwpower_get_poweron_state(POWER_STATE_FIRST); + #endif + break; + case DRVPWR_CTRL_PSW1: + rvalue = hwpower_get_power_key(POWER_ID_PSW1); + break; + case DRVPWR_CTRL_HWRT: + rvalue = hwpower_get_power_key(POWER_ID_HWRT); + break; + case DRVPWR_CTRL_SWRT: + rvalue = hwpower_get_power_key(POWER_ID_SWRT); + break; + default: + DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl); + break; + } + return rvalue; +} +/* +void DrvPower_RegCB(DX_CALLBACK_PTR fpDxPowerCB) +{ + + g_fpDxPowerCB = fpDxPowerCB; +} +*/ +///////////DX object +static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1) +{ + + return DX_OK; +} + +static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1) +{ + + return DX_OK; +} +static UINT32 DrvPowerInit(void *pInitParam) +{ + DBG_IND("Init\r\n"); + DrvPower_PowerOnInit(); + return DX_OK; +} + +static UINT32 DrvPowerOpen(void) +{ + DBG_IND("open\r\n"); + hwclock_open(HWCLOCK_MODE_RTC); + return DX_OK; +} + +static UINT32 DrvPowerClose(void) +{ + DBG_IND("close\r\n"); + hwclock_close(); + return DX_OK; +} + +static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value) +{ + if (StateID & DXGET) { + StateID &= ~DXGET; + return DrvPower_GetControl(StateID); + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DrvPower_SetControl(StateID, Value); + } + return DX_OK; +} +static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) +{ + switch(CtrlID) { + case DRVPWR_CTRL_CURRENT_TIME: + if (Param1 == 0) + hwclock_set_time(TIME_ID_CURRENT, *(struct tm*)Param2, 0); + if (Param1 == 1) + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_CURRENT); + break; + case DRVPWR_CTRL_HWRT_TIME: + if (Param1 == 0) + hwclock_set_time(TIME_ID_HWRT, *(struct tm*)Param2, 0); + if (Param1 == 1) + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_HWRT); + break; + case DRVPWR_CTRL_SWRT_TIME: + if (Param1 == 0) + hwclock_set_time(TIME_ID_SWRT, *(struct tm*)Param2, 0); + if (Param1 == 1) + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_SWRT); + break; + } + return DX_OK; +} + +static UINT32 DrvPowerCommand(CHAR *pcCmdStr) //General Command Console +{ + + switch (*pcCmdStr) { + case 'd': + /*if (!strncmp(pcCmdStr, "Nand dump", 9)) + { + return TRUE; + }*/ + break; + } + return FALSE; +} +/* +static void DrvPowerCallback(UINT32 EventID, UINT32 Param1, UINT32 Param2){ + + if(g_fpDxPowerCB){ + g_fpDxPowerCB(EventID,Param1,Param2); + } +} +*/ + + +#endif + diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_DC.c b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_DC.c new file mode 100755 index 000000000..9fbeecec5 --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_DC.c @@ -0,0 +1,268 @@ +#include "DxCfg.h" +#include "IOCfg.h" +#include "DxPower.h" +#include "DxCommon.h" +//#include "DxApi.h" +#include "Dx.h" +#include +#include +#include + +#define THIS_DBGLVL 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxPwr +#define __DBGLVL__ THIS_DBGLVL +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include + +#if defined(_POWER_DC_) + +static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1); +static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1); +static UINT32 DrvPowerInit(void *pInitParam); +static UINT32 DrvPowerOpen(void); +static UINT32 DrvPowerClose(void); +static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value); +static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); +static UINT32 DrvPowerCommand(CHAR *pcCmdStr); +static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl); +static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value); + +DX_OBJECT gDevPowerDC = { + DXFLAG_SIGN, + DX_CLASS_POWER_EXT, + POWER_VER, + "PowerDC", + 0, 0, 0, 0, + DrvPowerGetcaps, + DrvPowercfgs, + DrvPowerInit, + DrvPowerOpen, + DrvPowerClose, + DrvPowerState, + DrvPowerControl, + DrvPowerCommand, + 0, +}; + +UINT32 DrvPower_DummyLoad(void) +{ + return TRUE; +} + + +static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value) +{ + DBG_IND("DrvPwrCtrl(%d), value(%d)\r\n", DrvPwrCtrl, value); + switch (DrvPwrCtrl) { + case DRVPWR_CTRL_BATTERY_CALIBRATION_EN: + break; + + case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET: + break; + +#if USB_CHARGE_FUNCTION + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_ISET: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_VSET: + break; + case DRVPWR_CTRL_ENABLE_CHARGEIC: + break; +#endif + case DRVPWR_CTRL_PSW1: +// hwpower_set_power_key(POWER_ID_PSW1, value); + break; + case DRVPWR_CTRL_HWRT: +// hwpower_set_power_key(POWER_ID_HWRT, value); + break; + case DRVPWR_CTRL_SWRT: +// hwpower_set_power_key(POWER_ID_SWRT, value); + break; + default: + DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl); + break; + } +} + +static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl) +{ + UINT32 rvalue = 0; + switch (DrvPwrCtrl) { + case DRVPWR_CTRL_BATTERY_LEVEL: + break; + case DRVPWR_CTRL_BATTERY_ADC_VALUE: + break; + case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET: + break; + case DRVPWR_CTRL_IS_DUMMUYLOAD_POWEROFF: + break; + case DRVPWR_CTRL_IS_BATT_OVERHEAT: + break; +#if USB_CHARGE_FUNCTION + case DRVPWR_CTRL_IS_BATT_INSERT: + break; + case DRVPWR_CTRL_IS_DEAD_BATT: + break; + case DRVPWR_CTRL_IS_NEED_RECHARGE: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_OK: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_ISET: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_VSET: + break; + case DRVPWR_CTRL_BATTERY_TEMPERATURE: + break; +#else + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + rvalue = FALSE; + break; +#endif + case DRVPWR_CTRL_POWERON_SOURCE: + #if defined(_MCU_ENABLE_) + rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0); + #else +// rvalue = hwpower_get_poweron_state(POWER_STATE_SRC); + #endif + break; + case DRVPWR_CTRL_POWER_LOST: + #if defined(_MCU_ENABLE_) + rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0); + #else +// rvalue = hwpower_get_poweron_state(POWER_STATE_FIRST); + #endif + break; + case DRVPWR_CTRL_PSW1: +// rvalue = hwpower_get_power_key(POWER_ID_PSW1); + break; + case DRVPWR_CTRL_HWRT: +// rvalue = hwpower_get_power_key(POWER_ID_HWRT); + break; + case DRVPWR_CTRL_SWRT: +// rvalue = hwpower_get_power_key(POWER_ID_SWRT); + break; + default: + DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl); + break; + } + return rvalue; +} +/* +void DrvPower_RegCB(DX_CALLBACK_PTR fpDxPowerCB) +{ + + g_fpDxPowerCB = fpDxPowerCB; +} +*/ +///////////DX object +static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1) +{ + UINT32 v = 0; + switch (CapID & 0x0000ffff) { + case POWER_CAPS_BASE: + v = POWER_BF_DRTC; + break; + default: + break; + } + return v; +} + +static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1) +{ + + return DX_OK; +} +static UINT32 DrvPowerInit(void *pInitParam) +{ + DBG_IND("Init\r\n"); + return DX_OK; +} + +static UINT32 DrvPowerOpen(void) +{ + DBG_IND("open\r\n"); + hwclock_open(HWCLOCK_MODE_RTC); + return DX_OK; +} + +static UINT32 DrvPowerClose(void) +{ + DBG_IND("close\r\n"); + hwclock_close(); + return DX_OK; +} + +static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value) +{ + if (StateID & DXGET) { + StateID &= ~DXGET; + return DrvPower_GetControl(StateID); + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DrvPower_SetControl(StateID, Value); + } + return DX_OK; +} +static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) +{ + switch(CtrlID) { + case DRVPWR_CTRL_CURRENT_TIME: + if (Param1 == 0) { + hwclock_set_time(TIME_ID_CURRENT, *(struct tm*)Param2, 0); + } + if (Param1 == 1) { + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_CURRENT); + } + break; + case DRVPWR_CTRL_HWRT_TIME: + if (Param1 == 0) { + hwclock_set_time(TIME_ID_HWRT, *(struct tm*)Param2, 0); + } + if (Param1 == 1) { + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_HWRT); + } + break; + case DRVPWR_CTRL_SWRT_TIME: + if (Param1 == 0) { + hwclock_set_time(TIME_ID_SWRT, *(struct tm*)Param2, 0); + } + if (Param1 == 1) { + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_SWRT); + } + break; + } + return DX_OK; +} + +static UINT32 DrvPowerCommand(CHAR *pcCmdStr) //General Command Console +{ + + switch (*pcCmdStr) { + case 'd': + /*if (!strncmp(pcCmdStr, "Nand dump", 9)) + { + return TRUE; + }*/ + break; + } + return FALSE; +} +/* +static void DrvPowerCallback(UINT32 EventID, UINT32 Param1, UINT32 Param2){ + + if(g_fpDxPowerCB){ + g_fpDxPowerCB(EventID,Param1,Param2); + } +} +*/ + +#endif diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_Card.c b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_Card.c new file mode 100755 index 000000000..ffc1e75e7 --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_Card.c @@ -0,0 +1,442 @@ +/** + Copyright Novatek Microelectronics Corp. 2005. All rights reserved. + + @file KeyScanSD.c + @ingroup mIPRJAPKeyIO + + @brief Detect SD card status + Detect SD card insert/remove, lock/unlock + + @note Nothing. + + @date 2005/12/15 +*/ + +/** \addtogroup mIPRJAPKeyIO */ +//@{ + +#include "kwrap/type.h" +#include "DxCfg.h" +#include "IOCfg.h" + +#include "DxStorage.h" +#include "DxCommon.h" +#include "DxApi.h" + +#include "sdio.h" +#if 0 +#include "SdmmcDesc.h" +#include "StrgDef.h" +#include "Debug.h" +#endif +#include "Utility/SwTimer.h" +//#include "pll.h" + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 1 // 0=OFF, 1=ERROR, 2=TRACE +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +void DrvCARD_EnableCardPower(BOOL bEn); +BOOL DrvCARD_DetStrgCard(void); +BOOL DrvCARD_DetStrgCard_TRUE(void);//for eMMC +BOOL DrvCARD_DetStrgCardWP(void); +BOOL DrvCARD_DetStrgCardWP_FALSE(void);//for eMMC + +//public func +UINT32 DrvCARDGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvCARDGetcaps3(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvCARDInit(void *pInitParam); // Set Init Parameters +UINT32 DrvCARDInit3(void *pInitParam); // Set Init Parameters +UINT32 DrvCARDOpen(void); // Common Constructor +UINT32 DrvCARDClose(void); // Common Destructor +UINT32 DrvCARDState(UINT32 StateID, UINT32 Value); // General Properties +UINT32 DrvCARDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +UINT32 DrvCARDCommand(CHAR *pcCmdStr); //General Command Console + +#if !defined(_CARD1_NONE_) +//dx object +DX_OBJECT gDevCARD1 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_CARD1, + STORAGE_VER, + "Storage_Card1", + 0, 0, 0, 0, + DrvCARDGetcaps, + 0, + DrvCARDInit, + DrvCARDOpen, + DrvCARDClose, + DrvCARDState, + DrvCARDControl, + DrvCARDCommand, + 0, +}; +#endif + +#if !defined(_CARD3_NONE_) +//for eMMC test on FPGA +DX_OBJECT gDevCARD3 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_CARD3, + STORAGE_VER, + "Storage_Card3", + 0, 0, 0, 0, + DrvCARDGetcaps3, + 0, + DrvCARDInit3, + DrvCARDOpen, + DrvCARDClose, + DrvCARDState, + DrvCARDControl, + DrvCARDCommand, + 0, +}; +#endif + + +#if !defined(_CARD1_NONE_) +UINT32 DrvCARDGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID) { + case STORAGE_CAPS_BASE: + DBG_IND("get card plug caps\r\n"); + v = STORAGE_BF_DETPLUG | STORAGE_BF_DETWP; + break; + case STORAGE_CAPS_HANDLE: + v = (UINT32)sdio_getStorageObject(STRG_OBJ_FAT1); + break; + default: + break; + } + return v; +} +#endif + +#if !defined(_CARD3_NONE_) +UINT32 DrvCARDGetcaps3(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID) { + case STORAGE_CAPS_BASE: + DBG_IND("get card plug caps\r\n"); + v = STORAGE_BF_DETPLUG | STORAGE_BF_DETWP; + break; + case STORAGE_CAPS_HANDLE: + CHKPNT; +#if defined(__FREERTOS) + v = (UINT32)sdio3_getStorageObject(STRG_OBJ_FAT1); +#endif + break; + default: + break; + } + return v; +} +#endif + +#if !defined(_CARD1_NONE_) +UINT32 DrvCARDInit(void *pInitParam) // Set Init Parameters +{ +#if defined(__FREERTOS) + PSTORAGE_OBJ pStrg; + DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete + + DBG_FUNC_BEGIN("\r\n"); + + pStrg = sdio_getStorageObject(STRG_OBJ_FAT1); + sdio_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCard); + sdio_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCardWP); + + /* + // Enable High Speed mode + //sdio_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, (UINT32)(SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS|SDIO_BUS_SPEED_MODE_SDR12|SDIO_BUS_SPEED_MODE_SDR25|SDIO_BUS_SPEED_MODE_SDR50)); + sdio_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, (UINT32)(SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS|SDIO_BUS_SPEED_MODE_SDR12|SDIO_BUS_SPEED_MODE_SDR25|SDIO_BUS_SPEED_MODE_DDR50)); + */ + + //#NT#2017/10/24#Nestor Yang -begin + //#NT# Adjust SDIO driving, requested by SA1 + /* + // Enable setting driving sink of clock pin + sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, (UINT32)TRUE); + + // Default speed driving -> 5.0 mA (Shirley, 2017/09/22) + sdio_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 150); + //sdio_setConfig(SDIO_CONFIG_ID_DS_MAX_CLK, 48000000); //default for DS + + // High speed driving -> 10.0 mA (Shirley, 2017/09/22) + sdio_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 150); + */ + sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE); // for clock. + sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_CMDDATA_EN, TRUE); // for cmd and data. + + // Default speed driving + sdio_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 200); + sdio_setConfig(SDIO_CONFIG_ID_DS_CMD_DRIVING, 150); + sdio_setConfig(SDIO_CONFIG_ID_DS_DATA_DRIVING, 150); + + // High speed driving + sdio_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 200); + sdio_setConfig(SDIO_CONFIG_ID_HS_CMD_DRIVING, 150); + sdio_setConfig(SDIO_CONFIG_ID_HS_DATA_DRIVING, 150); + //#NT#2017/10/24#Nestor Yang -end + + //sdio_setConfig(SDIO_CONFIG_ID_HS_MAX_CLK, 48000000); //default for HS + /* + // Set clock source + sdio_setConfig(SDIO_CONFIG_ID_SRCLK, PLL_CLKSEL_SDIO_48); + // Set maximum bus width to 8 bits + sdio_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_8_BITS); + */ + //sdio_setCallBack(SDIO_CALLBACK_POWER_CONTROL, (SDIO_CALLBACK_HDL)DrvCARD_EnableCardPower); //(to improve card capability) + + //if(STRG_OBJ_FAT1) + { + pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size); + } +#endif + return DX_OK; +} +#endif + +#if !defined(_CARD3_NONE_) +UINT32 DrvCARDInit3(void *pInitParam) // Set Init Parameters +{ +#if defined(__FREERTOS) + PSTORAGE_OBJ pStrg; + DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete + + DBG_FUNC_BEGIN("\r\n"); + CHKPNT; + pStrg = sdio3_getStorageObject(STRG_OBJ_FAT1); + if (pStrg == NULL) { + DBG_ERR("Get SDIO3 storage object failed\r\n"); + return DX_NULL_POINTER; + } + + pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size); + + sdio3_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCard_TRUE); + sdio3_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCardWP_FALSE); + + // Support default speed + high speed + sdio3_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS); + + // Default speed driving -> 5.0 mA + sdio3_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 50); + // High speed driving -> 10.0 mA + sdio3_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 100); + + // Adjust driving/sink according to operating mode + sdio3_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE); + + sdio3_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_4_BITS); + + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_OEMID, (UINT32)"NOVATEK"); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_VOL_LABLE, (UINT32)"SD_VOL"); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_RAND_VOL_ID_EN, TRUE); +#endif + return DX_OK; +} +#endif + +#if !(defined(_CARD1_NONE_) && defined(_CARD3_NONE_)) +UINT32 DrvCARDOpen(void) // Common Constructor +{ + DrvCARD_EnableCardPower(TRUE); + + return DX_OK; +} + +UINT32 DrvCARDClose(void) // Common Destructor +{ + DrvCARD_EnableCardPower(FALSE); + + return DX_OK; +} + +UINT32 DrvCARDState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + DBG_IND("get %08x\r\n", StateID); + switch (StateID) { + case STORAGE_STATE_INSERT: + rvalue = DrvCARD_DetStrgCard(); + break; + case STORAGE_STATE_LOCK: { + BOOL bLock = FALSE; + if (DrvCARD_DetStrgCard()) { + bLock = DrvCARD_DetStrgCardWP(); + } + rvalue = bLock; + } + break; + break; + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("set %08x\r\n", StateID); + switch (StateID) { + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + } + return DX_OK; +} + +UINT32 DrvCARDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + DBG_IND("ctrl %08x\r\n", CtrlID); + + switch (CtrlID) { + case STORAGE_CTRL_POWER: + DrvCARD_EnableCardPower(Param1); + break; + default: + DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID); + break; + } + return DX_OK; +} + +UINT32 DrvCARDCommand(CHAR *pcCmdStr) //General Command Console +{ + return FALSE; +} + +//////////////////////////////////////////////////////////////////////////////// +// GPIO related + +#define KEYSCAN_CD_GPIO_INT GPIO_INT_00 +#define KEYSCAN_CARDDET_INT DISABLE +#define KEYSCAN_SDWRPTDET_GPIO DISABLE + +void DrvCARD_EnableCardPower(BOOL bEn) +{ + gpio_setDir(GPIO_CARD_POWER, GPIO_DIR_OUTPUT); + if (bEn) { + DBG_IND("[SD] - card power enable\r\n"); + gpio_clearPin(GPIO_CARD_POWER); + SwTimer_DelayMs(20); + } else { + + DBG_IND("[SD] - card power disable\r\n"); + gpio_setPin(GPIO_CARD_POWER); + SwTimer_DelayMs(350); + } +} + +#if (KEYSCAN_CARDDET_INT == ENABLE) +static volatile UINT32 uiStrgCardIntCnt = 0; + +/** + ISR of SD card detection + + ISR of SD card detection + + @param void + @return void +*/ +static void KeyScan_DetStrgCardIsr(UINT32 uiEvent) +{ + uiStrgCardIntCnt++; + + // Debounce + if (uiStrgCardIntCnt > 1) { + uiStrgCardIntCnt = 0; + } +} +#endif + +void DrvCARD_SetInsert(UINT32 status) +{ +#if (KEYSCAN_CARDDET_INT == ENABLE) + if (status) { + gpio_setIntTypePol(KEYSCAN_CD_GPIO_INT, GPIO_INTTYPE_LEVEL, GPIO_INTPOL_POSHIGH); + } else { + gpio_setIntTypePol(KEYSCAN_CD_GPIO_INT, GPIO_INTTYPE_LEVEL, GPIO_INTPOL_NEGLOW); + } +#endif +} + +void DrvCARD_DetRestart(void) +{ +#if (KEYSCAN_CARDDET_INT == ENABLE) + gpio_setIntIsr(KEYSCAN_CD_GPIO_INT, KeyScan_DetStrgCardIsr); + gpio_enableInt(KEYSCAN_CD_GPIO_INT); +#endif +} + +/** + Detect Storage card is inserted or not + + Detect Storage card is inserted or not. + Return TRUE if storage card is inserted, FALSE if storage card is removed. + + @param void + @return BOOL: TRUE -> Storage card inserted, FALSE -> Storage card removed +*/ +BOOL DrvCARD_DetStrgCard(void) +{ +#if 1 + return (gpio_getPin(GPIO_CARD_DETECT) == 0 ? TRUE : FALSE); +#else + return TRUE; +#endif +} + +/** + Detect Storage card is write protected or not + + Detect Storage card is write protected or not. + Return TRUE if storage card is write protected, FALSE if storage card is not write protected. + + @param void + @return BOOL: TRUE -> Storage card is write protected, FALSE -> Storage card is not write protected +*/ +BOOL DrvCARD_DetStrgCardWP(void) +{ +#if 0 + return (gpio_getPin(GPIO_CARD_WP) == 1 ? TRUE : FALSE); +#else + return FALSE; +#endif +} + +/** + Always return card inserted (TRUE) for eMMC + + @param void + @return BOOL: TRUE -> Storage card inserted, FALSE -> Storage card removed +*/ +BOOL DrvCARD_DetStrgCard_TRUE(void) +{ + return TRUE; +} + +/** + Always return no write protected (FALSE) for eMMC + + @param void + @return BOOL: TRUE -> Storage card is write protected, FALSE -> Storage card is not write protected +*/ +BOOL DrvCARD_DetStrgCardWP_FALSE(void) +{ + return FALSE; +} + +#endif +//@} diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_EmbMem.c b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_EmbMem.c new file mode 100755 index 000000000..2b7db0400 --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_EmbMem.c @@ -0,0 +1,574 @@ +#include "kwrap/type.h" +#include "DxCfg.h" +#include "IOCfg.h" + +#include "DxStorage.h" +#include "DxCommon.h" +#include "DxApi.h" +#include "DrvExt.h" + +#if 0 +#include "Debug.h" +#endif +#include "sdio.h" +//#include "pad.h" +#if 0 +#include "StrgDef.h" +#endif +#include +#include "emb_partition_info.h" + +#if (!defined(_EMBMEM_NONE_)) && (!defined(_EMBMEM_UITRON_OFF_)) + +#if defined(_EMBMEM_NONE_) +#define EMB_GETSTRGOBJ(x) 0 //Always NULL +#elif defined(_EMBMEM_NAND_) || defined(_EMBMEM_SPI_NAND_) +#include "nand.h" +#define EMB_GETSTRGOBJ(x) nand_getStorageObject(x) +#elif defined(_EMBMEM_SPI_NOR_) +#include "nand.h" +//#include "RamDisk/RamDisk.h" +#define EMB_GETSTRGOBJ(x) 0//spiflash_getStorageObject(x) +#elif defined(_EMBMEM_EMMC_) +#include "sdio.h" +#define EMB_GETSTRGOBJ(x) sdio3_getStorageObject(x) +static BOOL xSdioDet(void) +{ + return TRUE; +} +static BOOL xSdioWp(void) +{ + return FALSE; +}; +#endif + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +//public func +UINT32 DrvEmbMemGetcaps0(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps1(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps2(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps3(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps4(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps5(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps6(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps7(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps8(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemInit(void *pInitParam); // Set Init Parameters +UINT32 DrvEmbMemOpen(void); // Common Constructor +UINT32 DrvEmbMemClose(void); // Common Destructor +UINT32 DrvEmbMemState(UINT32 StateID, UINT32 Value); // General Properties +UINT32 DrvEmbMemControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +UINT32 DrvEmbMemCommand(CHAR *pcCmdStr); //General Command Console + +//User define SPI-NOR table sample code +#if 0 +static SPI_FLASH_INFO user_define_spi_flash_support_tbl[] = { + // XTX PN25F32B (4MB) + { + //1st ID : id[0] 2nd ID : id[1] 3rd ID : id[2] + //manufacture ID memory type memory capacity + 0x0B, 0x40, 0x16, + //total size (unit: byte) sector size (unit: byte) block size (unit: byte) + 0x400000, 0x10000, 0x10000, + + //sectr count (unit: sector) support EWSR command support AAI command support SECTOR_ERASE command (0x20) + 0x800000 / 0x10000, FALSE, FALSE, TRUE, + + //CHIP erase time (unit: ms) Block erase time (unit: ms) Sector erase time (unit: ms) page program time (unit: ms) + 200000, 4000, 1600, 5, + + //Wide bus (dual/quad) supported by this flash + SPI_FLASH_BUSWIDTH_DUAL | SPI_FLASH_BUSWIDTH_QUAD_TYPE5 + }, + + // XTX PN25F64B (8MB) + { + //1st ID : id[0] 2nd ID : id[1] 3rd ID : id[2] + //manufacture ID memory type memory capacity + 0x0B, 0x40, 0x17, + //total size (unit: byte) sector size (unit: byte) block size (unit: byte) + 0x800000, 0x10000, 0x10000, + + //sectr count (unit: sector) support EWSR command support AAI command support SECTOR_ERASE command (0x20) + 0x800000 / 0x10000, FALSE, FALSE, TRUE, + + //CHIP erase time (unit: ms) Block erase time (unit: ms) Sector erase time (unit: ms) page program time (unit: ms) + 200000, 4000, 1600, 5, + SPI_FLASH_BUSWIDTH_DUAL | SPI_FLASH_BUSWIDTH_QUAD_TYPE5 + }, + + +}; + +static BOOL pmc_identifySpi(UINT32 uiMfgID, UINT32 uiTypeID, UINT32 uiCapacity, PSPIFLASH_IDENTIFY pIdentify) +{ + UINT32 uiNorTblID; + BOOL user_table_found = FALSE; + + for (uiNorTblID = 0; uiNorTblID < (sizeof(user_define_spi_flash_support_tbl) / sizeof(SPI_FLASH_INFO)); uiNorTblID++) { + if (uiMfgID == user_define_spi_flash_support_tbl[uiNorTblID].uiMfgID && \ + uiTypeID == user_define_spi_flash_support_tbl[uiNorTblID].uiMemType && \ + uiCapacity == user_define_spi_flash_support_tbl[uiNorTblID].uiMemCapacity) { + DBG_DUMP("emu user define spi-nor tbl Maker ID found @[%02d][0x%02x] DeviceID[0x%02x] cap[0x%02x]\r\n", uiNorTblID, user_define_spi_flash_support_tbl[uiNorTblID].uiMfgID, user_define_spi_flash_support_tbl[uiNorTblID].uiMemType, user_define_spi_flash_support_tbl[uiNorTblID].uiMemCapacity); + // For SPI Nor flash only + pIdentify->uiTotalSize = user_define_spi_flash_support_tbl[uiNorTblID].uiTotalSize; + pIdentify->uiBlockSize = user_define_spi_flash_support_tbl[uiNorTblID].uiBlockSize; + pIdentify->uiSectorSize = user_define_spi_flash_support_tbl[uiNorTblID].uiSectorSize; + + pIdentify->uiSectorCnt = user_define_spi_flash_support_tbl[uiNorTblID].uiSectorCnt; + pIdentify->bSupportEWSR = user_define_spi_flash_support_tbl[uiNorTblID].bSupportEWSR; + pIdentify->bSupportAAI = user_define_spi_flash_support_tbl[uiNorTblID].bSupportAAI; + pIdentify->bSupportSecErase = user_define_spi_flash_support_tbl[uiNorTblID].bSupportSecErase; + pIdentify->uiChipEraseTime = user_define_spi_flash_support_tbl[uiNorTblID].uiChipEraseTime; + pIdentify->uiBlockEraseTime = user_define_spi_flash_support_tbl[uiNorTblID].uiBlockEraseTime; + pIdentify->uiSectorEraseTime= user_define_spi_flash_support_tbl[uiNorTblID].uiSectorEraseTime; + pIdentify->uiPageProgramTime= user_define_spi_flash_support_tbl[uiNorTblID].uiPageProgramTime; + + pIdentify->flashWidth = user_define_spi_flash_support_tbl[uiNorTblID].flashWidth; + user_table_found = TRUE; + break; + } + } + return user_table_found; +} +#endif + +//dx object +DX_OBJECT gDevEmbMem0 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM0, + STORAGE_VER, + "LOADER", + 0, 0, 0, 0, + DrvEmbMemGetcaps0, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem1 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM1, + STORAGE_VER, + "MODELEXT", + 0, 0, 0, 0, + DrvEmbMemGetcaps1, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem2 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM2, + STORAGE_VER, + "UITRON", + 0, 0, 0, 0, + DrvEmbMemGetcaps2, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem3 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM3, + STORAGE_VER, + "UBOOT", + 0, 0, 0, 0, + DrvEmbMemGetcaps3, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem4 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM4, + STORAGE_VER, + "LINUX", + 0, 0, 0, 0, + DrvEmbMemGetcaps4, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem5 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM5, + STORAGE_VER, + "DSP1", + 0, 0, 0, 0, + DrvEmbMemGetcaps5, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem6 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM6, + STORAGE_VER, + "DSP2", + 0, 0, 0, 0, + DrvEmbMemGetcaps6, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem7 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM7, + STORAGE_VER, + "PSTORE", + 0, 0, 0, 0, + DrvEmbMemGetcaps7, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem8 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM8, + STORAGE_VER, + "FAT", + 0, 0, 0, 0, + DrvEmbMemGetcaps8, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; +#if defined(__FREERTOS) +#if !defined(_EMBMEM_EMMC_) +static UINT32 xDrvEmbMemGetUsedSize(EMB_PARTITION *pPat, UINT32 nPat) +{ + UINT32 i; + UINT32 uiOffset = 0; + for (i = 0; i < nPat; i++) { + if (pPat->EmbType != EMBTYPE_UNKNOWN) { + if ((pPat->PartitionOffset != 0) && (pPat->PartitionOffset < uiOffset)) { + DBG_ERR("Partition[%d] overlaps previous one.\r\n", i); + return 0; + } + + if ((i==0) || (i!=0 && pPat->PartitionOffset!=0)) + uiOffset = pPat->PartitionOffset + pPat->PartitionSize; + } + + pPat++; + } + return uiOffset; +} +#endif +#endif +static UINT32 xDrvEmbMemGetcaps(UINT32 DxType, UINT32 CapID, UINT32 Param1) +{ + UINT32 v = 0; + if (CapID == STORAGE_CAPS_HANDLE) { + const UINT32 Map[] = { + STRG_OBJ_FW_RSV1, + STRG_OBJ_FW_RSV2, + STRG_OBJ_FW_RSV3, + STRG_OBJ_FW_RSV4, + STRG_OBJ_FW_RSV5, + STRG_OBJ_FW_RSV6, + STRG_OBJ_FW_RSV7, + STRG_OBJ_PSTORE1, + STRG_OBJ_FAT1 + }; + if (DxType >= sizeof(Map) / sizeof(Map[0])) { + DBG_ERR("out of id: %d\r\n", DxType); + return 0; + } + +// v = (UINT32)EMB_GETSTRGOBJ(Map[DxType]); + //speical case handle +#if defined(__FREERTOS) +#if defined(_EMBMEM_SPI_NOR_) + if (DxType == DX_TYPE_EMBMEM8) { //FAT change to ramdisk + v = (UINT32)ramdsk_getStorageObject(); + } +#endif +#endif + } + return v; +} + +UINT32 DrvEmbMemGetcaps0(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM0, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps1(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM1, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps2(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM2, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps3(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM3, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps4(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM4, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps5(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM5, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps6(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM6, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps7(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM7, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps8(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM8, CapID, Param1); +} + +UINT32 DrvEmbMemInit(void *pInitParam) // Set Init Parameters +{ + DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete + + if (!g_pInit) { + return DX_PARAM_ERROR; + } + + DBG_FUNC_BEGIN("\r\n"); +#if defined(__FREERTOS) +#if defined(_EMBMEM_EMMC_) + static BOOL bEmmcInitOnce = FALSE; + if (!bEmmcInitOnce) { + sdio3_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)xSdioDet); + sdio3_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)xSdioWp); + + // Support default speed + high speed + sdio3_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS); + // Default speed driving -> 5.0 mA + sdio3_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 50); + // High speed driving -> 10.0 mA + sdio3_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 100); + // Adjust driving/sink according to operating mode + sdio3_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE); + + sdio3_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_4_BITS); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_OEMID, (UINT32)"NOVATEK"); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_VOL_LABLE, (UINT32)"SD_VOL"); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_RAND_VOL_ID_EN, TRUE); + bEmmcInitOnce = TRUE; + } +#elif defined(_EMBMEM_SPI_NAND_) + static BOOL bSpiNandInitOnce = FALSE; + if (!bSpiNandInitOnce) { + nand_setConfig(NAND_CONFIG_ID_FREQ, 96000000); + nand_setConfig(NAND_CONFIG_ID_NAND_TYPE, NANDCTRL_SPI_NAND_TYPE); + bSpiNandInitOnce = TRUE; + } +#elif defined(_EMBMEM_SPI_NOR_) + static BOOL bSpiNandInitOnce = FALSE; + if (!bSpiNandInitOnce) { + nand_setConfig(NAND_CONFIG_ID_NAND_TYPE, NANDCTRL_SPI_NOR_TYPE); + bSpiNandInitOnce = TRUE; + } +#endif +#endif + + { + DXSTRG_PARTITION *p = &(g_pInit->prt); + DX_HANDLE DxNandDev = Dx_GetObject(p->uiDxClassType); + STORAGE_OBJ *pStrg = (STORAGE_OBJ *)Dx_Getcaps(DxNandDev, STORAGE_CAPS_HANDLE, 0); + UINT32 blksize = 0; + if (!pStrg) { + DBG_ERR("DrvEmbMemInit: STORAGE_OBJ is null. uiDxClassType=%x\n", p->uiDxClassType); + return E_SYS; + } + pStrg->Lock(); + + + + if (p->uiDxClassType == (DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM0)) { + //User define SPI-NOR table sample code + #if 0 + if(pStrg->ExtIOCtrl(STRG_EXT_CMD_SPI_IDENTIFY_CB, (UINT32)pmc_identifySpi, 0) == E_OK) { + DBG_IND("^GSet user define SPI-NOR table success\r\n"); + } else { + DBG_ERR("^RSet user define SPI-NOR table fail\r\n"); + } + #endif + pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size); + pStrg->SetParam(STRG_SET_PARTITION_SECTORS, p->uiPhyAddr, p->uiPhySize); + pStrg->GetParam(STRG_GET_BEST_ACCESS_SIZE, (UINT32)&blksize, 0); //get block size + if (p->uiPhyAddr != 0) { + DBG_ERR("loader area have to be at phyical address 0.\r\n"); + return E_PAR; + } + if (blksize != _EMBMEM_BLK_SIZE_) { + DBG_FATAL("EMBMEM_BLK_SIZE in ModelConfig set wrong, must be 0x%0X vs 0x%0X. Set it right and rebuild ModelExt and Project\r\n", blksize, _EMBMEM_BLK_SIZE_); + return E_PAR; + } + + MODELEXT_HEADER *header; + EMB_PARTITION *pEmbPat = (EMB_PARTITION *)Dx_GetModelExtCfg(MODELEXT_TYPE_EMB_PARTITION, &header); + + if (!pEmbPat || !header) { + DBG_ERR("MODELEXT_TYPE_EMB_PARTITION is null\n"); + return E_SYS; + } +#if defined(__FREERTOS) +#if !defined(_EMBMEM_EMMC_) //EMMC not support STRG_GET_DEVICE_PHY_SIZE + UINT32 PhySize; + UINT32 UsedSize = xDrvEmbMemGetUsedSize(pEmbPat, header->number); + pStrg->GetParam(STRG_GET_DEVICE_PHY_SIZE, (UINT32)&PhySize, 0); + + if (UsedSize == 0) { + return E_PAR; + } + + if (UsedSize > PhySize) { + DBG_ERR("UsedSize (%08X) > PhySize (%08X)\r\n", UsedSize, PhySize); + return E_PAR; + } +#endif +#endif + } else { + pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size); + pStrg->SetParam(STRG_SET_PARTITION_RSV_SECTORS, p->uiResvSize, 0); + pStrg->SetParam(STRG_SET_PARTITION_SECTORS, p->uiPhyAddr, p->uiPhySize); + } + + pStrg->Unlock(); + } + + return DX_OK; +} + +UINT32 DrvEmbMemOpen(void) // Common Constructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DrvEmbMemClose(void) // Common Destructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DrvEmbMemState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + DBG_IND("get %08x\r\n", StateID); + switch (StateID) { + case STORAGE_STATE_INSERT: + rvalue = TRUE; + break; + case STORAGE_STATE_LOCK: + rvalue = FALSE; + break; + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("set %08x\r\n", StateID); + switch (StateID) { + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + } + return DX_OK; +} + +UINT32 DrvEmbMemControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + DBG_IND("ctrl %08x\r\n", CtrlID); + + switch (CtrlID) { + default: + DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID); + break; + } + return DX_OK; +} + +UINT32 DrvEmbMemCommand(CHAR *pcCmdStr) //General Command Console +{ + switch (*pcCmdStr) { + case 'd': + /*if (!strncmp(pcCmdStr, "Nand dump", 9)) + { + return TRUE; + }*/ + break; + } + return FALSE; +} + +#endif diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c new file mode 100755 index 000000000..ddb168a21 --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c @@ -0,0 +1,205 @@ +/** + Copyright Novatek Microelectronics Corp. 2013. All rights reserved. + + @file DxUSB.c + @ingroup mIDxUSB + + @brief Detect USB connection status. + + @date 2013/04/30 +*/ + +#include "UsbDevDef.h" +#include "usb2dev.h" +#include "DxUSB.h" +#include "DxCommon.h" +#include "DxApi.h" +#include "io/gpio.h" + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxUSB +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// +//public func +UINT32 DetUSBGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DetUSBSetcfgs(UINT32 CfgID, UINT32 Param1); // Set Config Setting +UINT32 DetUSBInit(void *pInitParam); // Set Init Parameters +UINT32 DetUSBOpen(void); // Common Constructor +UINT32 DetUSBClose(void); // Common Destructor +UINT32 DetUSBState(UINT32 StateID, UINT32 Value); // General Properties +UINT32 DetUSBControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +UINT32 DetUSBCommand(CHAR *pcCmdStr); //General Command Console + +#define GPIO_VBUS D_GPIO_7 + +//dx object +DX_OBJECT gDevUSB = { + DXFLAG_SIGN, + DX_CLASS_USB_EXT, + DETUSB_VER, + "DETECT_USB", + 0, 0, 0, 0, + DetUSBGetcaps, + DetUSBSetcfgs, + DetUSBInit, + DetUSBOpen, + DetUSBClose, + DetUSBState, + DetUSBControl, + DetUSBCommand, + 0, +}; + +static BOOL _DxUSB_get_vbus(void) +{ + gpio_setDir(GPIO_VBUS, GPIO_DIR_INPUT); + return (BOOL)gpio_getPin(GPIO_VBUS); +} + + + +static BOOL DxUSB_GetIsUSBPlug(void) +{ +#if 0 + return (usb2dev_state_change()); +#else + return _DxUSB_get_vbus(); +#endif +} + +static UINT32 DxUSB_UpdateConnectType(void) +{ + USB_CHARGER_STS RetUSB; + UINT32 uiUSBCurrType; + if (!DxUSB_GetIsUSBPlug()) { + uiUSBCurrType = USB_CONNECT_NONE; + } else { + RetUSB = usb2dev_check_charger(0); + switch (RetUSB) { + case USB_CHARGER_STS_NONE: + DBG_DUMP("CONNECT to PC\r\n"); + uiUSBCurrType = USB_CONNECT_PC; + break; + case USB_CHARGER_STS_CHARGING_DOWNSTREAM_PORT: + DBG_DUMP("CONNECT to Charging PC\r\n"); + uiUSBCurrType = USB_CONNECT_CHARGING_PC; + break; + case USB_CHARGER_STS_CHARGER: + DBG_DUMP("CONNECT to CHARGER\r\n"); + uiUSBCurrType = USB_CONNECT_CHARGER; + break; + default: + DBG_ERR("CONNECTION UNKNOWN!\r\n"); + uiUSBCurrType = USB_CONNECT_UNKNOWN; + break; + } + } + return uiUSBCurrType; +} + + + +UINT32 DetUSBGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID) { + case DETUSB_CAPS_BASE: + DBG_IND("get USB caps\r\n"); + v = DETUSB_BF_DETPLUG | DETUSB_BF_CONNTYPE; + break; + case DETUSB_CAPS_PLUG: + DBG_IND("get USB plug\r\n"); + v = DxUSB_GetIsUSBPlug(); + break; + case DETUSB_CAPS_CONN_TYPE: + DBG_IND("get USB connection type\r\n"); + v = DxUSB_UpdateConnectType(); + break; + default: + break; + } + return v; +} +UINT32 DetUSBSetcfgs(UINT32 CfgID, UINT32 Param1) // Set Config Setting +{ + switch (CfgID) { + case DETUSB_CFG_STANDARD_CHARGER: + DBG_IND("set standard charger %08x\r\n", Param1); + usb2dev_set_config(USB_CONFIG_ID_STANDARD_CHARGER, Param1); + break; + + default: + break; + } + return DX_OK; +} +UINT32 DetUSBInit(void *pInitParam) // Set Init Parameters +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DetUSBOpen(void) // Common Constructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DetUSBClose(void) // Common Destructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DetUSBState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + DBG_IND("get %08x\r\n", StateID); + switch (StateID) { + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("set %08x\r\n", StateID); + switch (StateID) { + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + } + return DX_OK; +} + +UINT32 DetUSBControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + DBG_IND("ctrl %08x\r\n", CtrlID); + + switch (CtrlID) { + default: + DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID); + break; + } + return DX_OK; +} + +UINT32 DetUSBCommand(CHAR *pcCmdStr) //General Command Console +{ + return FALSE; +} + + + + +//============================================ + + diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c new file mode 100755 index 000000000..4563d88cf --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c @@ -0,0 +1,550 @@ +/** + Copyright Novatek Microelectronics Corp. 2005. All rights reserved. + + @file IOCfg.c + @ingroup mIPRJAPCommonIO + + @brief IO config module + This file is the IO config module + + @note Nothing. + + @date 2005/12/24 +*/ + +/** \addtogroup mIPRJAPCommonIO */ +//@{ + +#include "kwrap/type.h" +#include "DrvExt.h" +#include "IOCfg.h" +#include "IOInit.h" +#include "PrjInc.h" +#if HUNTING_CAMERA_MCU == ENABLE +#include + +#define IRLED_CTRL_BY_PWM ENABLE//DISABLE// +#define IRLED_PWMID PWMID_3 /* P_GPIO3 */ +#endif + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +static VK_TASK_HANDLE g_handle_ir_cut = 0; + +#if (USE_VIO == ENABLE) +UINT32 Virtual_IO[VIO_MAX_ID] = {0}; +UINT32 vio_getpin(UINT32 id) +{ + if (id >= VIO_MAX_ID) { + return 0; + } + return Virtual_IO[id]; +} +void vio_setpin(UINT32 id, UINT32 v) +{ + if (id >= VIO_MAX_ID) { + return; + } + Virtual_IO[id] = v; +} +#endif + +#define GPIO_SET_NONE 0xffffff +#define GPIO_SET_OUTPUT_LOW 0x0 +#define GPIO_SET_OUTPUT_HI 0x1 + +/** + Do GPIO initialization + + Initialize input/output pins, and pin status + + @param void + @return void +*/ +void IO_InitGPIO(void) +{ +#if 0 + UINT32 iSValue; + + MODELEXT_HEADER *header; + GPIO_INIT_OBJ *uiGPIOMapInitTab; + + uiGPIOMapInitTab = (GPIO_INIT_OBJ *)Dx_GetModelExtCfg(MODELEXT_TYPE_GPIO_INFO, &header); + if (!uiGPIOMapInitTab || !header) { + DBG_FATAL("Modelext: iocfg is null\n"); + return; + } + + UINT32 totalGpioInitCount = header->number; + + DBG_IND("GPIO START\r\n"); + //-------------------------------------------------------------------- + // Open GPIO driver + //-------------------------------------------------------------------- + gpio_open(); + for (iSValue = 0 ; iSValue < totalGpioInitCount ; iSValue++) { + if (uiGPIOMapInitTab[iSValue].GpioDir == GPIO_DIR_INPUT) { + gpio_setDir(uiGPIOMapInitTab[iSValue].GpioPin, GPIO_DIR_INPUT); + pad_set_pull_updown(uiGPIOMapInitTab[iSValue].PadPin, uiGPIOMapInitTab[iSValue].PadDir); + } else { + gpio_setDir(uiGPIOMapInitTab[iSValue].GpioPin, GPIO_DIR_OUTPUT); + if (uiGPIOMapInitTab[iSValue].PadDir == GPIO_SET_OUTPUT_HI) { + gpio_setPin(uiGPIOMapInitTab[iSValue].GpioPin); + } else { + gpio_clearPin(uiGPIOMapInitTab[iSValue].GpioPin); + } + } + } + + //-------------------------------------------------------------------- + // Use Non-Used PWM to be Delay Timer + //-------------------------------------------------------------------- +#if defined(PWMID_TIMER) + Delay_setPwmChannels(PWMID_TIMER); +#endif + + DBG_IND("GPIO END\r\n"); +#endif +} + +/** + Initialize voltage detection + + Initialize voltage detection for battery and flash + + @param void + @return void +*/ + +void IO_InitADC(void) +{ +#if 1 + if (adc_open(ADC_CH_VOLDET_BATTERY) != E_OK) { + DBG_ERR("Can't open ADC channel for battery voltage detection\r\n"); + return; + } + + //650 Range is 250K Hz ~ 2M Hz + adc_setConfig(ADC_CONFIG_ID_OCLK_FREQ, 250000); //250K Hz + + //battery voltage detection + adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_SAMPLE_FREQ, 10000); //10K Hz, sample once about 100 us for CONTINUOUS mode + adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_SAMPLE_MODE, (VOLDET_ADC_MODE) ? ADC_CH_SAMPLEMODE_CONTINUOUS : ADC_CH_SAMPLEMODE_ONESHOT); + adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_INTEN, FALSE); +#endif +#if (ADC_KEY == ENABLE) + if (adc_open(ADC_CH_VOLDET_KEY1) != E_OK) { + DBG_ERR("Can't open ADC channel for battery voltage detection\r\n"); + return; + } + adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_SAMPLE_FREQ, 10000); //10K Hz, sample once about 100 us for CONTINUOUS mode + adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_SAMPLE_MODE, (VOLDET_ADC_MODE) ? ADC_CH_SAMPLEMODE_CONTINUOUS : ADC_CH_SAMPLEMODE_ONESHOT); + adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_INTEN, FALSE); +#endif + + // Enable adc control logic + adc_setEnable(TRUE); + //??? + //this delay is from 650, but it is not necessary for current IC + //Delay_DelayMs(15); //wait ADC stable //for pwr on speed up +} + +void Dx_InitIO(void) // Config IO for external device +{ + + //IO_InitIntDir(); //initial interrupt destination + + //IO_InitPinmux(); //initial PINMUX config + //IO_InitGPIO(); //initial GPIO pin status + IO_InitADC(); //initial ADC pin status +#if 0//defined(_MCU_ENABLE_) + //Open for DxPower operating + Dx_Open(Dx_GetObject(DX_CLASS_POWER_EXT)); + MCUCtrl_Open(); +#endif +gpio_setDir(GPIO_IR_LED_PWR, GPIO_DIR_OUTPUT); +gpio_clearPin(GPIO_IR_LED_PWR); + +gpio_setDir(GPIO_IRCUT_MEN1, GPIO_DIR_OUTPUT); +gpio_clearPin(GPIO_IRCUT_MEN1); + +gpio_setDir(GPIO_IRCUT_MEN2, GPIO_DIR_OUTPUT); +gpio_clearPin(GPIO_IRCUT_MEN2); + +} + +void Dx_UninitIO(void) // Config IO for external device +{ +} + + + +INT32 GPIO_GetBitVal(UINT32 bitNum, UINT32 *bitVal) +{ + *bitVal = gpio_getPin(bitNum); + + return 0; +} +INT32 GPIO_SetBitVal(UINT32 bitNum, UINT32 bitVal) +{ + gpio_setDir(bitNum, GPIO_DIR_OUTPUT); + + if (bitVal) { + gpio_setPin(bitNum); + } else { + gpio_clearPin(bitNum); + } + return 0; +} + +INT32 GPIO_SwitchAdc(UINT32 channel) +{ + //0: ntc, 1:vol + if (channel == 0) { + GPIO_SetBitVal(GPIO_CHARGEIC_ADC_SWITCH, 0); + } else { + GPIO_SetBitVal(GPIO_CHARGEIC_ADC_SWITCH, 1); + } + return 0; +} + +INT32 ADC_GetVal(UINT32 channel, UINT32 *value) +{ + UINT32 adc_value = 0; + + GPIO_SwitchAdc(channel); + + adc_value = adc_readData(ADC_CHANNEL_0); + + *value = adc_value; + + return 0; +} + +INT32 GPIO_SetChargeICEnable(UINT32 en) +{ + GPIO_SetBitVal(GPIO_CHARGEIC_EN, en); + return 0; +} + +INT32 GPIO_GetChargeICEnable(void) +{ + return gpio_getPin(GPIO_CHARGEIC_EN); +} + +INT32 GPIO_GetChargeICState(void) +{ + return gpio_getPin(GPIO_CHARGEIC_STATE); +} + + +INT32 GPIO_GetAccStatus(void) +{ + return !gpio_getPin(GPIO_ACC); +} + +INT32 GPIO_GetParkingStatus(void) +{ + return !gpio_getPin(GPIO_PARKING); +} + + + +INT32 GPIO_SetPAStatus(BOOL en) +{ + gpio_setDir(GPIO_PA, GPIO_DIR_OUTPUT); + if(en) + { + gpio_setPin(GPIO_PA); + } + else + { + gpio_clearPin(GPIO_PA); + } + return gpio_getPin(GPIO_PA); +} + +void GPIO_SetLedStatus(UINT32 led,BOOL en) +{ + + switch(led) + { + case 0: + { + gpio_setDir(GPIO_RED_LED, GPIO_DIR_OUTPUT); + if(en) + { + gpio_setPin(GPIO_RED_LED); + } + else + { + gpio_clearPin(GPIO_RED_LED); + } + } + break; + case 1: + { + gpio_setDir(GPIO_GREEN_LED, GPIO_DIR_OUTPUT); + if(en) + { + gpio_setPin(GPIO_GREEN_LED); + } + else + { + gpio_clearPin(GPIO_GREEN_LED); + } + } + break; + default: + break; + } +} + +INT32 GPIO_SetBacklightStatus(BOOL en) +{ + gpio_setDir(GPIO_LCD_BLG_PCTL, GPIO_DIR_OUTPUT); + if(en) + { + gpio_setPin(GPIO_LCD_BLG_PCTL); + } + else + { + gpio_clearPin(GPIO_LCD_BLG_PCTL); + } + return gpio_getPin(GPIO_LCD_BLG_PCTL); +} + + void GOIO_Turn_Onoff_IRCUT(UINT8 onoff) + { + static UINT32 ir_flag = 1; + //printf("[%s:%d]s onoff:%d\n",__FUNCTION__,__LINE__,onoff); + DBG_IND(" s onoff:%d\n",onoff); + + if(ir_flag) + { + gpio_setDir(GPIO_IRCUT_MEN1, GPIO_DIR_OUTPUT); + gpio_setDir(GPIO_IRCUT_MEN2, GPIO_DIR_OUTPUT); + ir_flag = 0; + } + + if(onoff ==1) + { + gpio_setPin(GPIO_IRCUT_MEN1); + gpio_clearPin(GPIO_IRCUT_MEN2); + sf_ir_cut_ctrl_PowerOff(); + + } + else if(onoff == 0) + { + gpio_setPin(GPIO_IRCUT_MEN2); + gpio_clearPin(GPIO_IRCUT_MEN1); + sf_ir_cut_ctrl_PowerOff(); + } + else + { + gpio_clearPin(GPIO_IRCUT_MEN1); + gpio_clearPin(GPIO_IRCUT_MEN2); + } + //DBG_DUMP("\r\n DrvGPIO_SetIRCut value:%d \r\n",onoff); + //Delay_DelayMs(20); + //gpio_clearPin(GPIO_IRCUT_MEN1); + //gpio_clearPin(GPIO_IRCUT_MEN2); + //printf("[%s:%d]e\n",__FUNCTION__,__LINE__); + DBG_IND(" e\n"); + } + + +void GPIO_IRLed_Turn_Onoff(BOOL onoff) +{ + gpio_setDir(GPIO_IR_LED_PWR, GPIO_DIR_OUTPUT); + if (onoff ==1) + gpio_setPin(GPIO_IR_LED_PWR); + else + gpio_clearPin(GPIO_IR_LED_PWR); + DBG_ERR("\r\n DrvGPIO_SetIR LED value:%d \r\n",onoff); +} + +/************************************************* + Function: IrCutCtrlThreadTask + Description: receive event and set ir cut power off + Input: N/A + Output: N/A + Return: N/A + Others: N/A +*************************************************/ + +THREAD_RETTYPE IrCutCtrlThread(void *arg) +{ + THREAD_ENTRY(); + + Delay_DelayMs(80); + GOIO_Turn_Onoff_IRCUT(2); //IR CUT power off + //DBG_DUMP("\r\n [%s:%d] s3 \r\n",__FUNCTION__,__LINE__); + + g_handle_ir_cut = 0; + THREAD_RETURN(0); +} + +/************************************************* + Function: IrCutCtrlThreadInit + Description: init thread + Input: N/A + Output: N/A + Return: N/A + Others: N/A +*************************************************/ +static void IrCutCtrlThreadInit(void) +{ + //DBG_DUMP("\r\n [%s:%d] s \r\n",__FUNCTION__,__LINE__); + + g_handle_ir_cut = vos_task_create(IrCutCtrlThread, NULL, "IrCutCtrlThread", 18, 2048); + if(!g_handle_ir_cut){ + DBG_ERR("[ERROR] IR CUT thread creat failed!\r\n"); + Delay_DelayMs(80); + GOIO_Turn_Onoff_IRCUT(2); + return ; + } + else + vos_task_resume(g_handle_ir_cut); + //DBG_DUMP("\r\n [%s:%d] e g_handle_ir_cut:%d\r\n",__FUNCTION__,__LINE__,g_handle_ir_cut); +} + +/************************************************* + Function: sf_ir_cut_ctrl_PowerOff + Description: init and set event flag + Input: N/A + Output: N/A + Return: N/A + Others: N/A +*************************************************/ +void sf_ir_cut_ctrl_PowerOff(void) +{ + //DBG_DUMP("\r\n [%s:%d] s \r\n",__FUNCTION__,__LINE__); + if(g_handle_ir_cut == 0) + { + IrCutCtrlThreadInit(); + } + //DBG_DUMP("\r\n [%s:%d] e \r\n",__FUNCTION__,__LINE__); +} + + +#if HUNTING_CAMERA_MCU == ENABLE + +extern int nvt_system(const char* pCommand); + +/************************************************* + Function: sf_ir_led_set + Description: IR LED luminance control + Input: mode: 1:on 0:off ; + Output: N/A + Return: N/A + Others: N/A +*************************************************/ +void sf_ir_led_set(UINT8 mode, UINT8 flashLed, UINT8 stillExp, UINT8 isSnapVideo) +{ + //printf("[%s:%d]s mode:%d,flashLed:%d,isSnapVideo:%d\n",__FUNCTION__,__LINE__,mode,flashLed, isSnapVideo); + DBG_IND(" s mode:%d,flashLed:%d,isSnapVideo:%d\n",mode,flashLed, isSnapVideo); + UINT32 ui_rise = 0; ///< Rising at which clock + int ret = 0; + char argv[70] = {0}; +//530£¬940µÆ ´ý»úµçÁ÷120 ¿ªµÆpic1.0£¨10£© video810£¨25£© + if(mode) + { + #if HUNTING_IR_LED_940 == ENABLE + if(isSnapVideo) + { + if(flashLed == 0) + { + ui_rise = 30;//70% + } + else + { + ui_rise = 60;//40% + } + } + else + { + if(flashLed == 0) + { + ui_rise = 15;//85% + } + else + { + ui_rise = 55;//45% + } + } + #else + + //530£¬850µÆ ´ý»úµçÁ÷120 ¿ªµÆpic800£¨25£© video680£¨35£© + if(isSnapVideo) + { + if(flashLed == 0) + { + ui_rise = 35;//65% + } + else + { + ui_rise = 65;//35% + } + } + else + { + if(flashLed == 0) + { + ui_rise = 25;//75% + } + else + { + ui_rise = 60;//40% + } + } + #endif + + sprintf(argv, "echo \"w openpwm 3 100 %d 100 14 0 0 0\" > /proc/pwm/cmd", ui_rise); + ret = nvt_system(argv); + + //printf("%s:%d argv:%s\n", __FUNCTION__, __LINE__,argv); + DBG_IND(" argv:%s\n", argv); + if(0 != ret) + { + printf("%s:%d sf pwm open failed, errno\n", __FUNCTION__, __LINE__); + DBG_ERR("sf pwm open failed, errno(%d)\n", errno); + return; + } + else + { + DBG_IND("sf pwm open success\n"); + //printf("%s:%d sf pwm open success\n", __FUNCTION__, __LINE__); + //DBG_DUMP("sf pwm open success\n"); + } + + sf_set_night_led_flag(1); + } + else + { + sprintf(argv, "echo \"w closepwm 3\" > /proc/pwm/cmd"); + ret = nvt_system(argv); + DBG_IND("argv:%s\n",argv); + //printf("%s:%d argv:%s\n", __FUNCTION__, __LINE__,argv); + if(0 != ret) + { + DBG_ERR("sf pwm failed, errno(%d)\n", errno); + printf("%s:%d sf pwm failed, errno\n", __FUNCTION__, __LINE__); + return; + } + else + { + DBG_IND("sf pwm close success\n"); + //printf("%s:%d sf pwm close success\n", __FUNCTION__, __LINE__); + //DBG_DUMP("sf pwm close success\n"); + } + sf_set_night_led_flag(0); + } +} + +#endif diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h new file mode 100755 index 000000000..faf42ff79 --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h @@ -0,0 +1,475 @@ +/** + Copyright Novatek Microelectronics Corp. 2012. All rights reserved. + + @file IOCfg.h + @ingroup mIPRJAPCommonIO + + @brief Header file of IO config + This file is the header file of IO config + + @note Nothing. + @date 2012/09/04 +*/ + +/** \addtogroup mIPRJAPCommonIO */ +//@{ + +#ifndef _IOCFG_H +#define _IOCFG_H + +#include "kwrap/type.h" +#include "IOInit.h" +#if 0 +#include "pad.h" +#include "top.h" +#include "gpio.h" +#include "adc.h" + +#include "pwm.h" + +#include "gpio_info.h" +#endif +#include "io/adc.h" +#include "io/gpio.h" + +#define USE_VIO DISABLE + +#if (USE_VIO == ENABLE) +#define VIO_TV_DET 1 +#define VIO_HDMI_DET 2 +#define VIO_LCD2_DET 3 +#define VIO_SENSOR2_DET 4 +#define VIO_SENSOR1_DET 5 +#define VIO_AIN_DET 6 +#define VIO_MAX_ID 16 +extern UINT32 vio_getpin(UINT32 id); +extern void vio_setpin(UINT32 id, UINT32 v); +#endif + +//-------------------------------------------------------------------- +// ADC common +//-------------------------------------------------------------------- + +#define GPIO_KEY ENABLE +#define ADC_KEY DISABLE + +#define VOLDET_ADC_CONT_MODE ENABLE //!< ENABLE for continuous, DISABLE for one-shot + +#if (VOLDET_ADC_CONT_MODE == ENABLE) +#define VOLDET_ADC_MODE TRUE +#else +#define VOLDET_ADC_MODE FALSE +#endif + +//-------------------------------------------------------------------- +// PWM common +//-------------------------------------------------------------------- + + + +//-------------------------------------------------------------------- +// Display device +//-------------------------------------------------------------------- +// LCD communicate +#define LCD_COMM_DUMMY 0 +#define LCD_COMM_BY_GPIO 1 +#define LCD_COMM_BY_SIF 2 +#define LCD_COMM_CTRL LCD_COMM_BY_GPIO + +#if (LCD_COMM_CTRL == LCD_COMM_BY_GPIO) +#define GPIO_LCD_SIF_SEN P_GPIO_7//S_GPIO_4 //FPGA +#define GPIO_LCD_SIF_SCK P_GPIO_8//S_GPIO_5 //FPGA +#define GPIO_LCD_SIF_SDA P_GPIO_9//S_GPIO_6 //FPGA +#endif +#if (LCD_COMM_CTRL == LCD_COMM_BY_SIF) +#define SIF_LCD_CH SIF_CH2 +#define PAD_LCD_SIF_SEN PAD_PIN_PGPIO7 +#define PAD_LCD_SIF_SCK PAD_PIN_PGPIO8 +#define PAD_LCD_SIF_SDA PAD_PIN_PGPIO9 +#define DIR_LCD_SIF_SEN PAD_PULLUP +#define DIR_LCD_SIF_SCK PAD_PULLUP +#define DIR_LCD_SIF_SDA PAD_PULLUP +#endif +//#define GPIO_LCD_SLEEP 87 //FPGA not support +#define GPIO_LCD_RESET L_GPIO_1 + +// LCD backlight +#define LCD_BACKLIGHT_DUMMY 0 +#define LCD_BACKLIGHT_BY_GPIO 1 +#define LCD_BACKLIGHT_BY_PWM 2 +#define LCD_BACKLIGHT_BY_PWRIC 3 +#define LCD_BACKLIGHT_CTRL LCD_BACKLIGHT_BY_GPIO //FPGA +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) +#define GPIO_PWM_LCD_BLG_PCTL x +#define PWMID_LCD_BLG_PCTL PWMID_x +#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO) +#define GPIO_LCD_BLG_PCTL S_GPIO_3 +#define PAD_LCD_BLG_PCTL PAD_PIN_SGPIO3 +#endif + +// LCD2 communicate +#define LCD2_COMM_CTRL LCD_COMM_BY_GPIO //FPGA +#if (LCD2_COMM_CTRL == LCD_COMM_BY_GPIO) +#define GPIO_LCD2_SIF_SEN P_GPIO_23 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2 +#define GPIO_LCD2_SIF_SCK P_GPIO_25 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2 +#define GPIO_LCD2_SIF_SDA P_GPIO_26 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2 +#endif +#if (LCD2_COMM_CTRL == LCD_COMM_BY_SIF) +#define SIF_LCD2_CH SIF_CHx +#define PAD_LCD2_SIF_SEN PAD_PIN_PGPIO23 +#define PAD_LCD2_SIF_SCK PAD_PIN_PGPIO25 +#define PAD_LCD2_SIF_SDA PAD_PIN_PGPIO26 +#endif +//#define GPIO_LCD2_SLEEP 87 //FPGA not support +//#define GPIO_LCD2_RESET 88 //FPGA not support + +// LCD2 backlight +#define LCD2_BACKLIGHT_CTRL LCD_BACKLIGHT_DUMMY //FPGA +#if (LCD2_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) +#define GPIO_PWM_LCD2_BLG_PCTL x +#define PWMID_LCD2_BLG_PCTL PWMID_x +#elif (LCD2_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO) +#define GPIO_LCD2_BLG_PCTL x_GPIO_x +#define PAD_LCD2_BLG_PCTL PAD_PIN_xGPIOx +#endif + +// TV +#define TV_DET_DUMMY 0 +#define TV_DET_BY_VIO 1 +#define TV_DET_BY_GPIO 2 +#define TV_DET_BY_ADC 3 +#define TV_DET_CTRL TV_DET_BY_VIO //FPGA +#if (TV_DET_CTRL == TV_DET_BY_GPIO) +#define GPIO_TV_PLUG C_GPIO_x +#define PAD_TV_PLUG PAD_PIN_CGPIOx +#endif +#if (TV_DET_CTRL == TV_DET_BY_ADC) +#define ADC_CH_TV_PLUG ADC_CHANNEL_x +#endif + +// HDMI +#define HDMI_DET_DUMMY 0 +#define HDMI_DET_BY_VIO 1 +#define HDMI_DET_BY_GPIO 2 +#define HDMI_DET_BY_ADC 3 +#define HDMI_DET_BY_HOTPLUG 4 +#define HDMI_DET_CTRL HDMI_DET_BY_VIO //EVB + +// LCD2 +#define LCD2_DET_DUMMY 0 +#define LCD2_DET_BY_VIO 1 +#define LCD2_DET_BY_GPIO 2 +#define LCD2_DET_BY_ADC 3 +#define LCD2_DET_CTRL LCD2_DET_BY_VIO //EVB + +// AIN +#define AIN_DET_DUMMY 0 +#define AIN_DET_BY_VIO 1 +#define AIN_DET_BY_GPIO 2 +#define AIN_DET_CTRL AIN_DET_BY_VIO //EVB +#if (AIN_DET_CTRL == AIN_DET_BY_GPIO) +#define GPIO_AIN_PLUG C_GPIO_x +#define PAD_AIN_PLUG PAD_PIN_CGPIOx +#endif + +//-------------------------------------------------------------------- +// Storage device +//-------------------------------------------------------------------- +// CARD +// card power +#define GPIO_CARD_POWER P_GPIO_7 +#define PAD_CARD_POWER PAD_PIN_PGPIO7 +// SD card detect +#define GPIO_CARD_DETECT C_GPIO_9 +#define PAD_CARD_DETECT PAD_PIN_CGPIO9 +// SD card write protect +#define GPIO_CARD_WP 0//P_GPIO_11 +#define PAD_CARD_WP 0//PAD_PIN_PGPIO11 + +extern BOOL SDIOCardUser_CheckCardInserted(void); +extern BOOL SDIOCardUser_CheckCardWP(void); +#if defined(_EMBMEM_EMMC_) +extern BOOL SDIO2CardUser_CheckCardInserted(void); +extern BOOL SDIO2CardUser_CheckCardWP(void); +#endif + +//-------------------------------------------------------------------- +// Audio device +//-------------------------------------------------------------------- +//Audio +extern BOOL GPIOMap_DetAudio(void); + + +//-------------------------------------------------------------------- +// Input device +//-------------------------------------------------------------------- +// Key defined (650 FPGA KEYPAD) +// +// +//--------------------------// //--------------------------// +// SW3 SW1 SW4 SW2 // // kzi kzo ks1 ks2 // +// // // // +// SW7 // // ku // +// // // // +// SW5 SW6 SW8 // // kl ke kr // +// // // // +// SW10 // // kd // +// // // // +// SW12 SW11 SW9 // // km kmd kmp // +// // // // +//--------------------------// //--------------------------// +// +// SW1~SW12 = MC22~MC31,DCPIO4,5 = C_GPIO_22~31,DCPIO4,5 (Roy) +// Low (Roy) +// +#define GPIO_KEY_ZOOMOUT P_GPIO_20 // Key Zoom Out (kzo) +#define PAD_KEY_ZOOMOUT PAD_PIN_CGPIO20 +#define GPIO_KEY_SHUTTER2 C_GPIO_19 // Key Shutter2 (ks2) +#define PAD_KEY_SHUTTER2 PAD_PIN_CGPIO19 +#define GPIO_KEY_ZOOMIN P_GPIO_22 // Key Zoom In (kzi) +#define PAD_KEY_ZOOMIN PAD_PIN_CGPIO22 +#define GPIO_KEY_SHUTTER1 P_GPIO_23 // Key Shutter1 (ks1) +#define PAD_KEY_SHUTTER1 PAD_PIN_PGPIO23 +#define GPIO_KEY_LEFT C_GPIO_18 // Key Left (kl) +#define PAD_KEY_LEFT PAD_PIN_CGPIO18 +#define GPIO_KEY_ENTER P_GPIO_4 // Key OK (ke) +#define PAD_KEY_ENTER PAD_PIN_PGPIO4 +#define GPIO_KEY_UP C_GPIO_22 // Key Up (ku) +#define PAD_KEY_UP PAD_PIN_CGPIO22 +#define GPIO_KEY_RIGHT C_GPIO_4 // Key Right (kr) +#define PAD_KEY_RIGHT PAD_PIN_CGPIO4 +#define GPIO_KEY_PLAYBACK C_GPIO_17 // Key Playback (kmp) +#define PAD_KEY_PLAYBACK PAD_PIN_CGPIO17 +#define GPIO_KEY_DOWN C_GPIO_20 // Key Down (kd) +#define PAD_KEY_DOWN PAD_PIN_CGPIO20 +#define GPIO_KEY_MODE D_GPIO_4 // Key Mode (kmd) +#define PAD_KEY_MODE PAD_PIN_DGPIO4 +#define GPIO_KEY_MENU C_GPIO_21 // Key Menu (km) +#define PAD_KEY_MENU PAD_PIN_CGPIO21 +/*MCU DATAREADY msg*/ +#define GPIO_KEY_DATAREADY P_GPIO_6 +#define PAD_KEY_DATAREADY PAD_PIN_PGPIO6 + +#define GPIO_KEY_TEST S_GPIO_6 +#define PAD_KEY_TEST PAD_PIN_SGPIO6 + +//#define ADC_CH_VOLDET_MS1 ADC_CHANNEL_1 +//#define ADC_CH_VOLDET_MS2 ADC_CHANNEL_0 +#define ADC_CH_VOLDET_KEY1 ADC_CHANNEL_2 + + +//Touch panel controller + +//#define GPIO_TP_BUSY (2 | GPIO_IS_DGPIO) //HW TS_INT =DGPIO-02 +#define GPIO_TP_PENIRQ (7 | GPIO_IS_DGPIO) //HW TS_PENIRQ =DGPIO-12 +#define GPIO_TP_DOUT 0 //P_GPIO_58 //HW TP_DI =SBDAT0/AGPIO-26 (FW output = HW input) +#define GPIO_TP_DIN (1 | GPIO_IS_DGPIO) //HW TS_DO =DGPIO-01 (FW input = HW output) +#define GPIO_TP_DCLK 0//P_GPIO_57 //HW TS_CLK =SBCK0/AGPIO-25 +//#define GPIO_TP_CS 28 //HW TS_CS =SBCS1/AGPIO-28 //SIF channel 1 +#define GPIO_TP_CS 0//P_GPIO_56 //HW TS_CS =SBCS0/AGPIO-27 //SIF channel 0 +//#define PAD_TP_BUSY PAD_PIN_DGPIO2 +#define PAD_TP_PENIRQ PAD_PIN_DGPIO7 +#define PAD_TP_DOUT PAD_PIN_PGPIO58 +#define PAD_TP_DIN PAD_PIN_DGPIO1 +#define PAD_TP_DCLK PAD_PIN_PGPIO57 +//#define PAD_TP_CS PAD_PIN_SBCS1 //SIF channel 1 +#define PAD_TP_CS PAD_PIN_PGPIO56 //SIF channel 0 + + +//G-Sensor +/* +#define GPIO_GS_INT1 (3 | GPIO_IS_DGPIO) +#define GPIO_GS_INT2 (4 | GPIO_IS_DGPIO) +#define PAD_GS_INT1 PAD_PIN_DGPIO3 +#define PAD_GS_INT2 PAD_PIN_DGPIO4 +*/ +extern UINT32 GPIOMap_DetKey(void); +extern UINT32 GPIOMap_DetModeDial(void); +extern BOOL GPIOMap_DetShutter1(void); +extern BOOL GPIOMap_DetMacro(void); +extern BOOL GPIOMap_DetPoweroff(void); + +//-------------------------------------------------------------------- +// Output device +//-------------------------------------------------------------------- +// LED +#define LED_RED_DUMMY 0 +#define LED_RED_BY_GPIO 1 +#define LED_RED_BY_MCU 3 +#define LED_RED_CTRL LED_RED_DUMMY +#define GPIO_RED_LED P_GPIO_9 //FPGA +#define PAD_RED_LED PAD_PIN_PGPIO9 + +#define LED_GREEN_DUMMY 0 +#define LED_GREEN_BY_GPIO 1 +#define LED_GREEN_BY_MCU 3 +#define LED_GREEN_CTRL LED_RED_DUMMY +#define GPIO_GREEN_LED P_GPIO_10 //FPGA +#define PAD_GREEN_LED PAD_PIN_PGPIO10 + +#define GPIO_LED_STATUS_R DSI_GPIO_8 // +#define PAD_LED_STATUS_R PAD_PIN_DSIGPIO8 +#define GPIO_LED_STATUS_G DSI_GPIO_9// +#define PAD_LED_STATUS_G PAD_PIN_DSIGPIO9 +#define GPIO_LED_SD_G DSI_GPIO_7// +#define PAD_LED_SD_G PAD_PIN_DSIGPIO7 +#define GPIO_LED_SD_R DSI_GPIO_4// +#define PAD_LED_SD_R PAD_PIN_DSIGPIO4 +#define GPIO_LED_WIFI_B DSI_GPIO_6// +#define PAD_LED_WIFI_B PAD_PIN_DSIGPIO6 +#define GPIO_LED_BAT_1 DSI_GPIO_5// +#define PAD_LED_BAT_1 PAD_PIN_DSIGPIO5 +#define GPIO_LED_BAT_2 DSI_GPIO_2// +#define PAD_LED_BAT_2 PAD_PIN_DSIGPIO2 +#define GPIO_LED_BAT_3 DSI_GPIO_3// +#define PAD_LED_BAT_3 PAD_PIN_DSIGPIO3 +#define GPIO_LED_BAT_4 DSI_GPIO_0// +#define PAD_LED_BAT_4 PAD_PIN_DSIGPIO0 +#define GPIO_LED_SIG_1_R DSI_GPIO_10// +#define PAD_LED_SIG_1_R PAD_PIN_DSIGPIO10 +#define GPIO_LED_SIG_1_G DSI_GPIO_1// +#define PAD_LED_SIG_1_G PAD_PIN_DSIGPIO1 +#define GPIO_LED_SIG_2 L_GPIO_1// +#define PAD_LED_SIG_2 PAD_PIN_LGPIO1 +#define GPIO_LED_SIG_3 L_GPIO_0// +#define PAD_LED_SIG_3 PAD_PIN_LGPIO0 +#define GPIO_LED_SIG_4 P_GPIO_8// +#define PAD_LED_SIG_4 PAD_PIN_PGPIO8 + + +#define LED_FOCUS_DUMMY 0 +#define LED_FOCUS_BY_GPIO 1 +#define LED_FOCUS_BY_PWM 2 //use PWM to control LED brightness +#define LED_FOCUS_BY_MCU 3 + +#define LED_FOCUS_CTRL LED_RED_DUMMY +#define GPIO_FOCUS_LED x_GPIO_x //FPGA +#define PAD_FOCUS_LED PAD_PIN_xGPIOx +#define PWMID_FOCUS_LED PWMID_x //FPGA + +#if defined(_MCU_ENABLE_) +#undef LED_RED_CTRL +#define LED_RED_CTRL LED_RED_BY_MCU + +#undef LED_GREEN_CTRL +#define LED_GREEN_CTRL LED_GREEN_BY_MCU + +#undef LED_FOCUS_CTRL +#define LED_FOCUS_CTRL LED_FOCUS_BY_MCU +#endif + +#define GPIO_IR_LED_PWR P_GPIO_3 //ir led pwr +#define PAD_IR_LED_PWR PAD_PIN_PGPIO3 + +#define GPIO_IRCUT_MEN1 D_GPIO_6 // M_EN1 IRCUT 1 +#define PAD_IRCUT_MEN1 PAD_PIN_DGPIO6 +#define GPIO_IRCUT_MEN2 D_GPIO_5 // M_EN2 IRCUT 2 +#define PAD_IRCUT_MEN2 PAD_PIN_DGPIO5 + +#define GPIO_USB_MUX_S P_GPIO_2 //USB_MUX_S +#define PAD_USB_MUX_S PAD_PIN_PGPIO2 + +#define GPIO_4G_USB_BOOT S_GPIO_5 //4G_USB_BOOT +#define PAD_4G_USB_BOOT PAD_PIN_SGPIO5 +//----------charge ic ---------------- +#define GPIO_CHARGEIC_EN C_GPIO_4 +#define GPIO_PIR_STATE C_GPIO_7 +#define GPIO_CHARGEIC_STATE P_GPIO_12 +#define GPIO_CHARGEIC_ADC_SWITCH L_GPIO_0 + +#define GPIO_ACC P_GPIO_5 +#define GPIO_PA P_GPIO_0 +#define GPIO_PARKING P_GPIO_6 + + +//-------------------------------------------------------------------- +// Power device +//-------------------------------------------------------------------- +//Battery +#define ADC_CH_VOLDET_BATTERY ADC_CHANNEL_0 +extern char *VolDet_GetStatusString(void); + + + +//-------------------------------------------------------------------- +// Sensor device +//-------------------------------------------------------------------- +// CCD +/* +typedef enum +{ + CCD_PWR_STATUS_OFF = 0, + CCD_PWR_STATUS_ON, + CCD_PWR_STATUS_SLEEP, + CCD_PWR_STATUS_MAXIDX +}CCD_PWR_STATUS; +*/ +/* +#define GPIO_CCDTG_VH L_GPIO_20 +#define GPIO_CCDTG_VL L_GPIO_19 +//#define GPIO_CCDTG_VH_2 50 +#define GPIO_CCDTG_RST C_GPIO_22 +//#define GPIO_CCDTG_HDRV_EN 88 +#define SIF_SENSOR_TG SIF_CH2 +#define SIF_SENSOR_AFE SIF_CH3 +*/ +extern void GPIOMap_TurnOnCCDPower(void); +extern void GPIOMap_TurnOffCCDPower(void); +extern UINT8 GPIOMap_IsCCDPowerOn(void); +extern void GPIOMap_SleepCCDPower(void); +extern void GPIOMap_WakeUpCCDPower(void); + +//-------------------------------------------------------------------- +// Storbe device +//-------------------------------------------------------------------- +// STROBE +/* +#define GPIO_FLASH_CHARGE C_GPIO_21 +#define PAD_FL_CHARGE PAD_PIN_CGPIO21 +#define GPIO_FLASH_RDY P_GPIO_12 +#define PAD_FL_RDY PAD_PIN_PGPIO12 +#define GPIO_FLASH_TRIGGER D_GPIO_7 +#define PAD_FL_TRIGGER PAD_PIN_DGPIO7 +*/ + +//-------------------------------------------------------------------- +// Lens device +//-------------------------------------------------------------------- +// BCS 2.7 ~ 12 mm lens + SANYO LV8044 motor IC +#define GPIO_LENS_RESET 0 // output + +#define GPIO_LENS_ZOOM_INTR 0 // input +#define PAD_LENS_ZOOM_INTR 0 + +#define GPIO_LENS_FOCUS_INTR 0 // input +#define PAD_LENS_FOCUS_INTR 0 + +#define GPIO_LENS_IR_CTRL0 P_GPIO_6 // output +#define GPIO_LENS_IR_CTRL1 P_GPIO_6 // output +#define PAD_LENS_IR_CTRL0 PAD_PIN_PGPIO6 +#define PAD_LENS_IR_CTRL1 PAD_PIN_PGPIO7 + + +extern INT32 GPIO_GetBitVal(UINT32 bitNum, UINT32 *bitVal); +extern INT32 GPIO_SetBitVal(UINT32 bitNum, UINT32 bitVal); +extern INT32 GPIO_SwitchAdc(UINT32 channel); +extern INT32 ADC_GetVal(UINT32 channel, UINT32 *value); +extern INT32 GPIO_SetChargeICEnable(UINT32 en); +extern INT32 GPIO_GetChargeICEnable(void); +extern INT32 GPIO_GetChargeICState(void); + +extern INT32 GPIO_GetAccStatus(void); +extern INT32 GPIO_SetPAStatus(BOOL en); + +extern void GPIO_SetLedStatus(UINT32 led,BOOL en); +extern INT32 GPIO_SetBacklightStatus(BOOL en); +extern void GOIO_Turn_Onoff_IRCUT(UINT8 onoff); +extern void GPIO_IRLed_Turn_Onoff(BOOL onoff); + + +void sf_ir_led_set(UINT8 mode, UINT8 flashLed, UINT8 stillExp, UINT8 isSnapVideo); +void sf_ir_cut_ctrl_PowerOff(void); + +#endif + +//@} diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/Source.mk b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/Source.mk new file mode 100755 index 000000000..2d1ff1d28 --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/Source.mk @@ -0,0 +1,26 @@ +DTS_SENSOR = ./SrcCode/Dx/$(MODEL)/sensor.dts +DTS_APP = ./SrcCode/Dx/$(MODEL)/application.dts +DX_SRC = \ + ./SrcCode/Dx/$(MODEL)/DxInput_Key.c \ + ./SrcCode/Dx/$(MODEL)/IOCfg.c \ + ./SrcCode/Dx/$(MODEL)/DxUsb.c \ + ./SrcCode/Dx/$(MODEL)/DxCfg.c \ + ./SrcCode/Dx/$(MODEL)/DxDisplay_LCD.c \ + ./SrcCode/Dx/$(MODEL)/DxPower_Battery.c \ + ./SrcCode/Dx/$(MODEL)/DxPower_DC.c \ + ./SrcCode/Dx/$(MODEL)/DxStorage_Card.c \ + ./SrcCode/Dx/$(MODEL)/DxStorage_EmbMem.c + +# ./SrcCode/Dx/$(MODEL)/DxCamera_Sensor.c \ +# ./SrcCode/Dx/$(MODEL)/DxCfg.c +# ./SrcCode/Dx/$(MODEL)/DxCmd.c +# ./SrcCode/Dx/$(MODEL)/DxDisplay_LCD.c +# ./SrcCode/Dx/$(MODEL)/DxOutput_LED.c +# ./SrcCode/Dx/$(MODEL)/DxPower_Battery.c +# ./SrcCode/Dx/$(MODEL)/DxSound_Audio.c +# ./SrcCode/Dx/$(MODEL)/DxStorage_Card.c +# ./SrcCode/Dx/$(MODEL)/DxStorage_EmbMem.c +# ./SrcCode/Dx/$(MODEL)/DxWiFi.c +# ./SrcCode/Dx/$(MODEL)/DxCmd.c + + diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/application.dts b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/application.dts new file mode 100755 index 000000000..01c808c03 --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/application.dts @@ -0,0 +1,10 @@ +/* + * Novatek Ltd. NA51055 BSP part of dts + * + * Cortex-A9 + * + */ + +/dts-v1/; +#include "isp.dtsi" /* sensor */ + diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi new file mode 100755 index 000000000..95ae4659e --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi @@ -0,0 +1,30 @@ +/ { + isp { + sensor@0 { + ae_path = "/isp/ae/os05b10_ae_0"; + awb_path = "/isp/awb/os05b10_awb_0"; + iq_path = "/isp/iq/os05b10_iq_0"; + #iq_cap_path = "/isp/iq/gc5603_iq_0_cap"; + #iq_shading_path = "/isp/iq/gc5603_iq_shading_0"; + }; + sensor@1 { + ae_path = "/isp/ae/os05a10_ae_0"; + awb_path = "/isp/awb/os05a10_awb_0"; + iq_path = "/isp/iq/os05a10_iq_0"; + #iq_cap_path = "/isp/iq/os05a10_iq_0_cap"; + }; + /* label for ae, awb, iq table */ + ae: ae { + }; + awb: awb { + }; + iq: iq { + }; + }; +}; + +/* Note: put include files in the tail since label should be declared first. */ +#include "os05b10_ae_0.dtsi" +#include "os05b10_awb_0.dtsi" +#include "os05b10_iq_0.dtsi" + diff --git a/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/sensor.dts b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/sensor.dts new file mode 100755 index 000000000..03be25e4a --- /dev/null +++ b/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/sensor.dts @@ -0,0 +1,48 @@ +/* + * Novatek Ltd. NA51055 BSP part of dts + * + * Cortex-A9 + * + */ + +/dts-v1/; + +/ { + sensor_ssenif { + ssenif@0 { + if_type = <0x05>; /* HD_COMMON_VIDEO_IN_MIPI_CSI */ + sensor_pinmux = <0x220>; + serial_if_pinmux = <0xf01>; /*PIN_MIPI_LVDS_CFG_CLK2 | PIN_MIPI_LVDS_CFG_DAT0 | PIN_MIPI_LVDS_CFG_DAT1 | PIN_MIPI_LVDS_CFG_DAT2 | PIN_MIPI_LVDS_CFG_DAT3*/ + cmd_if_pinmux = <0x01>; /*PIN_I2C_CFG_CH1*/ + clk_lane_sel = <0x00>; /* HD_VIDEOCAP_SEN_CLANE_SEL_CSI0_USE_C0 */ + sen_2_serial_pin_map = <0x00000000 0x00000001 0x00000002 0x00000003 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + senout_pxlfmt = <0x420a0000>; /* HD_VIDEO_PXLFMT_RAW10_SHDR2 */ + capout_pxlfmt = <0x420c0000>; /* HD_VIDEO_PXLFMT_RAW10_SHDR2 */ + data_lane = <0x04>; + shdr_map = <0x00 0x00>; + }; + ssenif@1 { + if_type = <0x05>; /* HD_COMMON_VIDEO_IN_MIPI_CSI */ + sensor_pinmux = <0x20>; + serial_if_pinmux = <0xC02>; + cmd_if_pinmux = <0x01>; + clk_lane_sel = <0x14>; /* HD_VIDEOCAP_SEN_CLANE_SEL_CSI1_USE_C1 */ + sen_2_serial_pin_map = <0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000001 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + senout_pxlfmt = <0x410c0000>; /* HD_VIDEO_PXLFMT_RAW12 */ + capout_pxlfmt = <0x410c0000>; /* HD_VIDEO_PXLFMT_RAW12 */ + data_lane = <0x02>; + }; + }; + sensor { + /* label for sensor_cfg */ + sen_cfg: sen_cfg { + }; + }; +}; + +#if defined(__FREERTOS) +/* Note: put include files in the tail since label should be declared first. */ +#include +#include "os05a10_cfg_565.dtsi" +#endif + diff --git a/code/application/source/cardv/SrcCode/PrjCfg_HUNTING_S550.h b/code/application/source/cardv/SrcCode/PrjCfg_HUNTING_S550.h new file mode 100755 index 000000000..58ade2b5d --- /dev/null +++ b/code/application/source/cardv/SrcCode/PrjCfg_HUNTING_S550.h @@ -0,0 +1,1060 @@ +#ifndef _PRJCFG_DVCAM_H_ +#define _PRJCFG_DVCAM_H_ +#include "kwrap/type.h" + +//============================================================================== +// MODE and Major Feature (Maintain these in \Kernel, \System, \Mode folder) +//============================================================================== +#define PLAY_MODE ENABLE +#define PHOTO_MODE ENABLE +#define MOVIE_MODE ENABLE +#define USB_MODE ENABLE +#define SLEEP_MODE DISABLE +#define ENG_MODE DISABLE +#define MAIN_MODE ENABLE +#define IPCAM_MODE DISABLE +#define UPDFW_MODE ENABLE +#define VOICE_MODE DISABLE + +#define IPCAM_FUNC DISABLE +#define STAMP_FUNC DISABLE +#define UI_FUNC ENABLE +#if !defined(_NVT_SDIO_WIFI_NONE_) || !defined(_NVT_USB_WIFI_NONE_) +#define WIFI_FUNC ENABLE +#else +#define WIFI_FUNC ENABLE +#endif +//============================================================================== +// GENERAL CONFIG +//============================================================================== +//.............................................................................. +#if defined(_FW_PARTIAL_LOAD_ON_) +#else +#endif + +//.............................................................................. +// FW version and name +#define FW_UPDATE_NAME "A:\\FW98565A.bin" +#define FW_VERSION_RELEASE DISABLE //DISABLE +#define FW_VERSION_NUM "REGULAR_0402_001" + +//.............................................................................. +/** + The definition of EmbMem is the storage without any card detection, + which means the end-user cannot take that storage out. The EmbMem can also + be a combination of partition such as partition 0 is spi-uITRON, + partition 1 is ram-FAT these depend on what you designed on DxStorage_Mem.c + Normally, in SPI case, we design the ram-disk as internal FAT + +*/ +// share info memory on fdt +#define SHMEM_PATH "/nvt_memory_cfg/shmem" + +// Internal Storage Mapping to Storage Object +#define STRG_OBJ_FW_FDT STRG_OBJ_FW_RSV1 +#define STRG_OBJ_FW_APP STRG_OBJ_FW_RSV2 +#define STRG_OBJ_FW_UBOOT STRG_OBJ_FW_RSV3 +#define STRG_OBJ_FW_RTOS STRG_OBJ_FW_RSV4 +#define STRG_OBJ_FW_PST STRG_OBJ_PSTORE1 +// Internal Storage Mapping to DxStorage +#define USER_DX_TYPE_EMBMEM_LOADER DX_TYPE_EMBMEM0 //STRG_OBJ_FW_RSV1 +#define USER_DX_TYPE_EMBMEM_MODELEXT DX_TYPE_EMBMEM1 //STRG_OBJ_FW_RSV2 +#define USER_DX_TYPE_EMBMEM_UITRON DX_TYPE_EMBMEM2 //STRG_OBJ_FW_RSV3 +#define USER_DX_TYPE_EMBMEM_UBOOT DX_TYPE_EMBMEM3 //STRG_OBJ_FW_RSV4 +#define USER_DX_TYPE_EMBMEM_LINUX DX_TYPE_EMBMEM4 //STRG_OBJ_FW_RSV5 +#define USER_DX_TYPE_EMBMEM_ECOS DX_TYPE_EMBMEM4 //STRG_OBJ_FW_RSV5 +#define USER_DX_TYPE_EMBMEM_DSP DX_TYPE_EMBMEM5 //STRG_OBJ_FW_RSV6 +#define USER_DX_TYPE_EMBMEM_DSP2 DX_TYPE_EMBMEM6 //STRG_OBJ_FW_RSV7 +#define USER_DX_TYPE_EMBMEM_PSTORE DX_TYPE_EMBMEM7 //STRG_OBJ_PSTORE +#define USER_DX_TYPE_EMBMEM_FAT DX_TYPE_EMBMEM8 //STRG_OBJ_FAT1 + +//============================================================================== +// SYSTEM FUNCTIONS +//============================================================================== +//.............................................................................. +// Boot +#define POWERON_PERF DISABLE //enable performance benchmark +#define POWERON_TRACE DISABLE //stop and wait for user enter cmd: "dsc boot" +#define POWERON_FAST_BOOT DISABLE +#define POWERON_FAST_BOOT_MSG DISABLE // disable boot msg for fast boot, but hard to debug +#define POWERON_FAST_CPU2_BOOT DISABLE +#define POWERON_FAST_RECORD DISABLE +#define POWERON_FAST_WIFI DISABLE //NOTE: need to enable POWERON_FAST_CPU2_BOOT too +#define POWERON_WAIT_FS_READY DISABLE +#define WAITPHOTO_FUNCTION DISABLE +#define POWERONLOGO_FUNCTION ENABLE +#define POWEROFFLOGO_FUNCTION ENABLE +#if ((POWERON_FAST_BOOT == DISABLE) || (POWERON_FAST_RECORD == DISABLE)) +#define POWERONSOUND_FUNCTION ENABLE +#else +#define POWERONSOUND_FUNCTION DISABLE +#endif +#define POWEROFFSOUND_FUNCTION DISABLE +#define _LOGO_ _LOGO_NOVATEK_ +#if (defined(_LCDTYPE_ILI9341_IF8B_) || \ + defined(_LCDTYPE_TG078UW006A0_DSI_)|| \ + defined(_LCDTYPE_UT35067A0_ILI9488_DSI_)) +#define LOGO_DISP_LAYER LAYER_VDO1 // VDO2 logo has no rotation +#else +#define LOGO_DISP_LAYER LAYER_VDO2 +#endif +#define LENSERROFF_FUNCTION DISABLE + +#if (POWERON_PERF == ENABLE) +#define TM_BOOT_ARRAY(n) static TIMEMARK tmbuf[(n)] = {0} +#define TM_BOOT_INIT(n) TM_Init(tmbuf, n) +#define TM_BOOT_BEGIN(a,b) TM_Begin(a,b) +#define TM_BOOT_END(a,b) TM_End(a,b) +#else +#define TM_BOOT_ARRAY(n) +#define TM_BOOT_INIT(n) +#define TM_BOOT_BEGIN(a,b) +#define TM_BOOT_END(a,b) +#endif + +//#NT#2016/07/12#Niven Cho -begin +//#NT#LINUX_LOAD_BY_UBOOT +//#NT#2016/07/12#Niven Cho -end + +//.............................................................................. +// External Card Config (for SDIO device) +#if !defined(_CARD1_NONE_) +#define CARD1_FUNC DISABLE +#else +#define CARD1_FUNC DISABLE +#endif + +#if !defined(_CARD3_NONE_) +#define CARD3_FUNC DISABLE +#else +#define CARD3_FUNC DISABLE +#endif + +//.............................................................................. +// Storage Config +#define FWS_FUNC DISABLE //enable it, if require load fw for start DSP or update fw for eCos + +#define PST_FUNC DISABLE //enable it, if require write pstore + +#define FS_FUNC ENABLE //enable it, if require write file + +//#NT#2016/12/14#Niven Cho -begin +//#NT#EMMC_AS_PSTORE +// only for (_CPU2_TYPE_==_CPU2_LINUX_ && _INTERSTORAGE_ == _INTERSTORAGE_EMMC_) +#define PST_DEV_ID 4 //used for gxstrg to mount linux emmc-pstore partition +#define PST_FS_DRIVE "E:\\" +//#NT#2016/12/14#Niven Cho -end + + +#if defined(_DSP1_FREERTOS_) +#if (FWS_FUNC != DISABLE) + #warning Not enable FWS_FUNC for DSP? + #warning Please enable your "FWS_FUNC" config in header "PrjCfg_XXXX.h" + #error (see above) +#endif +#endif + +//.............................................................................. +// Input Config +#define INPUT_FUNC ENABLE +//key +#define POWERKEY_FUNCTION ENABLE //Auto Detect +#define NORMALKEY_FUNCTION ENABLE //Auto Detect +#define STATUSKEY_FUNCTION DISABLE //Auto Detect +#define MODEKEY_FUNCTION DISABLE //Auto Detect + +//.............................................................................. +// Output Config +#define OUTPUT_FUNC DISABLE +//LED +#define LED_FUNCTION DISABLE //Auto Detect + +//.............................................................................. +// Power-Saving Config +#define PWR_FUNC ENABLE +//battery level +#define PWRLEVEL_FUNCTION DISABLE //Auto Detect +//auto power-off when battery level = empty +#define EMPTYPWROFF_FUNCTION DISABLE +//auto sleep +#define AUTOSLEEP_FUNCTION ENABLE //Auto Detect +//auto power-off +#define AUTOPWROFF_FUNCTION ENABLE //Auto Detect + +//.............................................................................. +// Date-Time Config +#define DEF_YEAR 2021 +#define DEF_MONTH 1 +#define DEF_DAY 1 +#define MIN_YEAR 2000 +#define MAX_YEAR 2050 + + +//.............................................................................. +// Sensor Config (for 1,2,4 devices) + + +//#define SENSOR_CAPS_COUNT 2 +//#define SENSOR_CAPS_MASK (SENSOR_1 | SENSOR_2) +#define SENSOR_CAPS_COUNT 1 +#define SENSOR_CAPS_MASK (SENSOR_1) + + +#define SENSOR_MAP_1 SENSOR_ID_1 +#define SENSOR_MAP_2 SENSOR_ID_2 + + +#define SENSOR_GP_FUNC DISABLE + +// Sensor group +#define SENSOR_GP_1 SENSOR_MULTI_ID_NONE /*ex: SENSOR_MULTI_ID_1|SENSOR_MULTI_ID_2*/ +#define SENSOR_GP_2 SENSOR_MULTI_ID_NONE /*ex: SENSOR_MULTI_ID_3|SENSOR_MULTI_ID_4*/ +// Sensor sub group + +#define SENSOR_SUBGP_1 SENSOR_MULTI_ID_NONE +#define SENSOR_SUBGP_2 SENSOR_MULTI_ID_NONE + + + +// Sensor Insert Mask +//#define SENSOR_INSERT_MASK (SENSOR_1) // support insert sensor +//#define SENSOR_INSERT_MASK (SENSOR_2) // support insert sensor +#define SENSOR_INSERT_MASK (0) // if NOT support insert sensor, please choose this + +#define SENSOR_DEFAULT_ATTACH_MASK (SENSOR_CAPS_MASK & ~(SENSOR_INSERT_MASK)) // hw default attach sensors + +#define SENSOR_INSERT_FUNCTION ((SENSOR_CAPS_MASK == SENSOR_DEFAULT_ATTACH_MASK)?(DISABLE):(DISABLE)) //Auto Detect (Dynamic attach) + +#define SENSOR_DEFAULT_DISPLAY_MASK (SENSOR_1) + +#define SENSOR_SIEPATGEN DISABLE + +//.............................................................................. +// Flashlight Config + +#define FLASHLIGHT_FUNCTION DISABLE //DISABLE + + +//.............................................................................. +// Lens Config +#define LENS_FUNCTION DISABLE +#define LENS_FOCAL_LENGTH 2880 // unit:um + + +//.............................................................................. +// Display Config (for LCD, LCD2, TV and HDMI device) + +#define LCD2_FUNC_USERSTATUS DISABLE //use LCD2 as status display. (not for video display) + +//NOTE: LCD1 output from DOUT1 only +#if defined(_Disp_VIRTUAL_LCD1_OFF_) +#define LCD1_FUNC DISABLE +#define LCD1_MASK 0x00 +#else +#define LCD1_FUNC ENABLE +#define LCD1_MASK 0x01 +#endif +//NOTE: TV output from DOUT1 or DOUT2 +#if defined(_TV_OFF_) +#define TV_FUNC DISABLE +#define TV_MASK 0x00 +#else +#define TV_FUNC DISABLE +#define TV_MASK 0x02 +#endif +//NOTE: HDMI output from DOUT1 or DOUT2 +#if defined(_HDMI_OFF_) +#define HDMI_FUNC DISABLE +#define HDMI_MASK 0x00 +#else +#define HDMI_FUNC DISABLE +#define HDMI_MASK 0x04 +#endif + +#if((LCD1_FUNC == DISABLE) || (TV_FUNC == DISABLE) || (HDMI_FUNC == DISABLE)) +#define DISPLAY_FUNC ENABLE +#define DISPLAY2_FUNC DISABLE +#define DISPLAY_CAPS_COUNT 1 //1: only single display, 2: allow single display or dual display +#define DISPLAY_CAPS_MASK (LCD1_MASK|TV_MASK)//|HDMI_MASK|LCD2_MASK +#define DUALDISP_FUNC ((DISPLAY_CAPS_COUNT == 2)?DISABLE:DISABLE) + +#define DISPLAY_DEFAULT_ATTACH_MASK DISPLAY_1 // hw default attach display + +#if defined(_Disp_VIRTUAL_LCD1_OFF_) +#define DISPLAY_DEFAULT_ATTACH_DEVICE TV_MASK //LCD1_MASK or HDMI_MASK or TV_MASK +#else +#define DISPLAY_DEFAULT_ATTACH_DEVICE LCD1_MASK //LCD1_MASK or HDMI_MASK or TV_MASK +#endif +#define DISPLAY2_DEFAULT_ATTACH_DEVICE 0 //LCD2_MASK or TV_MASK or HDMI_MASK + +//LCD related +#define LCD_AUTORESET_FUNCTION DISABLE //Auto Reset - LCD register +#define LCD_AUTOBACKLIGHT_FUNCTION DISABLE //Auto Adjust Backlight - with AE LV +#define LCD_ROTATE_FUNCTION DISABLE //Auto Detect - LCD rotate (enable to support LCD body mirror or flip) +//TV related +#define TV_INSERT_FUNCTION TV_FUNC //Auto Detect - TV cable insert +//HDMI related +#define HDMI_INSERT_FUNCTION HDMI_FUNC //Auto Detect - HDMI cable insert +//LCD2 related +#define LCD2_INSERT_FUNCTION LCD2_FUNC //Auto Detect - LCD2 cable insert +#else +#define DISPLAY_FUNC DISABLE +#define DISPLAY2_FUNC DISABLE +#define DISPLAY_CAPS_COUNT 0 +#define DISPLAY_CAPS_MASK 0 +#define DUALDISP_FUNC 0 + +#define DISPLAY_DEFAULT_ATTACH_MASK 0 // hw default attach display + +#define DISPLAY2_DEFAULT_ATTACH_DEVICE 0 //LCD2_MASK or TV_MASK or HDMI_MASK + +//LCD related +#define LCD_AUTORESET_FUNCTION DISABLE //Auto Reset - LCD register +#define LCD_AUTOBACKLIGHT_FUNCTION DISABLE //Auto Adjust Backlight - with AE LV +#define LCD_ROTATE_FUNCTION DISABLE //Auto Detect - LCD rotate (enable to support LCD body mirror or flip) +//TV related +#define TV_INSERT_FUNCTION TV_FUNC //Auto Detect - TV cable insert +//HDMI related +#define HDMI_INSERT_FUNCTION HDMI_FUNC //Auto Detect - HDMI cable insert +//LCD2 related +#define LCD2_INSERT_FUNCTION LCD2_FUNC //Auto Detect - LCD2 cable insert +#endif + + +#define DRAM_SIZE_64MB_DISP_OFF DISABLE + +#if (DRAM_SIZE_64MB_DISP_OFF==ENABLE) +#undef POWERONLOGO_FUNCTION +#define POWERONLOGO_FUNCTION DISABLE +#undef POWEROFFLOGO_FUNCTION +#define POWEROFFLOGO_FUNCTION DISABLE +#endif + +// Display Config (for UI window, FD window) + +// OSD size and format +#if (DRAM_SIZE_64MB_DISP_OFF==ENABLE) +#define DISPLAY_OSD_W 80//320//640 +#define DISPLAY_OSD_H 60//240 +#else +#define DISPLAY_OSD_W 320//640 +#define DISPLAY_OSD_H 240 +#endif +#define DISPLAY_OSD_FMT PXLFMT_INDEX8 // 256 colors +//#define DISPLAY_OSD_FMT PXLFMT_RGBA5658_PK // 16bpp-colors + +//UI tool layout size setting +#if (DRAM_SIZE_64MB_DISP_OFF==ENABLE) +#define TOOL_LAYOUT_W 80//320//640 +#define TOOL_LAYOUT_H 60//240//480 +#else +#define TOOL_LAYOUT_W 320//640 +#define TOOL_LAYOUT_H 240//480 +#endif +#define OSD_USE_DOUBLE_BUFFER DISABLE //use double buffer +#if (defined(_Disp_IF8B_LCD1_ILI9341_)) +#define OSD_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#elif defined(_disp_ifdsi_lcd1_ut35067a0_ili9488_) +#define OSD_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#else +#define OSD_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#endif + +#define OSD2_FUNC DISABLE +#define OSD2_USE_DOUBLE_BUFFER DISABLE //use double buffer +#define VDO_BM_FUNC DISABLE + + +// Display Config (for UI background, App quickview, photo frame, ...) + +// VDO size and format +#if (DRAM_SIZE_64MB_DISP_OFF==ENABLE) +#define DISPLAY_VDO_W 80//640 +#define DISPLAY_VDO_H 60//480 +#else +#define DISPLAY_VDO_W 640 +#define DISPLAY_VDO_H 480 +#endif +#define DISPLAY_VDO_FMT DISP_PXLFMT_YUV422_PK + +#define VDO_USE_DOUBLE_BUFFER DISABLE //use double buffer +#define VDO2_USE_DOUBLE_BUFFER DISABLE +#define VDO_USE_PHOTO_SOURCE DISABLE //display photo video streaming +#if (defined(_Disp_IF8B_LCD1_ILI9341_)) +#define VDO_ROTATE_DIR HD_VIDEO_DIR_ROTATE_90 +#define VDO_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#elif defined(_disp_ifdsi_lcd1_ut35067a0_ili9488_) +#define VDO_ROTATE_DIR HD_VIDEO_DIR_ROTATE_270 +#define VDO_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#else +#define VDO_ROTATE_DIR HD_VIDEO_DIR_ROTATE_90 +#define VDO_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#endif + +#define VDO_USE_COPY_BUFFER DISABLE //use copy buffer to avoid black between UI mode + +#define VDO2_USE_ROTATE_BUFFER DISABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) + +#if (DISPLAY2_FUNC == DISABLE) +//#define VDOOUT_MASK (DISPLAY_1) // app's video will output to which display +//#define VDOOUT_MASK (DISPLAY_2) // app's video will output to which display +#define VDOOUT_MASK (DISPLAY_1|DISPLAY_2) // app's video will output to which display +#else +#define VDOOUT_MASK (DISPLAY_1) // app's video will output to which display +#endif + +#define LCD_PREVIEW_VDO_FMT GX_IMAGE_PIXEL_FMT_YUV420_PACKED +#define LCD2_PREVIEW_VDO_FMT GX_IMAGE_PIXEL_FMT_YUV420_PACKED +#define TV_PREVIEW_VDO_FMT GX_IMAGE_PIXEL_FMT_YUV420_PACKED +#define HDMI_PREVIEW_VDO_FMT GX_IMAGE_PIXEL_FMT_YUV420_PACKED + +// Display Config (for DispSrv; Photo App, Movie App and Play App) +// VDO1 size and format (for LCD device) +//LCD1: +#if defined(_Disp_VIRTUAL_LCD1_OFF_) +#define LCDMODE DISABLE +#elif defined(_Disp_IF8B_LCD1_AUCN01_) +#define LCDMODE DISP_LCDMODE_RGBD320 //DISP_LCDMODE_YUV640 +#elif defined(_Disp_IF8B_LCD1_PW35P00_HX8238D_) || \ + defined(_Disp_IF8B_LCD1_ILI9341_) +#define LCDMODE 0//DISP_LCDMODE_RGB_SERIAL +#else +#error "Unknown _LCD_" +#endif + +#define LCD2MODE DISABLE + +// VDO1 size and format (for TV device) +//TV: DISP_TVMODE_PAL mode +#define TVMODE DISP_TVMODE_NTSC + +// VDO1 size and format (for HDMI device) +//HDMI: DISP_HDMIMODE_1920X1080I60 mode +//#define HDMIMODE DISP_HDMIMODE_1920X1080I60 +#define HDMIMODE DISP_HDMIMODE_MAX + + +#define DUALCAM_PIP_BEHIND_FLIP DISABLE //Flip 2nd cam image in PIP view. Need extra 1/2 VDO buffer + + + +//.............................................................................. +// Audio Config +#define AUDIO_FUNC ENABLE +//.............................................................................. +// External Audio Config (for LineOut device) + +//LINE related + +//.............................................................................. +// External Storage Config +#define SDINSERT_FUNCTION ENABLE //Auto Detect +#define SDHOTPLUG_FUNCTION ENABLE +//.............................................................................. +// FILEDB Config +#define USE_FILEDB DISABLE //DISABLE +#define FILEDB_CARDV_ROOT "Novatek" // the max length should not exceeds 16 +// DCF Config +#define USE_DCF ENABLE +#define DCF_SUPPORT_FORMAT (DCF_FILE_TYPE_JPG|DCF_FILE_TYPE_AVI|DCF_FILE_TYPE_MOV|DCF_FILE_TYPE_MP4) +//.............................................................................. +// EXIF Config +#define USE_EXIF DISABLE +// End string must be '\0', total char must be 31 +#define EXIF_MAKER_NAME "SY" +// End string must be '\0', total char must be 31 +#define EXIF_MODEL_NAME "S550-R" +// End string must be '\0', total char must be 31 +#define EXIF_IMAGE_DESCROPTOIN "S550 CAMERA" + +#define EXIF_SOFTWARE_VERSION FW_VERSION_NUM // <= 20 char (TagSoftVerLen) + +//.............................................................................. +// Movie Maker/Model name Config +// End string must be '\0', total char must plus 1 +#define MOVAPP_COMP_MANU_STRING "NOVATEK" +// End string must be '\0', total char must plus 1 +#define MOVAPP_COMP_NAME_STRING "DEMO1" +//.............................................................................. +// Usb Config + +#define USBINSERT_FUNCTION ENABLE //Auto Detect + +#define USB_VID 0x0603 +#define USB_PID_PCCAM 0x8612 // not support pc cam +#define USB_PID_WRITE 0x8614 +#define USB_PID_PRINT 0x8613 +#define USB_PID_MSDC 0x8611 + +#define USB_PRODUCT_REVISION '1', '.', '0', '0' +#define USB_VENDER_DESC_STRING 'N', 0x00,'O', 0x00,'V', 0x00,'A', 0x00,'T', 0x00,'E', 0x00,'K', 0x00, 0x20, 0x00,0x00, 0x00 // NULL +#define USB_VENDER_DESC_STRING_LEN 0x09 +#define USB_PRODUCT_DESC_STRING 'D', 0x00,'E', 0x00,'M', 0x00,'O', 0x00,'1', 0x00, 0x20, 0x00, 0x00, 0x00 // NULL +#define USB_PRODUCT_DESC_STRING_LEN 0x07 +#define USB_PRODUCT_STRING 'N','v','t','-','D','S','C' +#define USB_SIDC_DESC_STRING 'D', 0x00,'E', 0x00,'M', 0x00,'O', 0x00,'1', 0x00, 0x20, 0x00, 0x00, 0x00 // NULL +#define USB_SIDC_DESC_STRING_LEN 0x07 +#define USB_MTP_FRIENDNAME_STRING 'D','E','M','O','1',0x00 //maximum length is 253 bytes +#define USB_MTP_FRIENDNAME_STRING_LEN 0x06 //maximum length is 253 bytes +#define USB_VENDER_STRING 'N','O','V','A','T','E','K' +#define USB_VENDER_SIDC_DESC_STRING 'N', 0x00,'O', 0x00,'V', 0x00,'A', 0x00,'T', 0x00,'E', 0x00,'K', 0x00, 0x20, 0x00,0x00, 0x00 // NULL +#define USB_VENDER_SIDC_DESC_STRING_LEN 0x09 +#define USB_SERIAL_NUM_STRING '5', '1', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '1', '0', '0' + +//.............................................................................. +// Other Config + +#define GSENSOR_FUNCTION DISABLE //G-sensor +#define GPS_FUNCTION DISABLE + +#define SHOW_ADC_ON_SCREEN DISABLE +#define CALIBRATION_FUNC DISABLE // Enable/Disable Calibration +#define WATERLOGO_FUNCTION ENABLE // Enable/Disable waterlogo function +#define MOVIE_MULTISTAMP_FUNC DISABLE +#define MOVIE_MULTIWATERLOGO_FUNC DISABLE + +// Important Notice: +// If enable MULTILINGUAL_FUNCTION, remember to update font table and make sure the font height is not exceed the buffer size!! +#define MULTILINGUAL_FUNCTION DISABLE // Enable/Disable Multi-Lingual movie stamp function + +#define TIMELAPSE_LPR_FUNCTION DISABLE // Enable/Disable Timelapse Low Power Record function + +//--------------------------------------------------------------------------- +// For Video Debug Info +//--------------------------------------------------------------------------- +#define _MOVIE_IQLOG_ DISABLE // Enable/Disable Video IQLOG, Spark Chou + +//============================================================================== +// PLAYBACK FUNCTIONS +//============================================================================== +#define SLIDESHOW_MUSIC_OPTION DISABLE //longer no maintain +// copy card to card function +#define COPYCARD2CARD_FUNCTION DISABLE + +//============================================================================== +// PHOTO FUNCTIONS +//============================================================================== + +#define ASSIST_BEAM_FUNC DISABLE +#define GDC_FUNC DISABLE +#define AF_BEAM_EV_THRESHOLD 540 +#define _FD_FUNC_ DISABLE +#define _TSR_FUNC_ DISABLE +#define MAX_FDNUM 10 +#define PIP_VIEW_FUNC DISABLE // PipView (DISABLE: display 2 sensor by PipView, DISABLE: display user selected sensor) +#define PIP_VIEW_FASTSWITCH DISABLE // display single sensor method (DISABLE: always display by Pipview, DISABLE: display by direct path) +#define PIP_VIEW_LR DISABLE //(DISABLE: display 2 sensor by PipView in left, right view, side by side, DISABLE: normal pipview) + +#define SBS_VIEW_FUNC DISABLE // SbsView (DISABLE: display 2 sensor by SbsView, DISABLE: display user selected sensor) +#define SHDR_FUNC DISABLE // DISABLE +#define WDR_FUNC ENABLE +#define DEFOG_FUNC DISABLE // DISABLE + +#if !defined(_Gyro_None_) +#define RSC_FUNC DISABLE +#else +#define RSC_FUNC DISABLE +#endif +//.............................................................................. +#define _SCREENNAIL_SIZE_ _SCREENNAIL_SIZE_VGA_ +#define _QUICKVIEW_SIZE_ _QUICKVIEW_SIZE_SUIT_FOR_DISP + +//.............................................................................. +// Photo Frame Pstore Version Config +#define PF_PSTORE_VER 0x00000105 + +//============================================================================== +// MOVIE FUNCTIONS +//============================================================================== +#if !defined(_Gyro_None_) +#define MOVIE_RSC DISABLE +#else +#define MOVIE_RSC DISABLE +#endif +#define MOVIE_PIM_CAPTURE DISABLE // picture in movie method 1 (capture full resolution image) +#define MOVIE_GDC_FUNC DISABLE +#define MOVIE_SMEAR_R_FUNC DISABLE +#define MOVIE_ENSURE_SD_CLASS4 DISABLE +#define MOVIE_ENSURE_SD_32KCLUSTER DISABLE +#define MOVIE_MULTI_RECORD_FUNC DISABLE +#define MOVIE_REC_YUVMERGE DISABLE // slowly timelapse record mode, frame period >= 1S +#define MOVIE_AUTOREC_ACPLUG DISABLE +#define MOVIE_NET_USE_STREAM_1 DISABLE +#define MOVIE_UVAC_FUNC DISABLE +#define MOVIE_DSP_FUNC DISABLE + +#define MOVIE_MAPPING_MULTIREC DISABLE +#define MOVIE_DIRECT_FUNC DISABLE // direct mode function +#define MOVIE_YUV_COMPRESS DISABLE + +#define MOVIE_DIS DISABLE +#define MOVIE_FD_FUNC_ DISABLE +#define MOVIE_FD_DRAW_VIDEO DISABLE +#define MOVIE_BC_FUNC DISABLE +#define MOVIE_TD_FUNC DISABLE // Depend on MOVIE_BC_FUNC +#define MOVIE_TD_DRAW_VIDEO DISABLE +#define MOVIE_TWD_FUNC DISABLE // Depend on MOVIE_BC_FUNC +#define MOVIE_TWD_DRAW_VIDEO DISABLE +#define MOVIE_TZD_FUNC DISABLE // Depend on MOVIE_BC_FUNC +#define MOVIE_TZD_DRAW_VIDEO DISABLE +#define MOVIE_ODT_FUNC DISABLE +#define MOVIE_ODT_DRAW_VIDEO DISABLE + +#define UCTRL_APP_MOVIE_FEATURE_SETGET DISABLE +#define MEDIA_VASTREAM DISABLE +#define IR_CUT_FUNC DISABLE +#define LOGFILE_FUNC DISABLE +#define _ADAS_FUNC_ DISABLE +//.............................................................................. +// ADAS subsetting (The following sub-functions are available only if _ADAS_FUNC_ = DISABLE +#define _AUTOVP_FUNC_ DISABLE +#define _SNG_FUNC_ DISABLE +#define _DRAW_LDFCINFO_ON_OSD_ DISABLE +#define _DRAW_SNG_ROI_ DISABLE +#define _DRAW_LDWSINFO_ON_VIDEO_ DISABLE // This function is only valid if data path is D2D!! + +#define MOVIE_TSR_FUNC_ DISABLE +#define MOVIE_TSR_DRAW_VIDEO DISABLE +#define TSR_MODEL_IN_PSTORE DISABLE + +#define CROP_SOURCE_W 3840 +#define CROP_SOURCE_H 2160 + + +//============================================================================== +// MOVIE PLAY FUNCTIONS +//============================================================================== +#define MOVIE_PLAY_VIEW_FUNC DISABLE // MoviePlayView + + +//============================================================================== +// USBCAM FUNCTIONS +//============================================================================== +#define UVAC_MODE_2_PATH DISABLE +#if (UVAC_MODE_2_PATH==DISABLE) +#undef MOVIE_MULTI_RECORD_FUNC +#define MOVIE_MULTI_RECORD_FUNC DISABLE +#endif +//============================================================================== +// USBCHARGE FUNCTIONS +//============================================================================== +#define USB_CHARGE_FUNCTION DISABLE +#define USB_CHARGE_VERIFY DISABLE + +//============================================================================== +// USBDISK FUNCTIONS +//============================================================================== + +//============================================================================== +// MSDCVENDOR_NVT, is required for PC tools to transmit commands and data via USB / NET +//============================================================================== +#define MSDCVENDOR_NVT ENABLE //via USB, depend on USBINSERT_FUNCTION and _USB3_INT_CORE1_ +#define MSDCVENDOR_UPDFW DISABLE //enable it will cause disalbing MSDC and MTP/PTP/UAVC Mode, MSDCVENDOR_NVT must enable +#define MSDCVENDOR_IDENTITY_FILE "A:\\MSDCNVT" +#if (defined(_MODEL_DVCAM1_EVB_) || defined(_MODEL_DVCAM2_EVB_)) +#define MSDCVENDOR_NVT_EXAM DISABLE //only for novatek internal use +#else +#define MSDCVENDOR_NVT_EXAM DISABLE //for customer, disable it to reduce memory +#endif +//============================================================================== +// USBPRINT FUNCTIONS +//============================================================================== + +//============================================================================== +// USBPRINT FUNCTIONS +//============================================================================== + +//============================================================================== +// UI FUNCTIONS +//============================================================================== +//.............................................................................. +// UI Resource Storage Config +#define _LANG_STORE_ _INSIDECODE_ +#define _JPG_STORE_ _INSIDECODE_ +#define SPECIAL_KEY_RESET_FUNC DISABLE +#define EXTRA_MENU DISABLE + +//============================================================================== +// IPCam FUNCTION +//============================================================================== +//.............................................................................. + +///////FD param +#define IPCAM_FD_FUNC DISABLE +#define MAX_FDNUM 10 //set face detection max face number +//////MD param +#define IPCAM_MD_FUNC DISABLE +//////VQA param +#define IPCAM_VQA_FUNC DISABLE + +/////AUDIO param +#define IPCAM_AUDIO_IN_FUNC DISABLE +#define IPCAM_AUDIO_OUT_FUNC DISABLE +#define IPCAM_AEC_FUNC DISABLE +#define AUDIO_FUNC_AAC DISABLE + + +//============================================================================== +// NET FUNCTIONS +//============================================================================== +#if (!defined(_NVT_SDIO_WIFI_NONE_) || !defined(_NVT_USB_WIFI_NONE_)) +#define _NETWORK_DEVICE_ +#define _NETWORK_ON_WIFI_ +#endif +#if !defined(_NVT_USB_4G_NONE_) +#define _NETWORK_DEVICE_ +#define _NETWORK_ON_4G_ +#endif +#if !defined(_NVT_ETHERNET_NONE_) +#define _NETWORK_DEVICE_ +#define _NETWORK_ON_ETH_ +#endif + +#define MAC_APPEN_SSID DISABLE//ENABLE +#define ACL_TIME 15000 //minmum 15 sec +#define WIFI_APP_MANUFACTURER "NVT" +#define WIFI_APP_MODLE "CarDV_WiFi" +#define ONVIF_PROFILE_S DISABLE //Enable it to cause NO CARD DETECTED. +#define ECOS_POWER_OFF_FLOW DISABLE + +//#NT#2016/10/21#YongChang Qui -begin +//#NT#wifi modules on EVB can't be powered off by default +#define WIFI_POWER_OFF_FLOW DISABLE //Enabled only if ECOS_POWER_OFF_FLOW == DISABLE and DrvWiFi_PowerOff() actually powers off wifi module +//#NT#2016/10/21#YongChang Qui -end + +#define HFS_FUNC ENABLE + +#define HTTP_LIVEVIEW_FUNC DISABLE +#if (WIFI_FUNC==DISABLE) +#define WIFI_AP_FUNC DISABLE +#else +#define WIFI_AP_FUNC ENABLE +#endif +#define WIFI_FTP_FUNC DISABLE + +#define HTTP_MJPG_W_4 640 +#define HTTP_MJPG_H_3 480 + +#define HTTP_MJPG_W_16 640 +#define HTTP_MJPG_H_9 360 + +#define AUTO_WIFI DISABLE + +#define HTTP_LIVEVIEW 1 +#define RTSP_LIVEVIEW 2 +#define MOVIE_LIVEVIEW RTSP_LIVEVIEW + +#if(WIFI_AP_FUNC==DISABLE) +#undef HTTP_LIVEVIEW_FUNC +#define HTTP_LIVEVIEW_FUNC DISABLE +#define MOVIE_MULTI_RECORD_FUNC DISABLE + + +#undef HTTP_MJPG_W_4 +#undef HTTP_MJPG_H_3 +#undef HTTP_MJPG_W_16 +#undef HTTP_MJPG_H_9 +#define HTTP_MJPG_W_4 640 +#define HTTP_MJPG_H_3 480 +#define HTTP_MJPG_W_16 640 +#define HTTP_MJPG_H_9 360 + +#undef HFS_FUNC +#define HFS_FUNC DISABLE +#endif + +#define WIFI_APP_MANUFACTURER "NVT" +#define WIFI_APP_MODLE "CarDV_WiFi" +#define WIFI_APP_DOWNLOAD_URL "http://115.29.201.46:8020/download/filedesc.xml" + + +#if defined(_CPU2_LINUX_) +#define UCTRL_FUNC DISABLE +#else +#define UCTRL_FUNC DISABLE +#endif +#define ONVIF_FUNC DISABLE //CarDV-Linux is no using of ONVIF + + +#define WIFI_FINALCAM_APP_STYLE DISABLE +#define WIFI_BG_COLOR 14 + +#define WIFI_STA_RECONNECT_MAX_COUNT 5 +#define WIFI_STA_RECONNECT_INTERVAL 300 + +#define YOUKU_SDK DISABLE +#define IOT_P2P_FUNC DISABLE +#define NETWORK_4G_MODULE DISABLE + +#if (YOUKU_SDK == DISABLE) +#define WIFI_MOVIE_FOLDER "MOVIE_WIFI" +#define CUT_MOVIE_FOLDER "MOVIE_CUT" +//the following two functions should be exclusive +#define SAVE_DUAL_STREAM_FUNC DISABLE +#define CUT_MOVIE_FUNC DISABLE +#endif + +#define MOVIE_OT_FUNC DISABLE +#define MOVIE_OT_DRAW_VIDEO DISABLE + + + +#define CURL_FUNC DISABLE + +#define _DDD_FUNC_ DISABLE +#define MOVIE_DDD_FUNC DISABLE +#define MOVIE_DDD_FD_FUNC DISABLE +#define MOVIE_DDD_DRAW_VIDEO DISABLE +#define MOVIE_DDD_SAVE_LOG DISABLE +#define DDD_MODEL_IN_PSTORE DISABLE + +#define MOVIE_FTG_FUNC DISABLE +#define MOVIE_FTG_DRAW_VIDEO DISABLE + +//#NT#2017/04/28#KCHong -begin +//#NT# CNN Object detection +#define _OD_FUNC_ DISABLE +//#NT#2017/04/28#KCHong -end + +#define USERLOG_FUNC DISABLE + + +// fileSize align function +#define FILESIZE_ALIGN_FUNC DISABLE +#define PHOTO_FILESIZE_ALIGN_VALUE 2*1024*1024 // 2MB +#define FS_ALIGN_RESERVED_SIZE (2 * MOVIE_FILESIZE_ALIGN_VALUE) + +#define FS_SWITCH_STRG_FUNC DISABLE + +// mount sd-2 as "B:\\" +// To mount sd-2 as "B:\\" please do the following steps +// 1. set .int_id_dst[CC_CORE_MIPS1].Bit.bInt_ID_SDIO2 to TRUE +// 2. enable FS_DX_TYPE_DRIVE_B as DX_TYPE_CARD2 +// 3. enable FS_MULTI_STRG_FUNC +// 4. NETWORK = NETWORK_NONE (Both uITRON and eCos) +#define FS_MULTI_STRG_FUNC DISABLE +//MULTI_DRIVE +#if defined(_EMBMEM_EMMC_) && (FS_MULTI_STRG_FUNC==DISABLE) +#define FS_DX_TYPE_DRIVE_A USER_DX_TYPE_EMBMEM_FAT +#else +#define FS_DX_TYPE_DRIVE_A DX_TYPE_CARD1 +#endif +#define FS_DX_TYPE_DRIVE_B USER_DX_TYPE_EMBMEM_FAT //FS_MULTI_STRG_FUNC must enable for FS_DX_TYPE_DRIVE_B + +#define _3DNROUT_FUNC DISABLE + +#define RTC_FUNC DISABLE + +#define DISPLAY_FAST_SWITCH DISABLE //fast swicth display device +#define DISPLAY_OSD2_FMT DISP_PXLFMT_INDEX8 // 256 colors +#define SPK_MASK 0x01 +#define LOUT_MASK 0x02 +#define LINE_INSERT_FUNCTION DISABLE //Auto Detect - LINE cable insert (audio out) +#define USE_DPOF DISABLE +#define BT_FUNC DISABLE +#define ECOS_DBG_MSG_FORCE_UART1_DIRECT DISABLE +#define USOCKET_CLIENT DISABLE +#define MOVIE_DISDSP_FUNC DISABLE +#define WIFI_UI_VER_1_0 0 +#define WIFI_UI_VER_2_0 1 +#define WIFI_UI_FLOW_VER WIFI_UI_VER_1_0 +#define LOG_DBGINFO_IN_GPS_SECTION DISABLE +#define MOVIE_TD_SAVE_LOG DISABLE +#define MOVIE_SCD_FUNC DISABLE +#define UVC_MULTIMEDIA_FUNC DISABLE +#if (UVC_MULTIMEDIA_FUNC == ENABLE) +#undef MOVIE_UVAC_FUNC +#define MOVIE_UVAC_FUNC ENABLE // it needs to enable MOVIE_UVAC_FUNC if UVC_MULTIMEDIA_FUNC was enabled +#endif +#define FORCE_UNPLUG_RTSP DISABLE +#define IQTOOL_FUNC DISABLE +#define GXGFX_ADVANCED_STRING_FUNC DISABLE +#define SMALL_CLONE_MOVIE DISABLE +#define CUSTOM_NAMING_RULE DISABLE +#define LINUX_CVHOST_FUNC DISABLE +#define AUDIO_PLAY_TEST DISABLE +#define FTG_SNAPSHOT_FUN DISABLE +#define FTG_MAX_SNAPSHOT_NUM 5 +#define FTG_OVERRALL_MAX_BUF_SIZE 250*1024 +#define FTG_FACE_MAX_BUF_SIZE 100*1024 +#define FTG_MAX_SNAPSHOT_SIZE 1024*1024*25 +#define FTG_MAX_FACE_PIC_NUM 3 +#define RTSP_AUDIO_ENABLE DISABLE +#define AUDIO_CMD_UCTRL_ENABLE DISABLE +#define FACE_GRADE_TEST DISABLE +#define IPCAM_UVC_FUNC DISABLE +#define BOOT_RESET_MENU_INFO ENABLE +#define VIDEOSPRITEIPC DISABLE +#define IPCAM_FD_FUNC DISABLE +//#define IPCAM_DIS_FUNC DISABLE +#define IPCAM_DIS_MV_FUNC DISABLE //Digital Image Stabilzier: calculate motion vector +#define IPCAM_DIS_COMP_FUNC DISABLE //DIS compensation: if set IPCAM_DIS_COMP_FUNC = enable, it should set IPCAM_DIS_MV_FUNC = TRUE, too +#define HOT_PLUG_REMAIN_SIZE 0 +#define _CVHOST_EX_ DISABLE +#define _CVHOST_EX_ENDSP_ DISABLE +#define _NVTCV_EX_ DISABLE +#define _NVTCV_EX_ENDSP_ DISABLE +#define MOVIE_MAX_CHANNEL 16 +#define LINUX_MSDC DISABLE //DISABLE +#define STEREO_FUNC DISABLE +#define THUMB_STAMP_FUNC DISABLE +#define STAMP_PRIVATE_POOL ENABLE +#define VIDEOSPRITE_STAMP_FUNC ENABLE +#define VDOENC_MULTI_TEMPORARY_LAYER DISABLE //Multi Temporary Layer +#define YUV_TV_RANGE DISABLE //YUV color space in tv range +#define VIDEO_FUNC_MJPG DISABLE +#define VIDEO_FUNC_H264 DISABLE +#define VIDEO_FUNC_H265 DISABLE +#define STOP_REC_BK DISABLE +#define NMEDIAPLAY_FUNC DISABLE // switch SMediaPlay and NMediaPlay flow, use NMediaPlay when DISABLE to be set. +#define MOVIE_AI_DEMO DISABLE + +#define HUNTING_CAMERA_SYS_PARTITION_NAME sys + +///////////////sf st////////////////////// +#define HUNTING_CAMERA_MCU ENABLE +#define HUNTING_CAMERA_4G ENABLE//DISABLE +#define PHOTO_PREVIEW_SLICE_ENC_FUNC ENABLE +#define PHOTO_PREVIEW_SLICE_ENC_VER2_FUNC ENABLE +#define DZOOM_FUNC ENABLE +#define HUNTING_MCU_I2C DISABLE +#define HUNTING_MCU_UART ENABLE +#define HUNTING_IR_LED_940 ENABLE +#define SF_EXIF_MN_BUF_SIZE 256 +#define SF_BASE_VERSION "7MD4RCwD901" +#define HW_S530 DISABLE +#define DCF_DIR_NAME "MEDIA" /* 100MEDIA */ +#define DCF_FILE_NAME "SYFW" /* SYFW0001.JPG */ +#define PHOTO_THUMB_PATH "A:\\THUMB\\" +#define MOVIE_THUMB_PATH "A:\\THUMB\\" +#define SF_SD_ROOT "/mnt/sd/" +#define SF_SEND_LIST_DIR "/mnt/sd/THUMB/" +#define SF_THUMB_SEND_LIST SF_SEND_LIST_DIR"send.list" +#define SF_THUMB_SEND_AUTO SF_SEND_LIST_DIR"auto.list" +#define SF_HD_DIR_LIST SF_SEND_LIST_DIR"HD/send.list" +#define SF_HD_DIR SF_SEND_LIST_DIR"HD" +#define SF_HD_DIR_CARDV "A:\\THUMB\\HD\\" + +#define SF_FW_CFG_FILE_NAME "SPHOST_REVEAL.CFG" +#define SF_FW_FILE_NAME "SPHOST_REVEAL.BRN" +#define SF_FW_CFG_FILE_PATH "A:\\SPHOST_REVEAL.CFG" +#define SF_FW_FILE_PATH "A:\\SPHOST_REVEAL.BRN" +#define SF_CAMERA_INFO_FILENAME SF_SD_ROOT"/CAM_INFO.TXT" +#define SF_IQ_TEST DISABLE +#define SF_IS_RELEASE DISABLE + +#define PHOTO_ISP_STAMP DISABLE +#define SF_BASE_VERSION_FEA "R2.3" +#define SF_GPS_SUPPORT 0 +#define SF_SEND_LIST_ITEM_LENGTH 15 +#define SF_4G_REGISTER_NETWORK_COUNT 230 +#define SUBSCRIBE_MAX_NUM 10 +#define SUBSCRIBE_SEND_MAX_NUM 50 +#define SUBSCRIBE_VIDEO_MAX_NUM 10 +#define SUBSCRIBE_VIDEO_SEND_MAX_NUM 50 + +#define SF_4G_USB_NET_DOWNLOAD 1 + +#define SF_TEST_GPRS 0 +#define CUSTOM_TEST_FTPS 0 + +#define SF_TEST_OTA_FTP 0 +#define CUSTOM_TEST_OTA_FTP 0 +#define SF_BATTERY_TEST DISABLE +#define SF_BATTERY_TEST_FILE "A:\\BATTERY.TXT" +#define SF_HW_TEST DISABLE +#define SF_MODULE_UP_FILE "EG915QNA.tar.bz2" +#define SF_MODULE_UP_FILE_PATH "/mnt/sd/EG915QNA.tar.bz2" +#define SF_CAM_UP_FILE "S530.tar.bz2" +#define SF_CAM_UP_FILE_PATH "/mnt/sd/S530.tar.bz2" +#define SF_CAMERA_GPS_INFO_FILENAME SF_SD_ROOT"/gps.txt" +//////////////////////sf end/////////////////////////////// + +/******************************************************************************************* + * LVGL UI Style config + ******************************************************************************************/ +#if defined(_UI_STYLE_LVGL_) + +#ifdef DISPLAY_OSD_W +#undef DISPLAY_OSD_W +#endif + +#ifdef DISPLAY_OSD_H +#undef DISPLAY_OSD_H +#endif + +#ifdef DISPLAY_OSD_FMT +#undef DISPLAY_OSD_FMT +#endif + +#include "lv_conf.h" + +/******************************************************************************************* + * OSD res is determined by lvgl library (LV_HOR_RES_MAX / LV_VER_RES_MAX in the lv_conf.h) + ******************************************************************************************/ +#define DISPLAY_OSD_W LV_HOR_RES_MAX +#define DISPLAY_OSD_H LV_VER_RES_MAX + + +/******************************************************************************************* + * OSD format is determined by lvgl library (LV_COLOR_DEPTH in the lv_conf.h) + ******************************************************************************************/ +#if LV_COLOR_DEPTH == 8 + #define DISPLAY_OSD_FMT PXLFMT_INDEX8 + #define DISPLAY_HDAL_OSD_FMT HD_VIDEO_PXLFMT_I8 +#elif LV_COLOR_DEPTH == 24 + #define DISPLAY_OSD_FMT PXLFMT_RGBA5658_PK + #define DISPLAY_HDAL_OSD_FMT HD_VIDEO_PXLFMT_ARGB8565 +#elif LV_COLOR_DEPTH == 32 + #define DISPLAY_OSD_FMT PXLFMT_RGBA8888_PK + #define DISPLAY_HDAL_OSD_FMT HD_VIDEO_PXLFMT_ARGB8888 +#else + #error "LV_COLOR_DEPTH in the lv_conf.h is currently not supported" +#endif + +#define OSD_SCREEN_SIZE (DISPLAY_OSD_W*DISPLAY_OSD_H*HD_VIDEO_PXLFMT_BPP(DISPLAY_HDAL_OSD_FMT)/8) + +/******************************************************************************************* + * Movie stamp user config + ******************************************************************************************/ +#define LV_USER_CFG_STAMP_FONT_ID_24M LV_PLUGIN_FONT_ID_ARIALUNI_106_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_16M LV_PLUGIN_FONT_ID_ARIALUNI_86_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_12M LV_PLUGIN_FONT_ID_ARIALUNI_74_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_8M LV_PLUGIN_FONT_ID_ARIALUNI_60_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_LARGE LV_PLUGIN_FONT_ID_ARIALUNI_48_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_MEDIUM LV_PLUGIN_FONT_ID_ARIALUNI_32_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_SMALL_PIC LV_PLUGIN_FONT_ID_ARIALUNI_18_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_SMALL LV_PLUGIN_FONT_ID_ARIALUNI_16_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_XS LV_PLUGIN_FONT_ID_NOTOSANS_BLACK_8_1BPP + +#define LV_USER_CFG_STAMP_LETTER_SPACE 0 +#define LV_USER_CFG_STAMP_TEXT_ALIGN LV_ALIGN_CENTER +#define LV_USER_CFG_STAMP_RADIUS 0 +#define LV_USER_CFG_STAMP_BORDER_WIDTH 10 +#define LV_USER_CFG_STAMP_EXT_WIDTH 0 +#define LV_USER_CFG_STAMP_EXT_HEIGHT 0 + +/* please always fill ARGB8888, alpha channel will be discarded if output format is yuv (Photo UIDateImprint) */ +#define LV_USER_CFG_STAMP_COLOR_TEXT 0xFFFFFFFF /* text color */ +#define LV_USER_CFG_STAMP_COLOR_BACKGROUND 0XFF000000 /* background color: black */ +#define LV_USER_CFG_MOVIE_DATESTAMP_COLOR_BACKGROUND 0X00000000 /* background color: none */ +#define LV_USER_CFG_STAMP_COLOR_FRAME 0x00000000 /* frame color */ + +/******************************************************************************************* + * Enable LVGL rotate depend on VDO_USE_ROTATE_BUFFER (LV_USE_GPU_NVT_DMA2D in the lv_conf.h should be enabled) + ******************************************************************************************/ +#if VDO_USE_ROTATE_BUFFER == ENABLE + #if LV_USE_GPU_NVT_DMA2D + #define LV_USER_CFG_USE_ROTATE_BUFFER 1 + #else + #error "LV_USE_GPU_NVT_DMA2D in the lv_conf.h must be enabled when VDO_USE_ROTATE_BUFFER = ENABLE" + #endif +#else + #define LV_USER_CFG_USE_ROTATE_BUFFER 0 +#endif + +#define LV_USER_CFG_USE_TWO_BUFFER 0 + +#endif + +#endif //_PRJCFG_DVCAM_H_ diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/make_post.sh b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/make_post.sh new file mode 100755 index 000000000..5ef61d24f --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/make_post.sh @@ -0,0 +1,132 @@ +#!/bin/bash +# global settings +KEEP_SENSOR_LIST=(sen_imx290 sen_sc401ai sen_os02k10 sen_os05a10 sen_os05b10 sen_gc4653 sen_gc5603) +KEEP_ISP_CFG=(isp_imx290_0.cfg isp_gc4653_0.cfg isp_os05a10_0.cfg isp_os05b10_0.cfg isp_sc401ai_0.cfg isp_gc5603_0.cfg ) +KEEP_ISP_BIN=(lut2d_table.bin dpc_table.bin ecs_table.bin ecs_table_ir.bin) +KEEP_LCD_LIST=(disp_if8b_lcd1_psd200_st7789v) + +# install appfs: 1. copy isp_xxx.cfg 2.copy isp bin +pushd ${NVT_HDAL_DIR}/vendor/isp/configs/ +ISP_CFG_DIR=${ROOTFS_DIR}/rootfs/etc/app/isp + +mkdir -p ${ISP_CFG_DIR} +for n in "${KEEP_ISP_CFG[@]}" +do + cp cfg/${n} ${ISP_CFG_DIR} +done +for n in "${KEEP_ISP_BIN[@]}" +do + cp bin/${n} ${ISP_CFG_DIR} +done + +popd + +# remove sensor ko and install sensor cfg to /etc/app/sensor +KEEP_SENSOR_DIR=${ROOTFS_DIR}/rootfs/lib/modules/${NVT_LINUX_VER}/hdal/keep_sensores +SENSOR_CFG_DIR=${ROOTFS_DIR}/rootfs/etc/app/sensor +mkdir -p ${SENSOR_CFG_DIR} +mkdir ${KEEP_SENSOR_DIR} +for n in "${KEEP_SENSOR_LIST[@]}" +do + cp ${NVT_HDAL_DIR}/ext_devices/sensor/configs/cfg/${n}_565.cfg ${SENSOR_CFG_DIR} + mv ${ROOTFS_DIR}/rootfs/lib/modules/${NVT_LINUX_VER}/hdal/${n} ${KEEP_SENSOR_DIR} +done +rm -rf ${ROOTFS_DIR}/rootfs/lib/modules/${NVT_LINUX_VER}/hdal/sen_* +mv ${KEEP_SENSOR_DIR}/* ${ROOTFS_DIR}/rootfs/lib/modules/${NVT_LINUX_VER}/hdal +rmdir ${KEEP_SENSOR_DIR} + + +echo ${NVT_LINUX_VER} +KERVER=${NVT_LINUX_VER} +#SENSOR1=sen_os05b10 +SENSOR1=`cat configs/cfg_gen/ModelConfig.mk | grep "SENSOR1 =" | sed 's/SENSOR1 = //g'` +#LCD1=disp_if8b_lcd1_psd200_st7789v +LCD1=`cat configs/cfg_gen/ModelConfig.mk | grep "LCD1 =" | sed 's/LCD1 = //g'` +# move ko to ramdisk to speed up boot time. + +echo sen1=${SENSOR1} + +MV_KO_LIST=(\ +/lib/modules/$KERVER/extra/mcu/drv_sf_i2c_mcu.ko \ +/lib/modules/$KERVER/extra/crypto/cryptodev-linux/cryptodev.ko \ +/lib/modules/$KERVER/vos/kwrap/kwrap.ko \ +/lib/modules/$KERVER/hdal/comm/nvtmem/nvtmem.ko \ +/lib/modules/$KERVER/hdal/comm/kdrv_comm.ko \ +/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_gfx2d.ko \ +/lib/modules/$KERVER/hdal/kdrv_videocapture/kdrv_videocapture.ko \ +/lib/modules/$KERVER/hdal/kdrv_videoprocess/kdrv_videoprocess.ko \ +/lib/modules/$KERVER/hdal/kflow_common/kflow_common.ko \ +/lib/modules/$KERVER/hdal/kflow_gfx/videosprite/nvt_videosprite.ko \ +/lib/modules/$KERVER/hdal/kflow_videocapture/kflow_videocapture.ko \ +/lib/modules/$KERVER/hdal/kflow_videoprocess/kflow_videoprocess.ko \ +/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_affine/affine_neon/kdrv_afn_neon.ko \ +/lib/modules/$KERVER/hdal/kdrv_gfx2d/kdrv_affine/kdrv_afn.ko \ +/lib/modules/$KERVER/hdal/kflow_gfx/nvt_gfx.ko \ +/lib/modules/$KERVER/hdal/kdrv_videoout/ide/nvt_ide.ko \ +/lib/modules/$KERVER/hdal/kdrv_videoout/dsi/nvt_dsi.ko \ +/lib/modules/$KERVER/hdal/kdrv_videoout/display_obj/kdrv_videoout.ko \ +/lib/modules/$KERVER/hdal/kflow_videoout/unit/kflow_videoout.ko \ +/lib/modules/$KERVER/hdal/display_panel/nvt_dispdev_panel.ko \ +/lib/modules/$KERVER/hdal/display_panel/${LCD1}/${LCD1}.ko \ +/lib/modules/$KERVER/hdal/kdrv_videocodec/kdrv_h26x.ko \ +/lib/modules/$KERVER/hdal/nvt_vencrc/nvt_vencrc.ko \ +/lib/modules/$KERVER/hdal/kflow_videoenc/unit/kflow_videoenc.ko \ +/lib/modules/$KERVER/hdal/kflow_videodec/unit/kflow_videodec.ko \ +/lib/modules/$KERVER/hdal/kdrv_audioio/audio_common/nvt_audio.ko \ +/lib/modules/$KERVER/hdal/kdrv_audioio/kdrv_audio/nvt_kdrv_audio.ko \ +/lib/modules/$KERVER/hdal/kflow_audiocapture/unit/kflow_audiocap.ko \ +/lib/modules/$KERVER/hdal/kflow_audioout/unit/kflow_audioout.ko \ +/lib/modules/$KERVER/hdal/kdrv_audioio/audlib_aac/nvt_audlib_aac.ko \ +/lib/modules/$KERVER/hdal/kflow_audioenc/unit/kflow_audioenc.ko \ +/lib/modules/$KERVER/hdal/kflow_audiodec/unit/kflow_audiodec.ko \ +/lib/modules/$KERVER/hdal/isp/nvt_isp.ko \ +/lib/modules/$KERVER/hdal/ae/nvt_ae.ko \ +/lib/modules/$KERVER/hdal/awb/nvt_awb.ko \ +/lib/modules/$KERVER/hdal/iq/nvt_iq.ko \ +/lib/modules/$KERVER/hdal/${SENSOR1}/nvt_${SENSOR1}.ko \ +/lib/modules/$KERVER/hdal/kdrv_md/kdrv_md.ko \ +/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbcopyarea.ko \ +/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbfillrect.ko \ +/lib/modules/$KERVER/kernel/drivers/video/fbdev/core/cfbimgblt.ko \ +/lib/modules/$KERVER/hdal/kdrv_videoout/fbdev/nvt_fb.ko \ +/lib/modules/$KERVER/kernel/drivers/usb/common/usb-common.ko \ +/lib/modules/$KERVER/kernel/drivers/usb/core/usbcore.ko \ +/lib/modules/$KERVER/kernel/drivers/usb/host/ehci-hcd.ko \ +/lib/modules/$KERVER/kernel/drivers/net/mii.ko \ +/lib/modules/$KERVER/kernel/drivers/net/usb/usbnet.ko \ +/lib/modules/$KERVER/extra/net/GobiNet/drv_gobi_net.ko \ +/lib/modules/$KERVER/kernel/drivers/net/usb/cdc_ether.ko \ +/lib/modules/$KERVER/kernel/drivers/net/usb/rndis_host.ko \ +/lib/modules/$KERVER/kernel/drivers/usb/serial/usbserial.ko \ +/lib/modules/$KERVER/kernel/drivers/usb/serial/usb_wwan.ko \ +/lib/modules/$KERVER/kernel/drivers/usb/serial/option.ko \ +/lib/modules/$KERVER/kernel/drivers/usb/class/cdc-wdm.ko \ +/lib/modules/$KERVER/kernel/drivers/net/usb/qmi_wwan.ko \ +) + + +#/lib/modules/$KERVER/hdal/comm/uvcp/nvt_uvcp.ko \ +#/lib/modules/$KERVER/hdal/comm/usb2dev/nvt_usb2dev.ko \ + + + +if [ -d ${ROOTFS_DIR}/rootfs/etc/lib ]; then + echo "remove old rootfs etc/lib" + rm -r ${ROOTFS_DIR}/rootfs/etc/lib +fi + + +for n in "${MV_KO_LIST[@]}" +do + if [ -f ${ROOTFS_DIR}/rootfs/${n} ]; then + path=$(dirname "${ROOTFS_DIR}/rootfs/etc/${n}") + if [ ! -d ${path} ]; then + mkdir -p ${path} + fi + echo "mv ${ROOTFS_DIR}/rootfs/${n} to ${path}/" + mv ${ROOTFS_DIR}/rootfs/${n} ${path}/ + ${STRIP} -g --strip-unneeded ${ROOTFS_DIR}/rootfs/etc/${n} + fi +done + + diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/mtd_cfg.txt b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/mtd_cfg.txt new file mode 100755 index 000000000..628956a92 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/mtd_cfg.txt @@ -0,0 +1,25 @@ +ROOTFS_UBI_SUB_PAGE_SIZE=2048 # Same as page size +ROOTFS_UBI_PAGE_SIZE=2048 # Nand page size +ROOTFS_UBI_ERASE_BLK_SIZE=126976 # (64-2) * Page size=126976 +ROOTFS_UBI_MAX_LEB_COUNT=544 # Size = UBI_MAX_LEB_COUNT * UBI_BLK_SIZE; It's calculated by "python ubi_max_leb.py Bytes" +ROOTFS_UBI_RW_MAX_LEB_COUNT=416 # Size = UBI_MAX_LEB_COUNT * UBI_BLK_SIZE; It's calculated by "python ubi_max_leb.py Bytes" +ROOTFS_UBI_BLK_SIZE="128KiB" # UBIFS Nand flash block size (KiB) +ROOTFS_UBI_COMPRESS_MODE="lzo" # UBIFS compression type: "lzo", "favor_lzo", "zlib" "none" + +ROOTFS_SQ_COMPRESS_MODE="xz" # Squashfs compression type: "gzip", "lzo" and "xz" +ROOTFS_SQ_BLK_SIZE="64K" # Squashfs Nand flash block size (KiB): e.g. spinand: 128K, spinor: 64K + +ROOTFS_JFFS2_COMPRESS_MODE="lzo" # jffs2 compression type: "lzo" "zlib" "rtime" +ROOTFS_JFFS2_SIZE=0x3200000 # jffs2 partition size: get from /proc/mtd +ROOTFS_JFFS2_RW_SIZE=0x2500000 # jffs2 partition size: get from /proc/mtd +ROOTFS_JFFS2_BLK_SIZE="64KiB" # jffs2 block size (KiB): spinand: 128KiB, spinor: 64KiB +ROOTFS_JFFS2_PAGE_SIZE="2048" # jffs2 page size (Bytes): only used by nand, nor flash can be ignored. + +ROOTFS_EXT4_SIZE=$(shell printf "%d\n" 0x0A000000) +ROOTFS_FAT_CACHE_SIZE=$(shell printf "%d\n" 0x0A000000) + +#APPFS, set EN=OFF to disable building vendor_cfg +ROOTFS_JFFS2_APP_SIZE=0x01E0000 +ROOTFS_JFFS2_APP_NOR_SIZE=0x0E20000 +ROOTFS_UBI_APP_MAX_LEB_COUNT=233 +ROOTFS_EXT4_APP_SIZE=$(shell printf "%d\n" 0x0C000000) diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-audio.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-audio.dtsi new file mode 100755 index 000000000..69bcc382d --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-audio.dtsi @@ -0,0 +1,12 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +/ { + audio@1 { type = "none"; i2s_ctrl = <0>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; }; + audio@2 { type = "embedded"; i2s_ctrl = <4>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; }; +}; + diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-basic.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-basic.dtsi new file mode 100755 index 000000000..5eae716e4 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-basic.dtsi @@ -0,0 +1,86 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +#include +#include + +/ { + model = "Novatek NA51089"; + compatible = "novatek,na51089", "nvt,ca9"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x0>; + next-level-cache = <&L2>; + clock-frequency = <960000000>; + }; + }; + + cg@f0020000 { + compatible = "nvt,core_clk"; + reg = <0xf0020000 0x1000>; + }; + + /* binding to clk framework driver */ + periph_clk: periph_clk { + compatible = "nvt,periph_clk"; + #clock-cells = <0>; + clock-output-names = "periph_clk"; + }; + + global_timer@ffd00200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xffd00200 0x20>; + interrupts = ; + clocks = <&periph_clk>; + }; + + private_timer@ffd00600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xffd00600 0x20>; + interrupts = ; + clocks = <&periph_clk>; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>; + }; + + L2: cache-controller@ffe00000 { + compatible = "arm,pl310-cache"; + reg = <0xffe00000 0x1000>; + interrupts = ; + cache-unified; + arm,shared-override; + cache-level = <2>; + arm,data-latency = <2 2 2>; + arm,tag-latency = <2 2 2>; + }; + + gic: interrupt-controller@0xffd00000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0xffd01000 0x1000>, /* GIC Dist */ + <0xffd00100 0x1000>; /* GIC CPU */ + }; + + scu: snoop-control-unit@0xffd00000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xffd00000 0x100>; + }; +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-display.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-display.dtsi new file mode 100755 index 000000000..0802a7603 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-display.dtsi @@ -0,0 +1,29 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ +#include +#include + + /* PWM on uboot (nvt_fr_pwm.c) */ + /* "Note:\n" + * "Defalut freq is 250KHz,\n" + * "therefore each unit of [period_ns] and [duty_ns] should be 4000 ns,\n" + * "for channel 0 to 7 the maximum unit is 65535, so legal range of [period_ns] is 8000 to 262140000 ns,\n" + * "for other channels the maximum unit is 255, so legal range of [period_ns] is 8000 to 1020000 ns.\n" + */ +/* lcd_bl_gpio = ; ==> if the controlled method is GPIO of lcd backlight */ +/* lcd_bl2_gpio = ; ==> optional for the circuit design */ +/* lcd_bl_pwm = ; ==> if the controlled method is PWM of lcd backlight*/ +/* lcd_rotate = <0>; ==> 0:rotate 90; 1:rotate 90; 270:rotate 270*/ +/* lcd_enable = ; ==> optional for the circuit design*/ +/* lcd_power = ; ==> optional for the circuit design*/ +/* lcd_standby = ; ==> optional for the circuit design*/ + +/ { + display { type = "lcd"; lcd_ctrl = <1>; sif_channel = <4>; gpio_cs = ; gpio_clk = ; gpio_data = ; }; + logo { enable = <1>; lcd_type = ; lcd_rotate = <270>; lcd_reset = ; lcd_bl_gpio = ; lcd_power = ;}; +}; + diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-evb.dtb b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-evb.dtb new file mode 100644 index 0000000000000000000000000000000000000000..cb42afa518dcb3b5844882d346e2738b8da4e95b GIT binary patch literal 17582 zcmd5^YiuRwS)Svy9Rh7`y^t<#adx-lvU{9k@2=NLlgeISHiz{M+nY2I+R1okjy>yh z>&&s&8&wc!fA9m*AS4h{ek4DTDkLrfA<@E*wxK||Wm|**DX1V-pdt`1{6MWxm*;uE z%X~BE*hz&zeA0O4y?oDm`K~i(#<$=7-GBAG`Cs=uZ`$)d_7u*K;J6>heK=4?Q}Bn? zb>VMCQzvj1-IdOM(2IA+R%S0w)TW=Hn6d|PjJB2RTsu&*_I~eN7+4+R(4PIrQ}> zrn|1Z4T8Q?hesvco@vx-lQk5Og7a>iMp_&yxsm*}nkMW-t`k!#b%HH@snA~4-pwd?fPP92 z@7x~6r8kCyJl8(*e~kT>?HdoEUMb$Lk`^(c=CKnn@3h79XZ2ZP3WIPbu7;geq+i5gY?J;y9Q1?bD>#f#e}`-OLz?;c zrl!er`QI79CqDa%(XAxyUYw?T-JTm)?Lc~s)7J;&a61VBgrfbbe80XXjZ$Gh<28e= z-?`1xecqkh>@qff;}4nisgkujov!hvy4Oy6GevI{<^X@PP+DBcb>9J^bXA2N?sT%4 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zWS&SJPE~#dOM16F^+_&16Ky28=i~>)*$!Nes-1m&*2*81m4-MZ@+jy9)h2!upf9Y@ z3$`tN+8Wi-Ikf%k*W(-JLAsrJ_>ir}KNH>-_Js_;n(ZWwo?IoJ>dhp=o5Jl*wTX{f zxA3ZewTF*kyhhUKRGC7LZ^-#ca4l*_H)z{%ZyrwMoCYIZZ} zg*zUFn&oZnWyT)eKo4!k)i}aiQW0k71dlnx$d|XJIelVkycws8#*$SCa|FAYM# z_o80Fj?fIY&@+%quZ0)XI+2%u9wh2nXD>zLHxjld!FAd)e8P+G;nTRmbCo;b(-flV z@qLR{YEcEBbhY*lJl6HqbnYqFvOt`UT0xbo4LgDs!2Kw}}0h;*Ap`x74DQ27;wHo;kugU-kellwqff&H zLB`x3EQDtLAL97X~o)z5o;%`SkofDjEQSyc6q@w7yhQV zzPY;L&#tZc%d_Mty4+SA(>&umdVnKKu!NX3PZZ(^OmX2xO4wO$k# zHs^$d(b@Iq{lz-AI2)VmSVc{Rt6XQ6{JF&|!djlaiXGDG#->mkv&(Bs3mcepvHULO zR@78#>e!8e0_9eqJ}=iwVwQbj9lOelhO?e~OLOxR-UgP1)pdIoUlngs%O +#include "nvt-peri.dtsi" /* engine register definition */ +#include "nvt-top.dtsi" /* pinmux, made from tool */ +#include "nvt-i2c.dtsi" /* i2c */ +#include "nvt-gpio.dtsi" /* gpio, made from tool */ +#include "nvt-peri-dev.dtsi"/* peripheral device dts config */ +#include "nvt-audio.dtsi" /* peripheral: audio */ +#include "nvt-display.dtsi" /* peripheral: display */ +#include "nvt-media.dtsi" /* ko files relation */ +#include "nvt-mem-tbl.dtsi" /* memory partition */ +#include "nvt-storage-partition.dtsi" /* flash partition */ +#include "nvt-info.dtsi" /* used for turnkey information */ +#include "nvt-nvtpack.dtsi" /* used for turnkey to make all-in-one bin */ diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-evb.tmp.dts b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-evb.tmp.dts new file mode 100644 index 000000000..7191afdf4 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-evb.tmp.dts @@ -0,0 +1,1183 @@ +# 1 "nvt-evb.dts" +# 1 "" +# 1 "" +# 1 "nvt-evb.dts" + + + + + + + +/dts-v1/; +# 1 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/gpio/nvt-gpio.h" 1 +# 13 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/gpio/nvt-gpio.h" +# 1 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/gpio/gpio.h" 1 +# 14 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/gpio/nvt-gpio.h" 2 +# 10 "nvt-evb.dts" 2 +# 1 "nvt-peri.dtsi" 1 +# 10 "nvt-peri.dtsi" +# 1 "nvt-basic.dtsi" 1 +# 9 "nvt-basic.dtsi" +# 1 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/interrupt-controller/arm-gic.h" 1 +# 9 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/interrupt-controller/arm-gic.h" +# 1 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/interrupt-controller/irq.h" 1 +# 10 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/interrupt-controller/arm-gic.h" 2 +# 10 "nvt-basic.dtsi" 2 + +/ { + model = "Novatek NA51089"; + compatible = "novatek,na51089", "nvt,ca9"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x0>; + next-level-cache = <&L2>; + clock-frequency = <960000000>; + }; + }; + + cg@f0020000 { + compatible = "nvt,core_clk"; + reg = <0xf0020000 0x1000>; + }; + + + periph_clk: periph_clk { + compatible = "nvt,periph_clk"; + #clock-cells = <0>; + clock-output-names = "periph_clk"; + }; + + global_timer@ffd00200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xffd00200 0x20>; + interrupts = <1 11 0xf01>; + clocks = <&periph_clk>; + }; + + private_timer@ffd00600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xffd00600 0x20>; + interrupts = <1 13 0xf01>; + clocks = <&periph_clk>; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <0 112 4>; + interrupt-affinity = <&cpu0>; + }; + + L2: cache-controller@ffe00000 { + compatible = "arm,pl310-cache"; + reg = <0xffe00000 0x1000>; + interrupts = <0 96 4>; + cache-unified; + arm,shared-override; + cache-level = <2>; + arm,data-latency = <2 2 2>; + arm,tag-latency = <2 2 2>; + }; + + gic: interrupt-controller@0xffd00000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0xffd01000 0x1000>, + <0xffd00100 0x1000>; + }; + + scu: snoop-control-unit@0xffd00000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xffd00000 0x100>; + }; +}; +# 11 "nvt-peri.dtsi" 2 + +/ { + chosen { + bootargs = " "; + }; + + aliases { + mmc0 = &mmc0; + mmc1 = &mmc1; + }; + + uart@f0290000 { + compatible = "ns16550a"; + reg = <0xf0290000 0x1000>; + interrupts = <0 43 4>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <24000000>; + fifo-size = <64>; + uart_id = <0>; + }; + + uart@f0300000 { + compatible = "ns16550a"; + reg = <0xf0300000 0x1000>; + interrupts = <0 44 4>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <48000000>; + fifo-size = <64>; + hw_flowctrl = <0>; + rx_trig_level = <3>; + uart_id = <1>; + }; + + uart@f0310000 { + compatible = "ns16550a"; + reg = <0xf0310000 0x1000>; + interrupts = <0 45 4>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <48000000>; + fifo-size = <64>; + hw_flowctrl = <0>; + rx_trig_level = <3>; + uart_id = <2>; + }; + + kdrv_rpc: cc@f0090000 { + compatible = "kdrv_rpc"; + reg = <0xf0090000 0x300>; + interrupts = <0 59 4>; + }; + + mmc0: mmc@f0420000 { + compatible = "nvt,nvt_mmc"; + reg = <0xf0420000 0x1000>; + interrupts = <0 30 4>; + max-frequency = <48000000>; + voltage-switch = <0>; + max-voltage = <3300>; + bus-width = <4>; + neg-sample-edge = <0>; + driving = <15 15 15 20 15 15 25 25 25 25 25 25>; + cd_gpio = <(9) 0x0 0x0>; + card_power_gpio = <(7 + 0x20) 0x0>; + + + }; + + mmc1: mmc@f0500000 { + compatible = "nvt,nvt_mmc2"; + reg = <0xf0500000 0x1000>; + interrupts = <0 31 4>; + max-frequency = <48000000>; + voltage-switch = <0>; + max-voltage = <3300>; + bus-width = <4>; + neg-sample-edge = <0>; + driving = <15 8 8 20 8 8 20 8 8 20 8 8>; + cd_gpio = <0 0x0 0x1>; + + + + }; + + nand: nand@f0400000 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "nvt,nvt_spinand"; + reg = <0xf0400000 0x1000>; + interrupts = <0 29 4>; + clock-frequency = <96000000>; + nvt-devname = "spi_nand.0"; + }; + + nor: nor@f0400000 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "nvt,nvt_spinor"; + reg = <0xf0400000 0x1000>; + interrupts = <0 29 4>; + clock-frequency = <120000000>; + nvt-devname = "spi_nor.0"; + trace-stdtable = <0>; + }; + + gpio: gpio@f0070000 { + compatible = "nvt,nvt_gpio"; + reg = <0xf0070000 0x10000>; + interrupts = <0 24 4>; + #gpio-cells = <2>; + }; + + eth@f02b0000 { + compatible = "nvt,synopsys_eth"; + reg = <0xf02b0000 0x3800>; + interrupts = <0 34 4>; + sp-clk = <0>; + ref-clk-out = <0>; + }; + + phy@f02b3800 { + compatible = "nvt,eth_phy"; + reg = <0xf02b3800 0x400>; + }; + + wdt@f0050000 { + compatible = "nvt,nvt_wdt"; + reg = <0xf0050000 0x10000>; + interrupts = <0 57 4>; + }; + + pwm: pwm@f0210000 { + compatible = "nvt,nvt_kdrv_pwm"; + reg = <0xf0210000 0x2000>; + interrupts = <0 26 4>; + }; + + adc@f0260000 { + compatible = "nvt,nvt_adc"; + reg = <0xf0260000 0x1000>; + interrupts = <0 47 4>; + #io-channel-cells = <1>; + }; + + rtc@f0060000 { + compatible = "nvt,nvt_rtc"; + reg = <0xf0060000 0x100>; + interrupts = <0 56 4>; + }; + + drtc@f00b0000 { + compatible = "nvt,nvt_drtc"; + reg = <0xf00b0000 0x100>; + }; + + crypto: crypto@f0620000 { + compatible = "nvt,nvt_crypto"; + reg = <0xf0620000 0x100>; + interrupts = <0 38 4>; + mclk = <1>; + }; + + hash: hash@f0670000 { + compatible = "nvt,nvt_hash"; + reg = <0xf0670000 0x100>; + interrupts = <0 28 4>; + mclk = <1>; + }; + + rsa: rsa@f06a0000 { + compatible = "nvt,nvt_rsa"; + reg = <0xf06a0000 0x100>; + interrupts = <0 20 4>; + mclk = <1>; + }; + + top: top@f0010000 { + compatible = "nvt,nvt_top"; + reg = <0xf0010000 0x2000 + 0xf0030000 0x2000 + 0xf0070000 0x10000>; + }; + + sie@f0c00000 { + compatible = "nvt,drv_sie"; + reg = <0xf0c00000 0x900 + 0xf0d20000 0x900 + 0xF0D30000 0x900>; + interrupts = <0 1 4 + 0 2 4 + 0 3 4>; + + }; + + tge@f0cc0000 { + compatible = "nvt,kdrv_tge"; + reg = <0xf0cc0000 0x150>; + interrupts = <0 22 4>; + }; + + rhe@f0ce0000 { + compatible = "nvt,kdrv_rhe"; + reg = <0xf0ce0000 0x900>; + interrupts = <0 13 4>; + }; + + ime@f0c40000 { + compatible = "nvt,kdrv_ime"; + reg = <0xf0c40000 0x1000>; + interrupts = <0 6 4>; + }; + + ife2@f0d00000 { + compatible = "nvt,kdrv_ife2"; + reg = <0xf0d00000 0x100>; + interrupts = <0 9 4>; + }; + + ise@f0c90000 { + compatible = "nvt,kdrv_ise"; + reg = <0xf0c90000 0x100>; + interrupts = <0 21 4 + 0 85 4>; + }; + + ipe@f0c30000 { + compatible = "nvt,kdrv_ipe"; + reg = <0xf0c30000 0x900>; + interrupts = <0 5 4>; + }; + + ife@f0c70000 { + compatible = "nvt,kdrv_ife"; + reg = <0xf0c70000 0x800>; + interrupts = <0 8 4>; + }; + + vpe@f0cd0000 { + compatible = "nvt,kdrv_vpe"; + reg = <0xf0cd0000 0x1040>; + interrupts = <0 62 4>; + }; + + ai@f0c60000 { + compatible = "nvt,kdrv_ai"; + reg = <0xf0c60000 0x23c + 0xf0d50000 0x114 + 0xf0cb0000 0x22c>; + interrupts = <0 14 4 + 0 13 4 + 0 11 4>; + clock-frequency = <600000000 480000000 600000000>; + }; + + md@f0c10000 { + compatible = "nvt,kdrv_md"; + reg = <0xf0c10000 0x150>; + interrupts = <0 46 4>; + clock-frequency = <240000000>; + }; + dis@f0c50000 { + compatible = "nvt,kdrv_dis"; + reg = <0xf0c50000 0x114>; + interrupts = <0 10 4>; + }; + + coe@f0a11000 { + compatible = "nvt,nvt_coe"; + reg = <0xf0a11000 0x2c0>; + }; + + dce@f0c20000 { + compatible = "nvt,kdrv_dce"; + reg = <0xf0c20000 0x650>; + interrupts = <0 7 4>; + }; + + ive@f0d70000 { + compatible = "nvt,kdrv_ive"; + reg = <0xf0d70000 0x6c>; + interrupts = <0 53 4>; + }; + + sde@f0d90000 { + compatible = "nvt,kdrv_sde"; + reg = <0xf0d90000 0x90>; + interrupts = <0 74 4>; + }; + + ide@f0800000 { + compatible = "nvt,nvt_ide"; + reg = <0xf0800000 0x1000>; + interrupts = <0 48 4>; + }; + + dsi@f0840000 { + compatible = "nvt,nvt_dsi"; + reg = <0xf0840000 0x1000>; + interrupts = <0 50 4>; + }; + + csi@f0280000 { + compatible = "nvt,nvt_csi"; + reg = <0xf0280000 0x100 + 0xf0330000 0x100>; + interrupts = <0 54 4 + 0 55 4>; + }; + + lvds@f0270000 { + compatible = "nvt,nvt_lvds"; + reg = <0xF0270000 0x200 + 0xF0370000 0x200>; + interrupts = <0 54 4 + 0 55 4>; + }; + + senphy@f06b0000 { + compatible = "nvt,nvt_senphy"; + reg = <0xF06B0000 0x100>; + }; + + ssenif@f0xx0000 { + compatible = "nvt,nvt_ssenif"; + reg = <0xF02C0000 0x2000>; + interrupts = <0 61 4>; + }; + + sif@f0240000 { + compatible = "nvt,nvt_sif"; + reg = <0xf0240000 0x200>; + interrupts = <0 40 4>; + clock-frequency = <1000000>; + }; + + graphic@f0c80000 { + compatible = "nvt,nvt_graphic"; + reg = <0xF0C80000 0x300 + 0xF0D10000 0x100>; + interrupts = <0 18 4 + 0 19 4>; + }; + + affine@f0ca0000 { + compatible = "nvt,nvt_affine"; + reg = <0xF0CA0000 0x100>; + interrupts = <0 52 4>; + }; + + h26x@f0a10000 { + compatible = "nvt,nvt_h26x"; + reg = <0xf0a10000 0xa00>; + interrupts = <0 16 4>; + power_saving = <0>; + }; + + timer@f0040000 { + compatible = "nvt,nvt_timer"; + reg = <0xf0040000 0x300>; + interrupts = <0 0 4>; + }; + + eac@f0640000 { + compatible = "nvt,nvt_eac"; + reg = <0xF0640000 0x200>; + }; + + jpg@f0a00000 { + compatible = "nvt,nvt_jpg"; + reg = <0xf0a00000 0x100>; + interrupts = <0 17 4>; + }; + + nvt_usb2host@f0600000 { + compatible = "nvt,ehci-nvtivot"; + reg = <0xf0600000 0x10000>; + interrupts = <0 27 4>; + }; + + nvt_usb2dev@f0600000 { + compatible = "nvt,fotg200_udc"; + reg = <0xf0600000 0x10000>; + interrupts = <0 27 4>; + }; + + nvt_usb_chrg@f0600000 { + compatible = "nvt,nvt_usb_chrgdet"; + reg = <0xf0600000 0x10000>; + }; + + dai@f0630000 { + compatible = "nvt,nvt_dai"; + reg = <0xF0630000 0xbc>; + interrupts = <0 15 4>; + }; + + rotate@f0cf0000 { + compatible = "nvt,nvt_rotation"; + reg = <0xF0CF0000 0x100>; + interrupts = <0 81 4>; + }; + + drvdump@0 { + compatible = "nvt,nvt_drvdump"; + }; + + dsp@f1430000 { + compatible = "nvt,nvt_dsp"; + reg = <0xF1430000 0x200 + 0xF2000000 0x1000000 + 0xF1440000 0x200 + 0xF3000000 0x1000000>; + interrupts = <0 76 4 + 0 77 4>; + }; + + spi0: spi@f0230000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0230000 0x10000>; + interrupts = <0 35 4>; + dma-support = <0>; + nvt-devname = <0>; + }; + + spi1: spi@f0320000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0320000 0x10000>; + interrupts = <0 36 4>; + dma-support = <0>; + nvt-devname = <1>; + }; + + spi2: spi@f0340000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0340000 0x10000>; + interrupts = <0 37 4>; + dma-support = <0>; + nvt-devname = <2>; + }; + + sdp@f0390000 { + compatible = "nvt,nvt_sdp"; + reg = <0xf0390000 0x28>; + interrupts = <0 12 4>; + }; + + tse@f0650000 { + compatible = "nvt,nvt_tse"; + reg = <0xF0650000 0x90>; + interrupts = <0 23 4>; + }; + + remote@f0250000 { + compatible = "nvt,nvt_remote"; + reg = <0xf0250000 0x28>; + interrupts = <0 25 4>; + }; + + rng: rng@f0680000 { + compatible = "nvt,nvt_rng"; + reg = <0xf0680000 0x100>; + }; + + nvt_arb@f0000000 { + compatible = "nvt,nvt_arb"; + reg = <0xF0000000 0xA000 + 0xF0FE0000 0x300>; + interrupts = <0 33 4>; + }; + + nvt_otp@f0660000 { + compatible = "nvt,nvt_otp"; + reg = <0xF0660000 0x70>; + }; + + kdrv_ipp { + clock-frequency = <240000000>; + }; + + uvcp: uvcp@f0690000 { + compatible = "nvt,nvt_uvcp"; + reg = <0xf0690000 0x200>; + interrupts = <0 59 4>; + }; + pll_preset@0 { + pll3{pll_config = <3 0 0>;}; + pll4{pll_config = <4 0 0>;}; + pll5{pll_config = <5 297000000 1>;}; + pll6{pll_config = <6 0 0>;}; + pll7{pll_config = <7 0 0>;}; + pll8{pll_config = <8 0 0>;}; + pll9{pll_config = <9 0 0>;}; + pll11{pll_config = <11 0 0>;}; + pll12{pll_config = <12 0 1>;}; + }; +}; +# 11 "nvt-evb.dts" 2 +# 1 "nvt-top.dtsi" 1 +&top { + sdio{pinmux = <0x5>;}; + sdio2{pinmux = <0x5>;}; + sdio3{pinmux = <0x0>;}; + nand{pinmux = <0x5>;}; + sensor{pinmux = <0x0>;}; + sensor2{pinmux = <0x0>;}; + mipi_lvds{pinmux = <0x0>;}; + i2c{pinmux = <0x40>;}; + sif{pinmux = <0x0>;}; + uart{pinmux = <0x1825>;}; + spi{pinmux = <0x0>;}; + sdp{pinmux = <0x0>;}; + remote{pinmux = <0x0>;}; + pwm{pinmux = <0x8000>;}; + + pwm2{pinmux = <0x0000000>;}; + ccnt{pinmux = <0x0>;}; + audio{pinmux = <0x0>;}; + lcd{pinmux = <0x10000000>;}; + tv{pinmux = <0x0>;}; + eth{pinmux = <0x0>;}; + misc{pinmux = <0x0>;}; +}; +# 12 "nvt-evb.dts" 2 +# 1 "nvt-i2c.dtsi" 1 + + + + + + + +/ { + i2c0: i2c@f0220000 { compatible = "nvt,nvt_i2c"; reg = <0xf0220000 0x100>; interrupts = <0 41 4>; clock-frequency = <400000>; id = <0>; }; + i2c1: i2c2@f0350000 { compatible = "nvt,nvt_i2c"; reg = <0xf0350000 0x100>; interrupts = <0 42 4>; clock-frequency = <400000>; id = <1>; }; + i2c2: i2c3@f03a0000 { compatible = "nvt,nvt_i2c"; reg = <0xf03a0000 0x100>; interrupts = <0 60 4>; clock-frequency = <50000>; id = <2>; }; +}; +# 13 "nvt-evb.dts" 2 +# 1 "nvt-gpio.dtsi" 1 +&top { +# 201 "nvt-gpio.dtsi" + pgpio10{gpio_config = <(10 + 0x20) 0>;}; + sgpio3{gpio_config = <(3 + 0x40) 1>;}; + + +}; +# 14 "nvt-evb.dts" 2 +# 1 "nvt-peri-dev.dtsi" 1 +# 11 "nvt-peri-dev.dtsi" +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + + + + + +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; +}; + +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; +}; + +&spi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; +# 44 "nvt-peri-dev.dtsi" +}; + +&spi1 { + status = "okay"; +}; + +&spi2 { + status = "okay"; +}; +# 15 "nvt-evb.dts" 2 +# 1 "nvt-audio.dtsi" 1 + + + + + + + +/ { + audio@1 { type = "none"; i2s_ctrl = <0>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; }; + audio@2 { type = "embedded"; i2s_ctrl = <4>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; }; +}; +# 16 "nvt-evb.dts" 2 +# 1 "nvt-display.dtsi" 1 + + + + + + + +# 1 "/home/payton/S530/BSP/linux-kernel/include/dt-bindings/pinctrl/nvt_lcd.h" 1 +# 9 "nvt-display.dtsi" 2 +# 25 "nvt-display.dtsi" +/ { + display { type = "lcd"; lcd_ctrl = <1>; sif_channel = <4>; gpio_cs = <(7 + 0x20)>; gpio_clk = <(8 + 0x20)>; gpio_data = <(9 + 0x20)>; }; + logo { enable = <1>; lcd_type = <5>; lcd_rotate = <270>; lcd_reset = <(1 + 0x60)>; lcd_bl_gpio = <(3 + 0x40) 1>; lcd_power = <(8 + 0x20) 1>;}; +}; +# 17 "nvt-evb.dts" 2 +# 1 "nvt-media.dtsi" 1 +# 10 "nvt-media.dtsi" +# 1 "nvt-basic.dtsi" 1 +# 11 "nvt-basic.dtsi" +/ { + model = "Novatek NA51089"; + compatible = "novatek,na51089", "nvt,ca9"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x0>; + next-level-cache = <&L2>; + clock-frequency = <960000000>; + }; + }; + + cg@f0020000 { + compatible = "nvt,core_clk"; + reg = <0xf0020000 0x1000>; + }; + + + periph_clk: periph_clk { + compatible = "nvt,periph_clk"; + #clock-cells = <0>; + clock-output-names = "periph_clk"; + }; + + global_timer@ffd00200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xffd00200 0x20>; + interrupts = <1 11 0xf01>; + clocks = <&periph_clk>; + }; + + private_timer@ffd00600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xffd00600 0x20>; + interrupts = <1 13 0xf01>; + clocks = <&periph_clk>; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <0 112 4>; + interrupt-affinity = <&cpu0>; + }; + + L2: cache-controller@ffe00000 { + compatible = "arm,pl310-cache"; + reg = <0xffe00000 0x1000>; + interrupts = <0 96 4>; + cache-unified; + arm,shared-override; + cache-level = <2>; + arm,data-latency = <2 2 2>; + arm,tag-latency = <2 2 2>; + }; + + gic: interrupt-controller@0xffd00000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0xffd01000 0x1000>, + <0xffd00100 0x1000>; + }; + + scu: snoop-control-unit@0xffd00000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xffd00000 0x100>; + }; +}; +# 11 "nvt-media.dtsi" 2 + +/ { + nvtmpp { + compatible = "nvt,nvtmpp"; + }; + + isf_stream { + compatible = "nvt,isf_stream"; + }; + + isf_flow { + compatible = "nvt,isf_flow"; + }; + + isf_vdocap { + compatible = "nvt,isf_vdocap"; + }; + + isf_vdoprc { + compatible = "nvt,isf_vdoprc"; + }; + + isf_dummy { + compatible = "nvt,isf_dummy"; + }; + + isf_vdoenc { + compatible = "nvt,isf_vdoenc"; + }; + + isf_vdodec { + compatible = "nvt,isf_vdodec"; + }; + + isf_vdoout { + compatible = "nvt,isf_vdoout"; + }; + + dispobj { + compatible = "nvt,nvt_dispobj"; + }; + + dispdev { + compatible = "nvt,nvt_dispdev"; + }; + + audio { + compatible = "nvt,nvt_audio"; + }; + + msdcnvt { + compatible = "nvt,msdcnvt"; + }; + + msdcnvt_adj { + compatible = "nvt,msdcnvt_adj"; + }; + + msdcnvt_custom_si { + compatible = "nvt,msdcnvt_custom_si"; + }; + + wavstudio { + compatible = "nvt,wavstudio"; + }; + + isf_audenc { + compatible = "nvt,isf_audenc"; + }; + + isf_auddec { + compatible = "nvt,isf_auddec"; + }; + + isf_audcap { + compatible = "nvt,isf_audcap"; + }; + + isf_audout { + compatible = "nvt,isf_audout"; + }; + + nvt_ipc { + compatible = "nvt,nvt_ipc"; + }; +}; +# 18 "nvt-evb.dts" 2 +# 1 "nvt-mem-tbl.dtsi" 1 + + + + + + +/ { + + nvt_memory_cfg { + #address-cells = <1>; + #size-cells = <1>; + dram { reg = <0x00000000 0x08000000>; }; + shmem{ reg = <0x00007E00 0x00000200>; }; + loader { reg = <0x01000000 0x00080000>; }; + fdt { reg = <0x01800000 0x00040000>; }; + rtos { reg = <0x01840000 0x00FC0000>; }; + linuxtmp{ reg = <0x02800000 0x04000000>; }; + uboot{ reg = <0x06800000 0x01640000>; }; + logo-fb{ reg = <0x07E40000 0x001C0000>; }; + }; + + + memory { device_type = "memory"; reg = <0x00000000 0x01800000 0x02000000 0x01600000>; }; + + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + + + + + + + libc-heap { size = <0x00200000>; }; + + hdal-memory { + #address-cells = <1>; + #size-cells = <1>; + media { reg = <0x03700000 0x04900000>; }; + }; + + hdal-maxpath-cfg { + + vdocap_active_list = <1 0 0 0 0 0 0 0>; + vdoprc_maxdevice = <2>; + vdoenc_maxpath = <4>; + vdodec_maxpath = <3>; + vdoout_maxdevice = <1>; + adocap_maxdevice = <1>; + adoout_maxdevice = <2>; + adoenc_maxpath = <1>; + adodec_maxpath = <1>; + + gfx_maxjob = <2>; + + stamp_maximg = <9>; + + vdoprc_maxstamp = <4 4>; + + vdoprc_maxmask = <4 4>; + vdoenc_maxstamp = <9 9>; + vdoenc_maxmask = <0 64>; + vdoout_maxstamp = <0 16>; + vdoout_maxmask = <0 64>; + }; +}; +# 19 "nvt-evb.dts" 2 +# 1 "nvt-storage-partition.dtsi" 1 + + + + + + + +&nor { + partition_loader { label = "loader"; reg = <0x0 0x0000000 0x0 0x10000>; }; + partition_fdt { label = "fdt"; reg = <0x0 0x10000 0x0 0x10000>; }; + partition_fdt.restore { label = "fdt.restore"; reg = <0x0 0x20000 0x0 0x10000>; }; + partition_fdt.app { label = "fdt.app"; reg = <0x0 0x30000 0x0 0x20000>; }; + partition_uboot { label = "uboot"; reg = <0x0 0x50000 0x0 0xA0000>; }; + partition_uenv { label = "uenv"; reg = <0x0 0xF0000 0x0 0x10000>; }; + partition_kernel { label = "kernel"; reg = <0x0 0x100000 0x0 0x290000>; }; + partition_rootfs { label = "rootfs"; reg = <0x0 0x390000 0x0 0x3E0000>; }; + partition_rootfs1 { label = "rootfs1"; reg = <0x0 0x770000 0x0 0xB00000>; }; + partition_rtos { label = "rtos"; reg = <0x0 0x1270000 0x0 0x930000>; }; + partition_app { label = "app"; reg = <0x0 0x1BA0000 0x0 0x50000>; }; + partition_sys { label = "sys"; reg = <0x0 0x1D10000 0x0 0x10000>; }; + partition_all { label = "all"; reg = <0x0 0x0000000 0x0 0x2000000>; }; +}; +# 20 "nvt-evb.dts" 2 +# 1 "nvt-info.dtsi" 1 + + + + + + + +/ { + nvt_info { + BIN_NAME = "FW98565A"; + BIN_NAME_T = "FW98565T"; + RTOS_APP_MAIN = "cardv"; + + EMBMEM_BLK_SIZE = "0x10000"; +# 24 "nvt-info.dtsi" + EMBMEM = "EMBMEM_SPI_NOR"; +# 34 "nvt-info.dtsi" + FW_TYPE = "FW_TYPE_PARTIAL"; + + + + + + UI_STYLE = "UI_STYLE_LVGL"; + + + + + + NVT_CFG_APP_EXTERNAL = "hostapd wireless_tool iperf-3 wpa_supplicant dhd_priv"; + + NVT_CFG_APP = "mem cardv memcpy isp_demon sf_app"; + + NVT_ROOTFS_ETC = ""; + + NVT_BINARY_FILE_STRIP = "yes"; + + NVT_CFG_KERNEL_CFG = "na51089_evb_cardv_defconfig_release"; + + NVT_MAKE_POST = "make_post.sh"; + + NVT_SAMPLES_INSTALL = "DISABLE"; + + NVT_CFG_UBOOT_CFG = ""; + + + + + + + + NVT_LINUX_SMP = "NVT_LINUX_SMP_OFF"; + + + + + + + + NVT_CHIP_ID = "CHIP_NA51089"; + + + + + + + + NVT_LINUX_COMPRESS = "NVT_LINUX_COMPRESS_GZ"; + + + + + + + + NVT_DEFAULT_NETWORK_BOOT_PROTOCOL = "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_STATIC_IP"; +# 103 "nvt-info.dtsi" + NVT_ROOTFS_TYPE = "NVT_ROOTFS_TYPE_RAMDISK"; +# 113 "nvt-info.dtsi" + LCD1 = "disp_if8b_lcd1_psd200_st7789v"; +# 126 "nvt-info.dtsi" + SENSOR1 = "sen_os05b10"; + SENSOR1_CFG = "sen_os05b10_565"; + SENSOR2 = "sen_off"; + SENSOR2_CFG = "sen_off"; + + + + + + NVT_ROOTFS_RW_PART_EN = "NVT_ROOTFS_RW_PART_EN_ON"; + + + + + + + NVT_ETHERNET = "NVT_ETHERNET_NONE"; +# 151 "nvt-info.dtsi" + NVT_SDIO_WIFI = "NVT_SDIO_WIFI_RTK"; + + + + + + NVT_USB_WIFI = "NVT_USB_WIFI_NONE"; + + + + + + NVT_USB_4G = "NVT_USB_4G_NONE"; + + + + + + + WIFI_RTK_MDL = "WIFI_RTK_MDL_8189"; + + + + + + + + WIFI_BRCM_MDL = "WIFI_BRCM_MDL_43456c5_ampk6256c5"; + + + + + + + WIFI_NVT_MDL = "WIFI_NVT_MDL_18211"; + + + + + + + NVT_CURL_SSL = "NVT_CURL_SSL_OPENSSL"; +# 201 "nvt-info.dtsi" + NVT_UBOOT_ENV_IN_STORG_SUPPORT = "NVT_UBOOT_ENV_IN_STORG_SUPPORT_OFF"; + + + + + + + TOUCH = "TOUCH_OFF"; + + + + + + + UBOOT_ONLY_LOAD_LINUX = "UBOOT_ONLY_LOAD_LINUX_ON"; + + }; +}; +# 21 "nvt-evb.dts" 2 +# 1 "nvt-nvtpack.dtsi" 1 + + + + + + + +&nor { + + + + + nvtpack { + ver = "NVTPACK_FW_INI_16072017"; + method = <1>; + index { + id0 { partition_name = "loader"; source_file = ""; }; + id1 { partition_name = "fdt"; source_file = "nvt-evb.bin"; }; + id2 { partition_name = "fdt.restore"; source_file = ""; }; + id3 { partition_name = "fdt.app"; source_file = "../rtos/output/application.bin"; }; + id4 { partition_name = "uboot"; source_file = "u-boot.bin"; }; + id5 { partition_name = "uenv"; source_file = ""; }; + id6 { partition_name = "kernel"; source_file = "uImage.bin"; }; + id7 { partition_name = "rootfs"; source_file = "rootfs.ramdisk.bin"; }; + id8 { partition_name = "rootfs1"; source_file = "rootfs_1.squash.bin"; }; + id9 { partition_name = "rtos"; source_file = "../rtos/output/rtos-main.bin"; }; + id10 { partition_name = "app"; source_file = "appfs.cardv.jffs2.nor.bin"; }; + id11 { partition_name = "sys"; source_file = ""; }; + }; + }; +}; +# 21 "nvt-evb.dts" 2 diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-gpio.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-gpio.dtsi new file mode 100755 index 000000000..b937bb500 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-gpio.dtsi @@ -0,0 +1,205 @@ +&top { +/* + cgpio0{pad_config = <0x0 0x1 0x0 0x2>;}; + cgpio1{pad_config = <0x2 0x1 0x2 0x2>;}; + cgpio2{pad_config = <0x4 0x1 0x4 0x2>;}; + cgpio3{pad_config = <0x6 0x1 0x6 0x2>;}; + cgpio4{pad_config = <0x8 0x1 0x8 0x2>;}; + cgpio5{pad_config = <0xA 0x1 0xA 0x2>;}; + cgpio6{pad_config = <0xC 0x1 0xC 0x2>;}; + cgpio7{pad_config = <0xE 0x1 0xE 0x2>;}; + cgpio8{pad_config = <0x10000010 0x10 0x10 0x1>;}; + cgpio9{pad_config = <0x12 0x1 0x12 0x2>;}; + cgpio10{pad_config = <0x14 0x1 0x14 0x2>;}; + cgpio11{pad_config = <0x80000000 0x202 0x16 0x1>;}; + cgpio12{pad_config = <0x80000004 0x100 0x18 0x2>;}; + cgpio13{pad_config = <0x80000008 0x100 0x1A 0x2>;}; + cgpio14{pad_config = <0x8000000C 0x100 0x1C 0x2>;}; + cgpio15{pad_config = <0x80000010 0x100 0x1E 0x2>;}; + cgpio16{pad_config = <0x80000014 0x100 0x20 0x2>;}; + cgpio17{pad_config = <0x80000018 0x202 0x22 0x1>;}; + cgpio18{pad_config = <0x10000024 0x10 0x24 0x2>;}; + cgpio19{pad_config = <0x10000026 0x10 0x26 0x2>;}; + cgpio20{pad_config = <0x10000028 0x10 0x28 0x2>;}; + cgpio21{pad_config = <0x1000002A 0x10 0x2A 0x2>;}; + cgpio22{pad_config = <0x1000002C 0x10 0x2C 0x2>;}; + sgpio0{pad_config = <0x10000060 0x10 0x60 0x1>;}; + sgpio1{pad_config = <0x10000062 0x10 0x62 0x1>;}; + sgpio2{pad_config = <0x64 0x1 0x64 0x1>;}; + sgpio3{pad_config = <0x66 0x1 0x66 0x1>;}; + sgpio4{pad_config = <0x68 0x1 0x68 0x1>;}; + sgpio5{pad_config = <0x1000006A 0x10 0x6A 0x1>;}; + sgpio6{pad_config = <0x6C 0x1 0x6C 0x2>;}; + sgpio7{pad_config = <0x6E 0x1 0x6E 0x2>;}; + sgpio8{pad_config = <0x70 0x1 0x70 0x2>;}; + sgpio9{pad_config = <0x72 0x1 0x72 0x2>;}; + sgpio10{pad_config = <0x74 0x1 0x74 0x2>;}; + sgpio11{pad_config = <0x76 0x1 0x76 0x2>;}; + sgpio12{pad_config = <0x78 0x1 0x78 0x1>;}; + pgpio0{pad_config = <0x80 0x1 0x80 0x0>;}; + pgpio1{pad_config = <0x82 0x1 0x82 0x1>;}; + pgpio2{pad_config = <0x84 0x1 0x84 0x1>;}; + pgpio3{pad_config = <0x86 0x1 0x86 0x1>;}; + pgpio4{pad_config = <0x88 0x1 0x88 0x1>;}; + pgpio5{pad_config = <0x8A 0x1 0x8A 0x1>;}; + pgpio6{pad_config = <0x8C 0x1 0x8C 0x1>;}; + pgpio7{pad_config = <0x8E 0x1 0x8E 0x1>;}; + pgpio8{pad_config = <0x10000090 0x10 0x90 0x1>;}; + pgpio9{pad_config = <0x92 0x1 0x92 0x1>;}; + pgpio10{pad_config = <0x94 0x1 0x94 0x1>;}; + pgpio11{pad_config = <0x96 0x1 0x96 0x1>;}; + pgpio12{pad_config = <0x98 0x1 0x98 0x2>;}; + pgpio13{pad_config = <0x9A 0x1 0x9A 0x2>;}; + pgpio14{pad_config = <0x9C 0x1 0x9C 0x2>;}; + pgpio15{pad_config = <0x9E 0x1 0x9E 0x2>;}; + pgpio16{pad_config = <0xA0 0x1 0xA0 0x2>;}; + pgpio17{pad_config = <0xA2 0x1 0xA2 0x2>;}; + pgpio18{pad_config = <0xA4 0x1 0xA4 0x2>;}; + pgpio19{pad_config = <0xA6 0x1 0xA6 0x2>;}; + pgpio20{pad_config = <0xA8 0x1 0xA8 0x1>;}; + pgpio21{pad_config = <0xAA 0x1 0xAA 0x2>;}; + pgpio22{pad_config = <0xAC 0x1 0xAC 0x2>;}; + pgpio23{pad_config = <0xAE 0x1 0xAE 0x2>;}; + pgpio24{pad_config = <0xB0 0x1 0xB0 0x2>;}; + pgpio25{pad_config = <0xB2 0x202 0xB2 0x2>;}; + lgpio0{pad_config = <0xE0 0x1 0xE0 0x1>;}; + lgpio1{pad_config = <0xE2 0x1 0xE2 0x1>;}; + lgpio2{pad_config = <0xE4 0x1 0xE4 0x1>;}; + lgpio3{pad_config = <0xE6 0x1 0xE6 0x1>;}; + lgpio4{pad_config = <0xE8 0x1 0xE8 0x1>;}; + lgpio5{pad_config = <0xEA 0x1 0xEA 0x1>;}; + lgpio6{pad_config = <0xEC 0x1 0xEC 0x1>;}; + lgpio7{pad_config = <0xEE 0x1 0xEE 0x1>;}; + lgpio8{pad_config = <0x100000F0 0x10 0xF0 0x1>;}; + lgpio9{pad_config = <0xF2 0x1 0xF2 0x1>;}; + lgpio10{pad_config = <0xF4 0x1 0xF4 0x1>;}; + lgpio11{pad_config = <0xF6 0x1 0xF6 0x1>;}; + lgpio12{pad_config = <0xF8 0x1 0xF8 0x1>;}; + lgpio13{pad_config = <0xFA 0x1 0xFA 0x1>;}; + lgpio14{pad_config = <0xFC 0x1 0xFC 0x1>;}; + lgpio15{pad_config = <0xFE 0x1 0xFE 0x1>;}; + lgpio16{pad_config = <0x100 0x1 0x100 0x1>;}; + lgpio17{pad_config = <0x102 0x1 0x102 0x1>;}; + lgpio18{pad_config = <0x104 0x1 0x104 0x1>;}; + lgpio19{pad_config = <0x106 0x1 0x106 0x1>;}; + lgpio20{pad_config = <0x108 0x1 0x108 0x1>;}; + lgpio21{pad_config = <0x10A 0x1 0x10A 0x1>;}; + lgpio22{pad_config = <0x10C 0x1 0x10C 0x2>;}; + lgpio23{pad_config = <0x10E 0x1 0x10E 0x1>;}; + lgpio24{pad_config = <0x110 0x1 0x110 0x1>;}; + dgpio0{pad_config = <0x10000120 0x10 0x120 0x2>;}; + dgpio1{pad_config = <0x10000122 0x10 0x122 0x2>;}; + dgpio2{pad_config = <0x10000124 0x10 0x124 0x2>;}; + dgpio3{pad_config = <0x10000126 0x10 0x126 0x1>;}; + dgpio4{pad_config = <0x10000128 0x10 0x128 0x1>;}; + dgpio5{pad_config = <0x1000012A 0x10 0x12A 0x1>;}; + dgpio6{pad_config = <0x1000012C 0x10 0x12C 0x1>;}; + dgpio7{pad_config = <0x12E 0x1 0x12E 0x1>;}; + dgpio8{pad_config = <0x10000130 0x10 0x130 0x1>;}; + dgpio9{pad_config = <0x10000132 0x10 0x132 0x1>;}; + dgpio10{pad_config = <0x10000134 0x10 0x134 0x1>;}; + cgpio0{gpio_config = ;}; + cgpio1{gpio_config = ;}; + cgpio2{gpio_config = ;}; + cgpio3{gpio_config = ;}; + cgpio4{gpio_config = ;}; + cgpio5{gpio_config = ;}; + cgpio6{gpio_config = ;}; + cgpio7{gpio_config = ;}; + cgpio8{gpio_config = ;}; + cgpio9{gpio_config = ;}; + cgpio10{gpio_config = ;}; + cgpio11{gpio_config = ;}; + cgpio12{gpio_config = ;}; + cgpio13{gpio_config = ;}; + cgpio14{gpio_config = ;}; + cgpio15{gpio_config = ;}; + cgpio16{gpio_config = ;}; + cgpio17{gpio_config = ;}; + cgpio18{gpio_config = ;}; + cgpio19{gpio_config = ;}; + cgpio20{gpio_config = ;}; + cgpio21{gpio_config = ;}; + cgpio22{gpio_config = ;}; + sgpio0{gpio_config = ;}; + sgpio1{gpio_config = ;}; + sgpio2{gpio_config = ;}; + sgpio3{gpio_config = ;}; + sgpio4{gpio_config = ;}; + sgpio5{gpio_config = ;}; + sgpio6{gpio_config = ;}; + sgpio7{gpio_config = ;}; + sgpio8{gpio_config = ;}; + sgpio9{gpio_config = ;}; + sgpio10{gpio_config = ;}; + sgpio11{gpio_config = ;}; + sgpio12{gpio_config = ;}; + pgpio0{gpio_config = ;}; + pgpio1{gpio_config = ;}; + pgpio2{gpio_config = ;}; + pgpio3{gpio_config = ;}; + pgpio4{gpio_config = ;}; + pgpio5{gpio_config = ;}; + pgpio6{gpio_config = ;}; + pgpio7{gpio_config = ;}; + pgpio8{gpio_config = ;}; + pgpio9{gpio_config = ;}; + pgpio10{gpio_config = ;}; + pgpio11{gpio_config = ;}; + pgpio12{gpio_config = ;}; + pgpio13{gpio_config = ;}; + pgpio14{gpio_config = ;}; + pgpio15{gpio_config = ;}; + pgpio16{gpio_config = ;}; + pgpio17{gpio_config = ;}; + pgpio18{gpio_config = ;}; + pgpio19{gpio_config = ;}; + pgpio20{gpio_config = ;}; + pgpio21{gpio_config = ;}; + pgpio22{gpio_config = ;}; + pgpio23{gpio_config = ;}; + pgpio24{gpio_config = ;}; + pgpio25{gpio_config = ;}; + lgpio0{gpio_config = ;}; + lgpio1{gpio_config = ;}; + lgpio2{gpio_config = ;}; + lgpio3{gpio_config = ;}; + lgpio4{gpio_config = ;}; + lgpio5{gpio_config = ;}; + lgpio6{gpio_config = ;}; + lgpio7{gpio_config = ;}; + lgpio8{gpio_config = ;}; + lgpio9{gpio_config = ;}; + lgpio10{gpio_config = ;}; + lgpio11{gpio_config = ;}; + lgpio12{gpio_config = ;}; + lgpio13{gpio_config = ;}; + lgpio14{gpio_config = ;}; + lgpio15{gpio_config = ;}; + lgpio16{gpio_config = ;}; + lgpio17{gpio_config = ;}; + lgpio18{gpio_config = ;}; + lgpio19{gpio_config = ;}; + lgpio20{gpio_config = ;}; + lgpio21{gpio_config = ;}; + lgpio22{gpio_config = ;}; + lgpio23{gpio_config = ;}; + lgpio24{gpio_config = ;}; + dgpio0{gpio_config = ;}; + dgpio1{gpio_config = ;}; + dgpio2{gpio_config = ;}; + dgpio3{gpio_config = ;}; + dgpio4{gpio_config = ;}; + dgpio5{gpio_config = ;}; + dgpio6{gpio_config = ;}; + dgpio7{gpio_config = ;}; + dgpio8{gpio_config = ;}; + dgpio9{gpio_config = ;}; + dgpio10{gpio_config = ;}; +*/ + + pgpio10{gpio_config = ;}; /* busy led */ + sgpio3{gpio_config = ;}; /* backlight */ + + +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-i2c.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-i2c.dtsi new file mode 100644 index 000000000..d8309d842 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-i2c.dtsi @@ -0,0 +1,12 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +/ { + i2c0: i2c@f0220000 { compatible = "nvt,nvt_i2c"; reg = <0xf0220000 0x100>; interrupts = ; clock-frequency = <400000>; id = <0>; /*gsr = <2>;*/ /* tsr = <1>; */}; + i2c1: i2c2@f0350000 { compatible = "nvt,nvt_i2c"; reg = <0xf0350000 0x100>; interrupts = ; clock-frequency = <400000>; id = <1>; /*gsr = <2>;*/ /* tsr = <1>; */}; + i2c2: i2c3@f03a0000 { compatible = "nvt,nvt_i2c"; reg = <0xf03a0000 0x100>; interrupts = ; clock-frequency = <50000>; id = <2>; /*gsr = <2>;*/ /* tsr = <1>; */}; +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-info.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-info.dtsi new file mode 100755 index 000000000..04d9cf59e --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-info.dtsi @@ -0,0 +1,218 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +/ { + nvt_info { /* Get from ModelConfig.txt */ + BIN_NAME = "FW98565A"; + BIN_NAME_T = "FW98565T"; + RTOS_APP_MAIN = "cardv"; /* Optional, if OS type is Linux, dont care it. */ + /* EMBMEM_BLK_SIZE, Normally, 2KPageNand=0x20000, 512PageNand=0x4000, SPI=0x10000 */ + EMBMEM_BLK_SIZE = "0x10000"; + + /** + * [EMBMEM] + * EMBMEM_NONE + * EMBMEM_NAND + * EMBMEM_SPI_NOR + * EMBMEM_SPI_NAND + * EMBMEM_EMMC + */ + EMBMEM = "EMBMEM_SPI_NOR"; + + /** + * [FW_TYPE] + * FW_TYPE_NORMAL + * FW_TYPE_COMPRESS + * FW_TYPE_PARTIAL + * FW_TYPE_PARTIAL_COMPRESS + * FW_TYPE_LZMA + */ + FW_TYPE = "FW_TYPE_PARTIAL"; + + /** + * [UI_STYLE] + * UI_STYLE_SPORTCAM + */ + UI_STYLE = "UI_STYLE_LVGL"; + + /** + * ======= Linux common ========= + * application/external + */ + NVT_CFG_APP_EXTERNAL = "hostapd wireless_tool iperf-3 wpa_supplicant dhd_priv"; + /* application include list */ + NVT_CFG_APP = "mem cardv memcpy isp_demon sf_app"; + /* rootfs etc folder */ + NVT_ROOTFS_ETC = ""; + /* strip executable binary and library files: yes/no */ + NVT_BINARY_FILE_STRIP = "yes"; + /* Using customized kernel config */ + NVT_CFG_KERNEL_CFG = "na51089_evb_cardv_defconfig_release"; + /* run script befor making rootfs for 'make post' */ + NVT_MAKE_POST = "make_post.sh"; + /* disable make install on sample, hdal/samples, hdal/test_cases */ + NVT_SAMPLES_INSTALL = "DISABLE"; + /* Using customized uboot config */ + NVT_CFG_UBOOT_CFG = ""; + + /** + * ======= Linux for different code setting ========= + * [NVT_LINUX_SMP] + * NVT_LINUX_SMP_ON + * NVT_LINUX_SMP_OFF + */ + NVT_LINUX_SMP = "NVT_LINUX_SMP_OFF"; + + /** + * [NVT_CHIP_ID] + * CHIP_NA51055 + * CHIP_NA51084 + * CHIP_NA51089 + */ + NVT_CHIP_ID = "CHIP_NA51089"; + + /** + * [NVT_LINUX_COMPRESS] + * NVT_LINUX_COMPRESS_AUTO , by linux config + * NVT_LINUX_COMPRESS_GZ + * NVT_LINUX_COMPRESS_NONE + */ + NVT_LINUX_COMPRESS = "NVT_LINUX_COMPRESS_GZ"; + + /** + * [NVT_DEFAULT_NETWORK_BOOT_PROTOCOL] + * NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_SERVER + * NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_CLIENT + * NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_STATIC_IP + */ + NVT_DEFAULT_NETWORK_BOOT_PROTOCOL = "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_STATIC_IP"; + + /** + * [NVT_ROOTFS_TYPE] + * NVT_ROOTFS_TYPE_NAND_UBI + * NVT_ROOTFS_TYPE_SQUASH + * NVT_ROOTFS_TYPE_NAND_JFFS2 + * NVT_ROOTFS_TYPE_NOR_JFFS2 + * NVT_ROOTFS_TYPE_RAMDISK + * NVT_ROOTFS_TYPE_EXT4 + */ + NVT_ROOTFS_TYPE = "NVT_ROOTFS_TYPE_RAMDISK"; + /** + * [LCD1] + * disp_if8b_lcd1_wm08001_sn75lvds83b + * disp_if8b_lcd1_aucn01 + * disp_if8b_lcd1_psd200_st7789v + * disp_if8b_lcd1_pw35p00 + * disp_if8b_lcd1_psd300_ili8961 + * disp_ifdsi_lcd1_gc9503v_st7701s + */ + LCD1 = "disp_if8b_lcd1_psd200_st7789v"; + + /** + * [SENSOR] + * sen_off + * sen_ar0237ir + * sen_os02k10 + * sen_ov2715 + * sen_ar0237 + * sen_imx290 + * sen_os05a10 + * sen_gc5603 + */ + SENSOR1 = "sen_os05b10"; + SENSOR1_CFG = "sen_os05b10_565"; + SENSOR2 = "sen_off"; + SENSOR2_CFG = "sen_off"; + /** + * [NVT_ROOTFS_RW_PART_EN] + * NVT_ROOTFS_RW_PART_EN_OFF + * NVT_ROOTFS_RW_PART_EN_ON + */ + NVT_ROOTFS_RW_PART_EN = "NVT_ROOTFS_RW_PART_EN_ON"; + + /** + * [NVT_ETHERNET] + * NVT_ETHERNET_NONE + * NVT_ETHERNET_EQOS + */ + NVT_ETHERNET = "NVT_ETHERNET_NONE"; + + /** + * [NVT_SDIO_WIFI]: Remember to update root-fs/rootfs/etc/init.d/S05_Net + * NVT_SDIO_WIFI_NONE + * NVT_SDIO_WIFI_RTK + * NVT_SDIO_WIFI_BRCM + * NVT_SDIO_WIFI_NVT + */ + NVT_SDIO_WIFI = "NVT_SDIO_WIFI_RTK"; + + /** + * [NVT_USB_WIFI] + * NVT_USB_WIFI_NONE + */ + NVT_USB_WIFI = "NVT_USB_WIFI_NONE"; + + /** + * [NVT_USB_4G] + * NVT_USB_4G_NONE + */ + NVT_USB_4G = "NVT_USB_4G_NONE"; + + /** + * [WIFI_RTK_MDL] : sub item for NVT_SDIO_WIFI_RTK + * WIFI_RTK_MDL_NONE + * WIFI_RTK_MDL_8189 + */ + WIFI_RTK_MDL = "WIFI_RTK_MDL_8189"; + + /** + * [WIFI_BRCM_MDL] : sub item for NVT_SDIO_WIFI_BRCM + * WIFI_BRCM_MDL_43438a1_ampk6212axtal26 + * WIFI_BRCM_MDL_43455c0_ampk6255c0 + * WIFI_BRCM_MDL_43456c5_ampk6256c5 + */ + WIFI_BRCM_MDL = "WIFI_BRCM_MDL_43456c5_ampk6256c5"; + + /** + * [WIFI_NVT_MDL] : sub item for NVT_SDIO_WIFI_NVT + * WIFI_NVT_MDL_18202 + * WIFI_NVT_MDL_18211 + */ + WIFI_NVT_MDL = "WIFI_NVT_MDL_18211"; + + /** + * [NVT_CURL_SSL] + * NVT_CURL_SSL_OPENSSL + * NVT_CURL_SSL_WOLFSSL + */ + NVT_CURL_SSL = "NVT_CURL_SSL_OPENSSL"; + + /** + * [NVT_UBOOT_ENV_IN_STORG_SUPPORT] + * NVT_UBOOT_ENV_IN_STORG_SUPPORT_NAND + * NVT_UBOOT_ENV_IN_STORG_SUPPORT_NOR + * NVT_UBOOT_ENV_IN_STORG_SUPPORT_MMC + * NVT_UBOOT_ENV_IN_STORG_SUPPORT_OFF + */ + NVT_UBOOT_ENV_IN_STORG_SUPPORT = "NVT_UBOOT_ENV_IN_STORG_SUPPORT_OFF"; + + /** + * [TOUCH] + * TOUCH_OFF + * TOUCH_ON + */ + TOUCH = "TOUCH_OFF"; + + /** + * [UBOOT_ONLY_LOAD_LINUX] + * UBOOT_ONLY_LOAD_LINUX_OFF + * UBOOT_ONLY_LOAD_LINUX_ON + */ + UBOOT_ONLY_LOAD_LINUX = "UBOOT_ONLY_LOAD_LINUX_ON"; + + }; +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-media.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-media.dtsi new file mode 100755 index 000000000..0ab2333b9 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-media.dtsi @@ -0,0 +1,96 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + + +#include +#include "nvt-basic.dtsi" + +/ { + nvtmpp { + compatible = "nvt,nvtmpp"; + }; + + isf_stream { + compatible = "nvt,isf_stream"; + }; + + isf_flow { + compatible = "nvt,isf_flow"; + }; + + isf_vdocap { + compatible = "nvt,isf_vdocap"; + }; + + isf_vdoprc { + compatible = "nvt,isf_vdoprc"; + }; + + isf_dummy { + compatible = "nvt,isf_dummy"; + }; + + isf_vdoenc { + compatible = "nvt,isf_vdoenc"; + }; + + isf_vdodec { + compatible = "nvt,isf_vdodec"; + }; + + isf_vdoout { + compatible = "nvt,isf_vdoout"; + }; + + dispobj { + compatible = "nvt,nvt_dispobj"; + }; + + dispdev { + compatible = "nvt,nvt_dispdev"; + }; + + audio { + compatible = "nvt,nvt_audio"; + }; + + msdcnvt { + compatible = "nvt,msdcnvt"; + }; + + msdcnvt_adj { + compatible = "nvt,msdcnvt_adj"; + }; + + msdcnvt_custom_si { + compatible = "nvt,msdcnvt_custom_si"; + }; + + wavstudio { + compatible = "nvt,wavstudio"; + }; + + isf_audenc { + compatible = "nvt,isf_audenc"; + }; + + isf_auddec { + compatible = "nvt,isf_auddec"; + }; + + isf_audcap { + compatible = "nvt,isf_audcap"; + }; + + isf_audout { + compatible = "nvt,isf_audout"; + }; + + nvt_ipc { + compatible = "nvt,nvt_ipc"; + }; +}; \ No newline at end of file diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-mem-tbl.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-mem-tbl.dtsi new file mode 100755 index 000000000..de90ea350 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-mem-tbl.dtsi @@ -0,0 +1,69 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ +/ { + /* Uboot/loader memory layout */ + nvt_memory_cfg { + #address-cells = <1>; + #size-cells = <1>; + dram { reg = <0x00000000 0x08000000>; }; + shmem{ reg = <0x00007E00 0x00000200>; }; /* always exists */ + loader { reg = <0x01000000 0x00080000>; }; /* recycled after uboot started */ + fdt { reg = <0x01800000 0x00040000>; }; /* recycled after linux started */ + rtos { reg = <0x01840000 0x00FC0000>; }; /* recycled after linux started */ + linuxtmp{ reg = <0x02800000 0x04000000>; }; /* recycled after rtos started */ + uboot{ reg = <0x06800000 0x01640000>; }; /* recycled after rtos started */ + logo-fb{ reg = <0x07E40000 0x001C0000>; }; /* recycled after rtos started */ + }; + + /* Linux system memory region*/ + memory { device_type = "memory"; reg = <0x00000000 0x01800000 0x02000000 0x01600000>; }; + + /* Linux setup reserved memory */ + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + + /* + * rtos libc heap expected minimum size + * becasue remain of rtos memory will be the libc heap automatically, + * if it too small against your expectation, there will be a assert on boot. + */ + libc-heap { size = <0x00200000>; }; + + hdal-memory { + #address-cells = <1>; + #size-cells = <1>; + media { reg = <0x03700000 0x04900000>; }; + }; + + hdal-maxpath-cfg { + /* First is for VCAP0, second for VCAP1 and so on.*/ + vdocap_active_list = <1 0 0 0 0 0 0 0>; + vdoprc_maxdevice = <2>; + vdoenc_maxpath = <4>; + vdodec_maxpath = <3>; + vdoout_maxdevice = <1>; + adocap_maxdevice = <1>; + adoout_maxdevice = <2>; + adoenc_maxpath = <1>; + adodec_maxpath = <1>; + /* gfx jog list */ + gfx_maxjob = <2>; + /* stamp max img buffer number */ + stamp_maximg = <9>; + /* First is internal stamp number, second is external stamp number */ + vdoprc_maxstamp = <4 4>; + /* First is internal mask number, second is external mask number */ + vdoprc_maxmask = <4 4>; + vdoenc_maxstamp = <9 9>; + vdoenc_maxmask = <0 64>; + vdoout_maxstamp = <0 16>; + vdoout_maxmask = <0 64>; + }; +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-nvtpack.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-nvtpack.dtsi new file mode 100755 index 000000000..2897a2a39 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-nvtpack.dtsi @@ -0,0 +1,31 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +&nor { + /** + * partition_name is $1 as in partition_$1 is referred + * to nvt-na51089-storage-partition. dtsi + */ + nvtpack { + ver = "NVTPACK_FW_INI_16072017"; /* Fixed */ + method = <1>; /* Fixed */ + index { + id0 { partition_name = "loader"; source_file = ""; }; /* Fixed */ + id1 { partition_name = "fdt"; source_file = "nvt-evb.bin"; }; /* Fixed */ + id2 { partition_name = "fdt.restore"; source_file = ""; }; /* Fixed */ + id3 { partition_name = "fdt.app"; source_file = "../rtos/output/application.bin"; }; + id4 { partition_name = "uboot"; source_file = "u-boot.bin"; }; + id5 { partition_name = "uenv"; source_file = ""; }; + id6 { partition_name = "kernel"; source_file = "uImage.bin"; }; + id7 { partition_name = "rootfs"; source_file = "rootfs.ramdisk.bin"; }; + id8 { partition_name = "rootfs1"; source_file = "rootfs_1.squash.bin"; }; + id9 { partition_name = "rtos"; source_file = "../rtos/output/rtos-main.bin"; }; + id10 { partition_name = "app"; source_file = "appfs.cardv.jffs2.nor.bin"; }; + id11 { partition_name = "sys"; source_file = ""; }; + }; + }; +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri-dev.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri-dev.dtsi new file mode 100755 index 000000000..15e9beede --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri-dev.dtsi @@ -0,0 +1,52 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + + +#include + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + +/* dummy_i2c_dev: dummy_i2c@1a { + compatible = "nvt,dummy_i2c_dev"; + reg = <0x1a>; + }; +*/ +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; +}; + +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; +}; + +&spi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + +/* dummy_spi_dev: dummy_spi_dev@0 { + compatible = "dummy_spi_dev.0"; + reg = <0>; // Chip select 0 + spi-max-frequency = <1000000>; + spi-cpol; + }; +*/ +}; + +&spi1 { + status = "okay"; +}; + +&spi2 { + status = "okay"; +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri.dtsi new file mode 100755 index 000000000..7f0143b1d --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri.dtsi @@ -0,0 +1,514 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + + +#include +#include "nvt-basic.dtsi" + +/ { + chosen { + bootargs = " "; + }; + + aliases { + mmc0 = &mmc0; /* Fixed to mmcblk0 for sdio1 */ + mmc1 = &mmc1; /* Fixed to mmcblk1 for sdio2 */ + }; + + uart@f0290000 { + compatible = "ns16550a"; + reg = <0xf0290000 0x1000>; + interrupts = ; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <24000000>; + fifo-size = <64>; + uart_id = <0>; + }; + + uart@f0300000 { + compatible = "ns16550a"; + reg = <0xf0300000 0x1000>; + interrupts = ; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <48000000>; + fifo-size = <64>; + hw_flowctrl = <0>; + rx_trig_level = <3>; + uart_id = <1>; + }; + + uart@f0310000 { + compatible = "ns16550a"; + reg = <0xf0310000 0x1000>; + interrupts = ; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <48000000>; + fifo-size = <64>; + hw_flowctrl = <0>; + rx_trig_level = <3>; + uart_id = <2>; + }; + + kdrv_rpc: cc@f0090000 { + compatible = "kdrv_rpc"; + reg = <0xf0090000 0x300>; + interrupts = ; + }; + + mmc0: mmc@f0420000 { + compatible = "nvt,nvt_mmc"; + reg = <0xf0420000 0x1000>; + interrupts = ; + max-frequency = <48000000>; + voltage-switch = <0>; + max-voltage = <3300>; + bus-width = <4>; + neg-sample-edge = <0>; + driving = <15 15 15 20 15 15 25 25 25 25 25 25>; + cd_gpio = ; + card_power_gpio = ; + /*ro_gpio = ;*/ + /*power_en = ;*/ + }; + + mmc1: mmc@f0500000 { + compatible = "nvt,nvt_mmc2"; + reg = <0xf0500000 0x1000>; + interrupts = ; + max-frequency = <48000000>; + voltage-switch = <0>; + max-voltage = <3300>; + bus-width = <4>; + neg-sample-edge = <0>; + driving = <15 8 8 20 8 8 20 8 8 20 8 8>; + cd_gpio = <0 GPIO_FALLING_EDGE GPIO_INTERRUPT>; + /*ro_gpio = ;*/ + /*power_en = ;*/ + /*status = "disabled";*/ + }; + + nand: nand@f0400000 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "nvt,nvt_spinand"; + reg = <0xf0400000 0x1000>; + interrupts = ; + clock-frequency = <96000000>; + nvt-devname = "spi_nand.0"; + }; + + nor: nor@f0400000 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "nvt,nvt_spinor"; + reg = <0xf0400000 0x1000>; + interrupts = ; + clock-frequency = <120000000>; + nvt-devname = "spi_nor.0"; + trace-stdtable = <0>; + }; + + gpio: gpio@f0070000 { + compatible = "nvt,nvt_gpio"; + reg = <0xf0070000 0x10000>; + interrupts = ; + #gpio-cells = <2>; + }; + + eth@f02b0000 { + compatible = "nvt,synopsys_eth"; + reg = <0xf02b0000 0x3800>; + interrupts = ; + sp-clk = <0>; + ref-clk-out = <0>; + }; + + phy@f02b3800 { + compatible = "nvt,eth_phy"; + reg = <0xf02b3800 0x400>; + }; + + wdt@f0050000 { + compatible = "nvt,nvt_wdt"; + reg = <0xf0050000 0x10000>; + interrupts = ; + }; + + pwm: pwm@f0210000 { + compatible = "nvt,nvt_kdrv_pwm"; + reg = <0xf0210000 0x2000>; + interrupts = ; + }; + + adc@f0260000 { + compatible = "nvt,nvt_adc"; + reg = <0xf0260000 0x1000>; + interrupts = ; + #io-channel-cells = <1>; + }; + + rtc@f0060000 { + compatible = "nvt,nvt_rtc"; + reg = <0xf0060000 0x100>; + interrupts = ; + }; + + drtc@f00b0000 { + compatible = "nvt,nvt_drtc"; + reg = <0xf00b0000 0x100>; + }; + + crypto: crypto@f0620000 { + compatible = "nvt,nvt_crypto"; + reg = <0xf0620000 0x100>; + interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; + mclk = <1>; + }; + + hash: hash@f0670000 { + compatible = "nvt,nvt_hash"; + reg = <0xf0670000 0x100>; + interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; + mclk = <1>; + }; + + rsa: rsa@f06a0000 { + compatible = "nvt,nvt_rsa"; + reg = <0xf06a0000 0x100>; + interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; + mclk = <1>; + }; + + top: top@f0010000 { + compatible = "nvt,nvt_top"; + reg = <0xf0010000 0x2000 + 0xf0030000 0x2000 + 0xf0070000 0x10000>; + }; + + sie@f0c00000 { + compatible = "nvt,drv_sie"; + reg = <0xf0c00000 0x900 + 0xf0d20000 0x900 + 0xF0D30000 0x900>; + interrupts = ; + /*sensor_freq = <37125000>;*/ + }; + + tge@f0cc0000 { + compatible = "nvt,kdrv_tge"; + reg = <0xf0cc0000 0x150>; + interrupts = ; + }; + + rhe@f0ce0000 { + compatible = "nvt,kdrv_rhe"; + reg = <0xf0ce0000 0x900>; + interrupts = ; + }; + + ime@f0c40000 { + compatible = "nvt,kdrv_ime"; + reg = <0xf0c40000 0x1000>; + interrupts = ; + }; + + ife2@f0d00000 { + compatible = "nvt,kdrv_ife2"; + reg = <0xf0d00000 0x100>; + interrupts = ; + }; + + ise@f0c90000 { + compatible = "nvt,kdrv_ise"; + reg = <0xf0c90000 0x100>; + interrupts = ; + }; + + ipe@f0c30000 { + compatible = "nvt,kdrv_ipe"; + reg = <0xf0c30000 0x900>; + interrupts = ; + }; + + ife@f0c70000 { + compatible = "nvt,kdrv_ife"; + reg = <0xf0c70000 0x800>; + interrupts = ; + }; + + vpe@f0cd0000 { + compatible = "nvt,kdrv_vpe"; + reg = <0xf0cd0000 0x1040>; + interrupts = ; + }; + + ai@f0c60000 { + compatible = "nvt,kdrv_ai"; + reg = <0xf0c60000 0x23c + 0xf0d50000 0x114 + 0xf0cb0000 0x22c>; + interrupts = ; + clock-frequency = <600000000 480000000 600000000>; + }; + + md@f0c10000 { + compatible = "nvt,kdrv_md"; + reg = <0xf0c10000 0x150>; + interrupts = ; + clock-frequency = <240000000>; + }; + dis@f0c50000 { + compatible = "nvt,kdrv_dis"; + reg = <0xf0c50000 0x114>; + interrupts = ; + }; + + coe@f0a11000 { + compatible = "nvt,nvt_coe"; + reg = <0xf0a11000 0x2c0>; + }; + + dce@f0c20000 { + compatible = "nvt,kdrv_dce"; + reg = <0xf0c20000 0x650>; + interrupts = ; + }; + + ive@f0d70000 { + compatible = "nvt,kdrv_ive"; + reg = <0xf0d70000 0x6c>; + interrupts = ; + }; + + sde@f0d90000 { + compatible = "nvt,kdrv_sde"; + reg = <0xf0d90000 0x90>; + interrupts = ; + }; + + ide@f0800000 { + compatible = "nvt,nvt_ide"; + reg = <0xf0800000 0x1000>; + interrupts = ; + }; + + dsi@f0840000 { + compatible = "nvt,nvt_dsi"; + reg = <0xf0840000 0x1000>; + interrupts = ; + }; + + csi@f0280000 { + compatible = "nvt,nvt_csi"; + reg = <0xf0280000 0x100 + 0xf0330000 0x100>; + interrupts = ; + }; + + lvds@f0270000 { + compatible = "nvt,nvt_lvds"; + reg = <0xF0270000 0x200 + 0xF0370000 0x200>; + interrupts = ; + }; + + senphy@f06b0000 { + compatible = "nvt,nvt_senphy"; + reg = <0xF06B0000 0x100>; + }; + + ssenif@f0xx0000 { + compatible = "nvt,nvt_ssenif"; + reg = <0xF02C0000 0x2000>; + interrupts = ; + }; + + sif@f0240000 { + compatible = "nvt,nvt_sif"; + reg = <0xf0240000 0x200>; + interrupts = ; + clock-frequency = <1000000>; + }; + + graphic@f0c80000 { + compatible = "nvt,nvt_graphic"; + reg = <0xF0C80000 0x300 + 0xF0D10000 0x100>; + interrupts = ; + }; + + affine@f0ca0000 { + compatible = "nvt,nvt_affine"; + reg = <0xF0CA0000 0x100>; + interrupts = ; + }; + + h26x@f0a10000 { + compatible = "nvt,nvt_h26x"; + reg = <0xf0a10000 0xa00>; + interrupts = ; + power_saving = <0>; /* 0:using pllf320, 1:using fix96m */ + }; + + timer@f0040000 { + compatible = "nvt,nvt_timer"; + reg = <0xf0040000 0x300>; + interrupts = ; + }; + + eac@f0640000 { + compatible = "nvt,nvt_eac"; + reg = <0xF0640000 0x200>; + }; + + jpg@f0a00000 { + compatible = "nvt,nvt_jpg"; + reg = <0xf0a00000 0x100>; + interrupts = ; + }; + + nvt_usb2host@f0600000 { + compatible = "nvt,ehci-nvtivot"; + reg = <0xf0600000 0x10000>; + interrupts = ; + }; + + nvt_usb2dev@f0600000 { + compatible = "nvt,fotg200_udc"; + reg = <0xf0600000 0x10000>; + interrupts = ; + }; + + nvt_usb_chrg@f0600000 { + compatible = "nvt,nvt_usb_chrgdet"; + reg = <0xf0600000 0x10000>; + }; + + dai@f0630000 { + compatible = "nvt,nvt_dai"; + reg = <0xF0630000 0xbc>; + interrupts = ; + }; + + rotate@f0cf0000 { + compatible = "nvt,nvt_rotation"; + reg = <0xF0CF0000 0x100>; + interrupts = ; + }; + + drvdump@0 { + compatible = "nvt,nvt_drvdump"; + }; + + dsp@f1430000 { + compatible = "nvt,nvt_dsp"; + reg = <0xF1430000 0x200 + 0xF2000000 0x1000000 + 0xF1440000 0x200 + 0xF3000000 0x1000000>; + interrupts = ; + }; + + spi0: spi@f0230000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0230000 0x10000>; + interrupts = ; + dma-support = <0>; + nvt-devname = <0>; + }; + + spi1: spi@f0320000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0320000 0x10000>; + interrupts = ; + dma-support = <0>; + nvt-devname = <1>; + }; + + spi2: spi@f0340000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0340000 0x10000>; + interrupts = ; + dma-support = <0>; + nvt-devname = <2>; + }; + + sdp@f0390000 { + compatible = "nvt,nvt_sdp"; + reg = <0xf0390000 0x28>; + interrupts = ; + }; + + tse@f0650000 { + compatible = "nvt,nvt_tse"; + reg = <0xF0650000 0x90>; + interrupts = ; + }; + + remote@f0250000 { + compatible = "nvt,nvt_remote"; + reg = <0xf0250000 0x28>; + interrupts = ; + }; + + rng: rng@f0680000 { + compatible = "nvt,nvt_rng"; + reg = <0xf0680000 0x100>; + }; + + nvt_arb@f0000000 { + compatible = "nvt,nvt_arb"; + reg = <0xF0000000 0xA000 + 0xF0FE0000 0x300>; + interrupts = ; + }; + + nvt_otp@f0660000 { + compatible = "nvt,nvt_otp"; + reg = <0xF0660000 0x70>; + }; + + kdrv_ipp { + clock-frequency = <240000000>; + }; + + uvcp: uvcp@f0690000 { + compatible = "nvt,nvt_uvcp"; + reg = <0xf0690000 0x200>; + interrupts = ; + }; + pll_preset@0 { + pll3{pll_config = <3 0 0>;}; + pll4{pll_config = <4 0 0>;}; + pll5{pll_config = <5 297000000 1>;}; + pll6{pll_config = <6 0 0>;}; + pll7{pll_config = <7 0 0>;}; + pll8{pll_config = <8 0 0>;}; + pll9{pll_config = <9 0 0>;}; + pll11{pll_config = <11 0 0>;}; + pll12{pll_config = <12 0 1>;}; + }; +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-storage-partition.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-storage-partition.dtsi new file mode 100755 index 000000000..ada64aaf1 --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-storage-partition.dtsi @@ -0,0 +1,22 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +&nor { + partition_loader { label = "loader"; reg = <0x0 0x0000000 0x0 0x10000>; }; /* Fixed */ + partition_fdt { label = "fdt"; reg = <0x0 0x10000 0x0 0x10000>; }; /* Fixed */ + partition_fdt.restore { label = "fdt.restore"; reg = <0x0 0x20000 0x0 0x10000>; }; /* Fixed */ + partition_fdt.app { label = "fdt.app"; reg = <0x0 0x30000 0x0 0x20000>; }; /* Fixed */ + partition_uboot { label = "uboot"; reg = <0x0 0x50000 0x0 0xA0000>; }; + partition_uenv { label = "uenv"; reg = <0x0 0xF0000 0x0 0x10000>; }; + partition_kernel { label = "kernel"; reg = <0x0 0x100000 0x0 0x290000>; }; + partition_rootfs { label = "rootfs"; reg = <0x0 0x390000 0x0 0x3E0000>; }; + partition_rootfs1 { label = "rootfs1"; reg = <0x0 0x770000 0x0 0xB00000>; }; + partition_rtos { label = "rtos"; reg = <0x0 0x1270000 0x0 0x930000>; }; + partition_app { label = "app"; reg = <0x0 0x1BA0000 0x0 0x50000>; }; /* app size depneds on hdal/samples/vendor_cfg/Makeile: ROOTFS_UBI_MAX_LEB_COUNT */ + partition_sys { label = "sys"; reg = <0x0 0x1D10000 0x0 0x10000>; }; + partition_all { label = "all"; reg = <0x0 0x0000000 0x0 0x2000000>; }; +}; diff --git a/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-top.dtsi b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-top.dtsi new file mode 100755 index 000000000..4ebb5396e --- /dev/null +++ b/configs/Linux/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-top.dtsi @@ -0,0 +1,24 @@ +&top { + sdio{pinmux = <0x5>;}; + sdio2{pinmux = <0x5>;}; + sdio3{pinmux = <0x0>;}; + nand{pinmux = <0x5>;}; + sensor{pinmux = <0x0>;}; + sensor2{pinmux = <0x0>;}; + mipi_lvds{pinmux = <0x0>;}; + i2c{pinmux = <0x40>;}; + sif{pinmux = <0x0>;}; + uart{pinmux = <0x1825>;}; + spi{pinmux = <0x0>;}; + sdp{pinmux = <0x0>;}; + remote{pinmux = <0x0>;}; + pwm{pinmux = <0x8000>;}; /* pwm3: 0x8000 p_gp3 IRLED */ + /* pwm2{pinmux = <0x2000000>;}; pwm11: 0x2000000 p_gp11 backlight */ + pwm2{pinmux = <0x0000000>;}; + ccnt{pinmux = <0x0>;}; + audio{pinmux = <0x0>;}; + lcd{pinmux = <0x10000000>;}; + tv{pinmux = <0x0>;}; + eth{pinmux = <0x0>;}; + misc{pinmux = <0x0>;}; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-audio.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-audio.dtsi new file mode 100755 index 000000000..69bcc382d --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-audio.dtsi @@ -0,0 +1,12 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +/ { + audio@1 { type = "none"; i2s_ctrl = <0>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; }; + audio@2 { type = "embedded"; i2s_ctrl = <4>; sif_channel = <0>; gpio_cold_reset = <0>; gpio_data = <0>; gpio_clk = <0>; gpio_cs = <0>; adc_zero = <0>; }; +}; + diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-basic.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-basic.dtsi new file mode 100755 index 000000000..4e6d21c6d --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-basic.dtsi @@ -0,0 +1,86 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +#include +#include + +/ { + model = "Novatek NA51089"; + compatible = "novatek,na51089", "nvt,ca9"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x0>; + next-level-cache = <&L2>; + clock-frequency = <960000000>; + }; + }; + + cg@f0020000 { + compatible = "nvt,core_clk"; + reg = <0xf0020000 0x1000>; + }; + + /* binding to clk framework driver */ + periph_clk: periph_clk { + compatible = "nvt,periph_clk"; + #clock-cells = <0>; + clock-output-names = "periph_clk"; + }; + + global_timer@ffd00200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xffd00200 0x20>; + interrupts = ; + clocks = <&periph_clk>; + }; + + private_timer@ffd00600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xffd00600 0x20>; + interrupts = ; + clocks = <&periph_clk>; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>; + }; + + L2: cache-controller@ffe00000 { + compatible = "arm,pl310-cache"; + reg = <0xffe00000 0x1000>; + interrupts = ; + cache-unified; + arm,shared-override; + cache-level = <2>; + arm,data-latency = <2 2 2>; + arm,tag-latency = <2 2 2>; + }; + + gic: interrupt-controller@0xffd00000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0xffd01000 0x1000>, /* GIC Dist */ + <0xffd00100 0x1000>; /* GIC CPU */ + }; + + scu: snoop-control-unit@0xffd00000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xffd00000 0x100>; + }; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-display.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-display.dtsi new file mode 100755 index 000000000..e4515fd12 --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-display.dtsi @@ -0,0 +1,29 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ +#include +#include + + /* PWM on uboot (nvt_fr_pwm.c) */ + /* "Note:\n" + * "Defalut freq is 250KHz,\n" + * "therefore each unit of [period_ns] and [duty_ns] should be 4000 ns,\n" + * "for channel 0 to 7 the maximum unit is 65535, so legal range of [period_ns] is 8000 to 262140000 ns,\n" + * "for other channels the maximum unit is 255, so legal range of [period_ns] is 8000 to 1020000 ns.\n" + */ +/* lcd_bl_gpio = ; ==> if the controlled method is GPIO of lcd backlight */ +/* lcd_bl2_gpio = ; ==> optional for the circuit design */ +/* lcd_bl_pwm = ; ==> if the controlled method is PWM of lcd backlight*/ +/* lcd_rotate = <0>; ==> 0:rotate 90; 1:rotate 90; 270:rotate 270*/ +/* lcd_enable = ; ==> optional for the circuit design*/ +/* lcd_power = ; ==> optional for the circuit design*/ +/* lcd_standby = ; ==> optional for the circuit design*/ + +/ { + display { type = "lcd"; lcd_ctrl = <1>; sif_channel = <4>; gpio_cs = ; gpio_clk = ; gpio_data = ; }; + logo { enable = <0>; lcd_type = ; lcd_rotate = <270>; lcd_reset = ; lcd_bl_gpio = ; lcd_power = ;}; +}; + diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-evb.dts b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-evb.dts new file mode 100755 index 000000000..dfdd8c5fa --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-evb.dts @@ -0,0 +1,21 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +/dts-v1/; +#include +#include "nvt-peri.dtsi" /* engine register definition */ +#include "nvt-top.dtsi" /* pinmux, made from tool */ +#include "nvt-i2c.dtsi" /* i2c */ +#include "nvt-gpio.dtsi" /* gpio, made from tool */ +#include "nvt-peri-dev.dtsi"/* peripheral device dts config */ +#include "nvt-audio.dtsi" /* peripheral: audio */ +#include "nvt-display.dtsi" /* peripheral: display */ +#include "nvt-media.dtsi" /* ko files relation */ +#include "nvt-mem-tbl.dtsi" /* memory partition */ +#include "nvt-storage-partition.dtsi" /* flash partition */ +#include "nvt-info.dtsi" /* used for turnkey information */ +#include "nvt-nvtpack.dtsi" /* used for turnkey to make all-in-one bin */ diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-gpio.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-gpio.dtsi new file mode 100755 index 000000000..72bae530e --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-gpio.dtsi @@ -0,0 +1,205 @@ +&top { +/* + cgpio0{pad_config = <0x0 0x1 0x0 0x2>;}; + cgpio1{pad_config = <0x2 0x1 0x2 0x2>;}; + cgpio2{pad_config = <0x4 0x1 0x4 0x2>;}; + cgpio3{pad_config = <0x6 0x1 0x6 0x2>;}; + cgpio4{pad_config = <0x8 0x1 0x8 0x2>;}; + cgpio5{pad_config = <0xA 0x1 0xA 0x2>;}; + cgpio6{pad_config = <0xC 0x1 0xC 0x2>;}; + cgpio7{pad_config = <0xE 0x1 0xE 0x2>;}; + cgpio8{pad_config = <0x10000010 0x10 0x10 0x1>;}; + cgpio9{pad_config = <0x12 0x1 0x12 0x2>;}; + cgpio10{pad_config = <0x14 0x1 0x14 0x2>;}; + cgpio11{pad_config = <0x80000000 0x202 0x16 0x1>;}; + cgpio12{pad_config = <0x80000004 0x100 0x18 0x2>;}; + cgpio13{pad_config = <0x80000008 0x100 0x1A 0x2>;}; + cgpio14{pad_config = <0x8000000C 0x100 0x1C 0x2>;}; + cgpio15{pad_config = <0x80000010 0x100 0x1E 0x2>;}; + cgpio16{pad_config = <0x80000014 0x100 0x20 0x2>;}; + cgpio17{pad_config = <0x80000018 0x202 0x22 0x1>;}; + cgpio18{pad_config = <0x10000024 0x10 0x24 0x2>;}; + cgpio19{pad_config = <0x10000026 0x10 0x26 0x2>;}; + cgpio20{pad_config = <0x10000028 0x10 0x28 0x2>;}; + cgpio21{pad_config = <0x1000002A 0x10 0x2A 0x2>;}; + cgpio22{pad_config = <0x1000002C 0x10 0x2C 0x2>;}; + sgpio0{pad_config = <0x10000060 0x10 0x60 0x1>;}; + sgpio1{pad_config = <0x10000062 0x10 0x62 0x1>;}; + sgpio2{pad_config = <0x64 0x1 0x64 0x1>;}; + sgpio3{pad_config = <0x66 0x1 0x66 0x1>;}; + sgpio4{pad_config = <0x68 0x1 0x68 0x1>;}; + sgpio5{pad_config = <0x1000006A 0x10 0x6A 0x1>;}; + sgpio6{pad_config = <0x6C 0x1 0x6C 0x2>;}; + sgpio7{pad_config = <0x6E 0x1 0x6E 0x2>;}; + sgpio8{pad_config = <0x70 0x1 0x70 0x2>;}; + sgpio9{pad_config = <0x72 0x1 0x72 0x2>;}; + sgpio10{pad_config = <0x74 0x1 0x74 0x2>;}; + sgpio11{pad_config = <0x76 0x1 0x76 0x2>;}; + sgpio12{pad_config = <0x78 0x1 0x78 0x1>;}; + pgpio0{pad_config = <0x80 0x1 0x80 0x0>;}; + pgpio1{pad_config = <0x82 0x1 0x82 0x1>;}; + pgpio2{pad_config = <0x84 0x1 0x84 0x1>;}; + pgpio3{pad_config = <0x86 0x1 0x86 0x1>;}; + pgpio4{pad_config = <0x88 0x1 0x88 0x1>;}; + pgpio5{pad_config = <0x8A 0x1 0x8A 0x1>;}; + pgpio6{pad_config = <0x8C 0x1 0x8C 0x1>;}; + pgpio7{pad_config = <0x8E 0x1 0x8E 0x1>;}; + pgpio8{pad_config = <0x10000090 0x10 0x90 0x1>;}; + pgpio9{pad_config = <0x92 0x1 0x92 0x1>;}; + pgpio10{pad_config = <0x94 0x1 0x94 0x1>;}; + pgpio11{pad_config = <0x96 0x1 0x96 0x1>;}; + pgpio12{pad_config = <0x98 0x1 0x98 0x2>;}; + pgpio13{pad_config = <0x9A 0x1 0x9A 0x2>;}; + pgpio14{pad_config = <0x9C 0x1 0x9C 0x2>;}; + pgpio15{pad_config = <0x9E 0x1 0x9E 0x2>;}; + pgpio16{pad_config = <0xA0 0x1 0xA0 0x2>;}; + pgpio17{pad_config = <0xA2 0x1 0xA2 0x2>;}; + pgpio18{pad_config = <0xA4 0x1 0xA4 0x2>;}; + pgpio19{pad_config = <0xA6 0x1 0xA6 0x2>;}; + pgpio20{pad_config = <0xA8 0x1 0xA8 0x1>;}; + pgpio21{pad_config = <0xAA 0x1 0xAA 0x2>;}; + pgpio22{pad_config = <0xAC 0x1 0xAC 0x2>;}; + pgpio23{pad_config = <0xAE 0x1 0xAE 0x2>;}; + pgpio24{pad_config = <0xB0 0x1 0xB0 0x2>;}; + pgpio25{pad_config = <0xB2 0x202 0xB2 0x2>;}; + lgpio0{pad_config = <0xE0 0x1 0xE0 0x1>;}; + lgpio1{pad_config = <0xE2 0x1 0xE2 0x1>;}; + lgpio2{pad_config = <0xE4 0x1 0xE4 0x1>;}; + lgpio3{pad_config = <0xE6 0x1 0xE6 0x1>;}; + lgpio4{pad_config = <0xE8 0x1 0xE8 0x1>;}; + lgpio5{pad_config = <0xEA 0x1 0xEA 0x1>;}; + lgpio6{pad_config = <0xEC 0x1 0xEC 0x1>;}; + lgpio7{pad_config = <0xEE 0x1 0xEE 0x1>;}; + lgpio8{pad_config = <0x100000F0 0x10 0xF0 0x1>;}; + lgpio9{pad_config = <0xF2 0x1 0xF2 0x1>;}; + lgpio10{pad_config = <0xF4 0x1 0xF4 0x1>;}; + lgpio11{pad_config = <0xF6 0x1 0xF6 0x1>;}; + lgpio12{pad_config = <0xF8 0x1 0xF8 0x1>;}; + lgpio13{pad_config = <0xFA 0x1 0xFA 0x1>;}; + lgpio14{pad_config = <0xFC 0x1 0xFC 0x1>;}; + lgpio15{pad_config = <0xFE 0x1 0xFE 0x1>;}; + lgpio16{pad_config = <0x100 0x1 0x100 0x1>;}; + lgpio17{pad_config = <0x102 0x1 0x102 0x1>;}; + lgpio18{pad_config = <0x104 0x1 0x104 0x1>;}; + lgpio19{pad_config = <0x106 0x1 0x106 0x1>;}; + lgpio20{pad_config = <0x108 0x1 0x108 0x1>;}; + lgpio21{pad_config = <0x10A 0x1 0x10A 0x1>;}; + lgpio22{pad_config = <0x10C 0x1 0x10C 0x2>;}; + lgpio23{pad_config = <0x10E 0x1 0x10E 0x1>;}; + lgpio24{pad_config = <0x110 0x1 0x110 0x1>;}; + dgpio0{pad_config = <0x10000120 0x10 0x120 0x2>;}; + dgpio1{pad_config = <0x10000122 0x10 0x122 0x2>;}; + dgpio2{pad_config = <0x10000124 0x10 0x124 0x2>;}; + dgpio3{pad_config = <0x10000126 0x10 0x126 0x1>;}; + dgpio4{pad_config = <0x10000128 0x10 0x128 0x1>;}; + dgpio5{pad_config = <0x1000012A 0x10 0x12A 0x1>;}; + dgpio6{pad_config = <0x1000012C 0x10 0x12C 0x1>;}; + dgpio7{pad_config = <0x12E 0x1 0x12E 0x1>;}; + dgpio8{pad_config = <0x10000130 0x10 0x130 0x1>;}; + dgpio9{pad_config = <0x10000132 0x10 0x132 0x1>;}; + dgpio10{pad_config = <0x10000134 0x10 0x134 0x1>;}; + cgpio0{gpio_config = ;}; + cgpio1{gpio_config = ;}; + cgpio2{gpio_config = ;}; + cgpio3{gpio_config = ;}; + cgpio4{gpio_config = ;}; + cgpio5{gpio_config = ;}; + cgpio6{gpio_config = ;}; + cgpio7{gpio_config = ;}; + cgpio8{gpio_config = ;}; + cgpio9{gpio_config = ;}; + cgpio10{gpio_config = ;}; + cgpio11{gpio_config = ;}; + cgpio12{gpio_config = ;}; + cgpio13{gpio_config = ;}; + cgpio14{gpio_config = ;}; + cgpio15{gpio_config = ;}; + cgpio16{gpio_config = ;}; + cgpio17{gpio_config = ;}; + cgpio18{gpio_config = ;}; + cgpio19{gpio_config = ;}; + cgpio20{gpio_config = ;}; + cgpio21{gpio_config = ;}; + cgpio22{gpio_config = ;}; + sgpio0{gpio_config = ;}; + sgpio1{gpio_config = ;}; + sgpio2{gpio_config = ;}; + sgpio3{gpio_config = ;}; + sgpio4{gpio_config = ;}; + sgpio5{gpio_config = ;}; + sgpio6{gpio_config = ;}; + sgpio7{gpio_config = ;}; + sgpio8{gpio_config = ;}; + sgpio9{gpio_config = ;}; + sgpio10{gpio_config = ;}; + sgpio11{gpio_config = ;}; + sgpio12{gpio_config = ;}; + pgpio0{gpio_config = ;}; + pgpio1{gpio_config = ;}; + pgpio2{gpio_config = ;}; + pgpio3{gpio_config = ;}; + pgpio4{gpio_config = ;}; + pgpio5{gpio_config = ;}; + pgpio6{gpio_config = ;}; + pgpio7{gpio_config = ;}; + pgpio8{gpio_config = ;}; + pgpio9{gpio_config = ;}; + pgpio10{gpio_config = ;}; + pgpio11{gpio_config = ;}; + pgpio12{gpio_config = ;}; + pgpio13{gpio_config = ;}; + pgpio14{gpio_config = ;}; + pgpio15{gpio_config = ;}; + pgpio16{gpio_config = ;}; + pgpio17{gpio_config = ;}; + pgpio18{gpio_config = ;}; + pgpio19{gpio_config = ;}; + pgpio20{gpio_config = ;}; + pgpio21{gpio_config = ;}; + pgpio22{gpio_config = ;}; + pgpio23{gpio_config = ;}; + pgpio24{gpio_config = ;}; + pgpio25{gpio_config = ;}; + lgpio0{gpio_config = ;}; + lgpio1{gpio_config = ;}; + lgpio2{gpio_config = ;}; + lgpio3{gpio_config = ;}; + lgpio4{gpio_config = ;}; + lgpio5{gpio_config = ;}; + lgpio6{gpio_config = ;}; + lgpio7{gpio_config = ;}; + lgpio8{gpio_config = ;}; + lgpio9{gpio_config = ;}; + lgpio10{gpio_config = ;}; + lgpio11{gpio_config = ;}; + lgpio12{gpio_config = ;}; + lgpio13{gpio_config = ;}; + lgpio14{gpio_config = ;}; + lgpio15{gpio_config = ;}; + lgpio16{gpio_config = ;}; + lgpio17{gpio_config = ;}; + lgpio18{gpio_config = ;}; + lgpio19{gpio_config = ;}; + lgpio20{gpio_config = ;}; + lgpio21{gpio_config = ;}; + lgpio22{gpio_config = ;}; + lgpio23{gpio_config = ;}; + lgpio24{gpio_config = ;}; + dgpio0{gpio_config = ;}; + dgpio1{gpio_config = ;}; + dgpio2{gpio_config = ;}; + dgpio3{gpio_config = ;}; + dgpio4{gpio_config = ;}; + dgpio5{gpio_config = ;}; + dgpio6{gpio_config = ;}; + dgpio7{gpio_config = ;}; + dgpio8{gpio_config = ;}; + dgpio9{gpio_config = ;}; + dgpio10{gpio_config = ;}; +*/ + + pgpio10{gpio_config = ;}; /* busy led */ + sgpio3{gpio_config = ;}; /* backlight */ + + +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-i2c.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-i2c.dtsi new file mode 100755 index 000000000..48655ecb2 --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-i2c.dtsi @@ -0,0 +1,12 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +/ { + i2c0: i2c@f0220000 { compatible = "nvt,nvt_i2c"; reg = <0xf0220000 0x100>; interrupts = ; clock-frequency = <400000>; id = <0>; /*gsr = <2>;*/ /* tsr = <1>; */}; + i2c1: i2c2@f0350000 { compatible = "nvt,nvt_i2c"; reg = <0xf0350000 0x100>; interrupts = ; clock-frequency = <400000>; id = <1>; /*gsr = <2>;*/ /* tsr = <1>; */}; + i2c2: i2c3@f03a0000 { compatible = "nvt,nvt_i2c"; reg = <0xf03a0000 0x100>; interrupts = ; clock-frequency = <400000>; id = <2>; /*gsr = <2>;*/ /* tsr = <1>; */}; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-info.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-info.dtsi new file mode 100755 index 000000000..093691825 --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-info.dtsi @@ -0,0 +1,217 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +/ { + nvt_info { /* Get from ModelConfig.txt */ + BIN_NAME = "FW98565A"; + BIN_NAME_T = "FW98565T"; + RTOS_APP_MAIN = "cardv"; /* Optional, if OS type is Linux, dont care it. */ + /* EMBMEM_BLK_SIZE, Normally, 2KPageNand=0x20000, 512PageNand=0x4000, SPI=0x10000 */ + EMBMEM_BLK_SIZE = "0x10000"; + + /** + * [EMBMEM] + * EMBMEM_NONE + * EMBMEM_NAND + * EMBMEM_SPI_NOR + * EMBMEM_SPI_NAND + * EMBMEM_EMMC + */ + EMBMEM = "EMBMEM_SPI_NOR"; + + /** + * [FW_TYPE] + * FW_TYPE_NORMAL + * FW_TYPE_COMPRESS + * FW_TYPE_PARTIAL + * FW_TYPE_PARTIAL_COMPRESS + * FW_TYPE_LZMA + */ + FW_TYPE = "FW_TYPE_PARTIAL"; + + + /** + * [UI_STYLE] + * UI_STYLE_SPORTCAM + */ + UI_STYLE = "UI_STYLE_LVGL"; + + /** + * ======= Linux common ========= + * application/external + */ + NVT_CFG_APP_EXTERNAL = ""; + /* application include list */ + NVT_CFG_APP = "hfs lviewd nvtrtspd nvtipcd nvteventd uctrl fslinux ugxstrg nvtsystem camctrlcgi nvtweb nvtrecordManagerd msdcnvt arm_neon_perf mem ucmd isp_demon memcpy"; + /* rootfs etc folder */ + NVT_ROOTFS_ETC = ""; + /* strip executable binary and library files: yes/no */ + NVT_BINARY_FILE_STRIP = "no"; + /* Using customized kernel config */ + NVT_CFG_KERNEL_CFG = ""; + NVT_CFG_UBOOT_CFG = ""; + + /** + * ======= Linux for different code setting ========= + * [NVT_LINUX_SMP] + * NVT_LINUX_SMP_ON + * NVT_LINUX_SMP_OFF + */ + NVT_LINUX_SMP = "NVT_LINUX_SMP_OFF"; + + /** + * [NVT_CHIP_ID] + * CHIP_NA51055 + * CHIP_NA51084 + * CHIP_NA51089 + */ + NVT_CHIP_ID = "CHIP_NA51089"; + + /** + * [NVT_LINUX_COMPRESS] + * NVT_LINUX_COMPRESS_AUTO , by linux config + * NVT_LINUX_COMPRESS_GZ + * NVT_LINUX_COMPRESS_NONE + */ + NVT_LINUX_COMPRESS = "NVT_LINUX_COMPRESS_GZ"; + + /** + * [NVT_DEFAULT_NETWORK_BOOT_PROTOCOL] + * NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_SERVER + * NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_DHCP_CLIENT + * NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_STATIC_IP + */ + NVT_DEFAULT_NETWORK_BOOT_PROTOCOL = "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_STATIC_IP"; + + /** + * [NVT_ROOTFS_TYPE] + * NVT_ROOTFS_TYPE_NAND_UBI + * NVT_ROOTFS_TYPE_SQUASH + * NVT_ROOTFS_TYPE_NAND_JFFS2 + * NVT_ROOTFS_TYPE_NOR_JFFS2 + * NVT_ROOTFS_TYPE_RAMDISK + * NVT_ROOTFS_TYPE_EMMC + */ + NVT_ROOTFS_TYPE = "NVT_ROOTFS_TYPE_RAMDISK"; + + /** + * [LCD1] + * disp_if8b_lcd1_wm08001_sn75lvds83b + * disp_if8b_lcd1_aucn01 + * disp_ifdsi_lcd1_nt35510 + * disp_if8b_lcd1_pw35p00 + * disp_if8b_lcd1_psd300_ili8961 + */ + LCD1 = "disp_if8b_lcd1_psd200_st7789v"; + + /** + * [SENSOR] + * sen_off + * sen_ar0237ir + * sen_os02k10 + * sen_ov2715 + * sen_ar0237 + * sen_imx290 + * sen_os05a10 + * sen_gc5603 + */ + SENSOR1 = "sen_os05b10"; + SENSOR1_CFG = "sen_os05b10_565"; + SENSOR2 = "sen_off"; + SENSOR2_CFG = "sen_off"; + /** + * [SENSORCFG_SUFFIX] + */ + SENSOR_CFG_SUFFIX = "_565"; + + /** + * [NVT_ETHERNET] + * NVT_ETHERNET_NONE + * NVT_ETHERNET_RTOS + */ + NVT_ETHERNET = "NVT_ETHERNET_NONE"; + + /** + * [NVT_SDIO_WIFI]: Remember to update root-fs/rootfs/etc/init.d/S05_Net + * NVT_SDIO_WIFI_NONE + * NVT_SDIO_WIFI_RTK + * NVT_SDIO_WIFI_BRCM + * NVT_SDIO_WIFI_NVT + * NVT_SDIO_WIFI_BOUFFALO + */ + NVT_SDIO_WIFI = "NVT_SDIO_WIFI_NONE"; + + /** + * [NVT_USB_WIFI] + * NVT_USB_WIFI_NONE + */ + NVT_USB_WIFI = "NVT_USB_WIFI_NONE"; + + /** + * [NVT_USB_4G] + * NVT_USB_4G_NONE + */ + NVT_USB_4G = "NVT_USB_4G_NONE"; + + /** + * [WIFI_RTK_MDL] : sub item for NVT_SDIO_WIFI_RTK + * WIFI_RTK_MDL_NONE + * WIFI_RTK_MDL_8189 + */ + WIFI_RTK_MDL = "WIFI_RTK_MDL_8189"; + + /** + * [WIFI_BRCM_MDL] : sub item for NVT_SDIO_WIFI_BRCM + * WIFI_BRCM_MDL_43438a1_ampk6212axtal26 + * WIFI_BRCM_MDL_43455c0_ampk6255c0 + * WIFI_BRCM_MDL_43456c5_ampk6256c5 + */ + WIFI_BRCM_MDL = "WIFI_BRCM_MDL_43456c5_ampk6256c5"; + + /** + * [WIFI_NVT_MDL] : sub item for NVT_SDIO_WIFI_NVT + * WIFI_NVT_MDL_18202 + * WIFI_NVT_MDL_18211 + */ + WIFI_NVT_MDL = "WIFI_NVT_MDL_18211"; + + /** + * [NVT_CURL_SSL] + * NVT_CURL_SSL_OPENSSL + * NVT_CURL_SSL_WOLFSSL + */ + NVT_CURL_SSL = "NVT_CURL_SSL_OPENSSL"; + + /** + * [NVT_UBOOT_ENV_IN_STORG_SUPPORT] + * NVT_UBOOT_ENV_IN_STORG_SUPPORT_NAND + * NVT_UBOOT_ENV_IN_STORG_SUPPORT_NOR + * NVT_UBOOT_ENV_IN_STORG_SUPPORT_MMC + * NVT_UBOOT_ENV_IN_STORG_SUPPORT_OFF + */ + NVT_UBOOT_ENV_IN_STORG_SUPPORT = "NVT_UBOOT_ENV_IN_STORG_SUPPORT_OFF"; + + /** + * [TOUCH] + * TOUCH_OFF + * TOUCH_ON + */ + TOUCH = "TOUCH_OFF"; + + /** + * [DX model] + */ + DX_MODEL = "565_HUNTING_EVB_LINUX_4G_S550"; + + /** + * [LINK SCRIPT] + * + * if UI_STYLE = "UI_STYLE_LVGL" , please set LDS_SCRIPT = "HUNTING_LVGL_LDS" + */ + LDS_SCRIPT = "HUNTING_LVGL_LDS"; + }; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-media.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-media.dtsi new file mode 100755 index 000000000..0ab2333b9 --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-media.dtsi @@ -0,0 +1,96 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + + +#include +#include "nvt-basic.dtsi" + +/ { + nvtmpp { + compatible = "nvt,nvtmpp"; + }; + + isf_stream { + compatible = "nvt,isf_stream"; + }; + + isf_flow { + compatible = "nvt,isf_flow"; + }; + + isf_vdocap { + compatible = "nvt,isf_vdocap"; + }; + + isf_vdoprc { + compatible = "nvt,isf_vdoprc"; + }; + + isf_dummy { + compatible = "nvt,isf_dummy"; + }; + + isf_vdoenc { + compatible = "nvt,isf_vdoenc"; + }; + + isf_vdodec { + compatible = "nvt,isf_vdodec"; + }; + + isf_vdoout { + compatible = "nvt,isf_vdoout"; + }; + + dispobj { + compatible = "nvt,nvt_dispobj"; + }; + + dispdev { + compatible = "nvt,nvt_dispdev"; + }; + + audio { + compatible = "nvt,nvt_audio"; + }; + + msdcnvt { + compatible = "nvt,msdcnvt"; + }; + + msdcnvt_adj { + compatible = "nvt,msdcnvt_adj"; + }; + + msdcnvt_custom_si { + compatible = "nvt,msdcnvt_custom_si"; + }; + + wavstudio { + compatible = "nvt,wavstudio"; + }; + + isf_audenc { + compatible = "nvt,isf_audenc"; + }; + + isf_auddec { + compatible = "nvt,isf_auddec"; + }; + + isf_audcap { + compatible = "nvt,isf_audcap"; + }; + + isf_audout { + compatible = "nvt,isf_audout"; + }; + + nvt_ipc { + compatible = "nvt,nvt_ipc"; + }; +}; \ No newline at end of file diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-mem-tbl.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-mem-tbl.dtsi new file mode 100755 index 000000000..5ef334fa9 --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-mem-tbl.dtsi @@ -0,0 +1,69 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ +/ { + /* Uboot/loader memory layout */ + nvt_memory_cfg { + #address-cells = <1>; + #size-cells = <1>; + dram { reg = <0x00000000 0x08000000>; }; + shmem{ reg = <0x00007E00 0x00000200>; }; /* always exists */ + loader { reg = <0x01000000 0x00080000>; }; /* recycled after uboot started */ + fdt { reg = <0x01800000 0x00040000>; }; /* recycled after linux started */ + rtos { reg = <0x01840000 0x00FC0000>; }; /* recycled after linux started */ + linuxtmp{ reg = <0x02800000 0x04000000>; }; /* recycled after rtos started */ + uboot{ reg = <0x06800000 0x01640000>; }; /* recycled after rtos started */ + logo-fb{ reg = <0x07E40000 0x001C0000>; }; /* recycled after rtos started */ + }; + + /* Linux system memory region*/ + memory { device_type = "memory"; reg = <0x00000000 0x01800000 0x02000000 0x01500000>; }; + + /* Linux setup reserved memory */ + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + + /* + * rtos libc heap expected minimum size + * becasue remain of rtos memory will be the libc heap automatically, + * if it too small against your expectation, there will be a assert on boot. + */ + libc-heap { size = <0x00200000>; }; + + hdal-memory { + #address-cells = <1>; + #size-cells = <1>; + media { reg = <0x03500000 0x04B00000>; }; + }; + + hdal-maxpath-cfg { + /* First is for VCAP0, second for VCAP1 and so on.*/ + vdocap_active_list = <1 0 0 0 0 0 0 0>; + vdoprc_maxdevice = <2>; + vdoenc_maxpath = <4>; + vdodec_maxpath = <3>; + vdoout_maxdevice = <1>; + adocap_maxdevice = <1>; + adoout_maxdevice = <2>; + adoenc_maxpath = <1>; + adodec_maxpath = <1>; + /* gfx jog list */ + gfx_maxjob = <2>; + /* stamp max img buffer number */ + stamp_maximg = <9>; + /* First is internal stamp number, second is external stamp number */ + vdoprc_maxstamp = <4 4>; + /* First is internal mask number, second is external mask number */ + vdoprc_maxmask = <4 4>; + vdoenc_maxstamp = <9 9>; + vdoenc_maxmask = <0 64>; + vdoout_maxstamp = <0 16>; + vdoout_maxmask = <0 64>; + }; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-nvtpack.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-nvtpack.dtsi new file mode 100755 index 000000000..568f94fda --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-nvtpack.dtsi @@ -0,0 +1,31 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +&nor { + /** + * partition_name is $1 as in partition_$1 is referred + * to nvt-na51089-storage-partition. dtsi + */ + nvtpack { + ver = "NVTPACK_FW_INI_16072017"; /* Fixed */ + method = <1>; /* Fixed */ + index { + id0 { partition_name = "loader"; source_file = ""; }; /* Fixed */ + id1 { partition_name = "fdt"; source_file = ""; }; /* Fixed */ + id2 { partition_name = "fdt.restore"; source_file = ""; }; /* Fixed */ + id3 { partition_name = "fdt.app"; source_file = "application.bin"; }; + id4 { partition_name = "uboot"; source_file = ""; }; + id5 { partition_name = "uenv"; source_file = ""; }; + id6 { partition_name = "kernel"; source_file = ""; }; + id7 { partition_name = "rootfs"; source_file = ""; }; + id8 { partition_name = "rootfs1"; source_file = ""; }; + id9 { partition_name = "rtos"; source_file = "rtos-main.bin"; }; + id10 { partition_name = "app"; source_file = ""; }; + id11 { partition_name = "sys"; source_file = ""; }; + }; + }; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri-dev.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri-dev.dtsi new file mode 100755 index 000000000..15e9beede --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri-dev.dtsi @@ -0,0 +1,52 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + + +#include + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + +/* dummy_i2c_dev: dummy_i2c@1a { + compatible = "nvt,dummy_i2c_dev"; + reg = <0x1a>; + }; +*/ +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; +}; + +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; +}; + +&spi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + +/* dummy_spi_dev: dummy_spi_dev@0 { + compatible = "dummy_spi_dev.0"; + reg = <0>; // Chip select 0 + spi-max-frequency = <1000000>; + spi-cpol; + }; +*/ +}; + +&spi1 { + status = "okay"; +}; + +&spi2 { + status = "okay"; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri.dtsi new file mode 100755 index 000000000..7f0143b1d --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-peri.dtsi @@ -0,0 +1,514 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + + +#include +#include "nvt-basic.dtsi" + +/ { + chosen { + bootargs = " "; + }; + + aliases { + mmc0 = &mmc0; /* Fixed to mmcblk0 for sdio1 */ + mmc1 = &mmc1; /* Fixed to mmcblk1 for sdio2 */ + }; + + uart@f0290000 { + compatible = "ns16550a"; + reg = <0xf0290000 0x1000>; + interrupts = ; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <24000000>; + fifo-size = <64>; + uart_id = <0>; + }; + + uart@f0300000 { + compatible = "ns16550a"; + reg = <0xf0300000 0x1000>; + interrupts = ; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <48000000>; + fifo-size = <64>; + hw_flowctrl = <0>; + rx_trig_level = <3>; + uart_id = <1>; + }; + + uart@f0310000 { + compatible = "ns16550a"; + reg = <0xf0310000 0x1000>; + interrupts = ; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + no-loopback-test = <1>; + clock-frequency = <48000000>; + fifo-size = <64>; + hw_flowctrl = <0>; + rx_trig_level = <3>; + uart_id = <2>; + }; + + kdrv_rpc: cc@f0090000 { + compatible = "kdrv_rpc"; + reg = <0xf0090000 0x300>; + interrupts = ; + }; + + mmc0: mmc@f0420000 { + compatible = "nvt,nvt_mmc"; + reg = <0xf0420000 0x1000>; + interrupts = ; + max-frequency = <48000000>; + voltage-switch = <0>; + max-voltage = <3300>; + bus-width = <4>; + neg-sample-edge = <0>; + driving = <15 15 15 20 15 15 25 25 25 25 25 25>; + cd_gpio = ; + card_power_gpio = ; + /*ro_gpio = ;*/ + /*power_en = ;*/ + }; + + mmc1: mmc@f0500000 { + compatible = "nvt,nvt_mmc2"; + reg = <0xf0500000 0x1000>; + interrupts = ; + max-frequency = <48000000>; + voltage-switch = <0>; + max-voltage = <3300>; + bus-width = <4>; + neg-sample-edge = <0>; + driving = <15 8 8 20 8 8 20 8 8 20 8 8>; + cd_gpio = <0 GPIO_FALLING_EDGE GPIO_INTERRUPT>; + /*ro_gpio = ;*/ + /*power_en = ;*/ + /*status = "disabled";*/ + }; + + nand: nand@f0400000 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "nvt,nvt_spinand"; + reg = <0xf0400000 0x1000>; + interrupts = ; + clock-frequency = <96000000>; + nvt-devname = "spi_nand.0"; + }; + + nor: nor@f0400000 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "nvt,nvt_spinor"; + reg = <0xf0400000 0x1000>; + interrupts = ; + clock-frequency = <120000000>; + nvt-devname = "spi_nor.0"; + trace-stdtable = <0>; + }; + + gpio: gpio@f0070000 { + compatible = "nvt,nvt_gpio"; + reg = <0xf0070000 0x10000>; + interrupts = ; + #gpio-cells = <2>; + }; + + eth@f02b0000 { + compatible = "nvt,synopsys_eth"; + reg = <0xf02b0000 0x3800>; + interrupts = ; + sp-clk = <0>; + ref-clk-out = <0>; + }; + + phy@f02b3800 { + compatible = "nvt,eth_phy"; + reg = <0xf02b3800 0x400>; + }; + + wdt@f0050000 { + compatible = "nvt,nvt_wdt"; + reg = <0xf0050000 0x10000>; + interrupts = ; + }; + + pwm: pwm@f0210000 { + compatible = "nvt,nvt_kdrv_pwm"; + reg = <0xf0210000 0x2000>; + interrupts = ; + }; + + adc@f0260000 { + compatible = "nvt,nvt_adc"; + reg = <0xf0260000 0x1000>; + interrupts = ; + #io-channel-cells = <1>; + }; + + rtc@f0060000 { + compatible = "nvt,nvt_rtc"; + reg = <0xf0060000 0x100>; + interrupts = ; + }; + + drtc@f00b0000 { + compatible = "nvt,nvt_drtc"; + reg = <0xf00b0000 0x100>; + }; + + crypto: crypto@f0620000 { + compatible = "nvt,nvt_crypto"; + reg = <0xf0620000 0x100>; + interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; + mclk = <1>; + }; + + hash: hash@f0670000 { + compatible = "nvt,nvt_hash"; + reg = <0xf0670000 0x100>; + interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; + mclk = <1>; + }; + + rsa: rsa@f06a0000 { + compatible = "nvt,nvt_rsa"; + reg = <0xf06a0000 0x100>; + interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; + mclk = <1>; + }; + + top: top@f0010000 { + compatible = "nvt,nvt_top"; + reg = <0xf0010000 0x2000 + 0xf0030000 0x2000 + 0xf0070000 0x10000>; + }; + + sie@f0c00000 { + compatible = "nvt,drv_sie"; + reg = <0xf0c00000 0x900 + 0xf0d20000 0x900 + 0xF0D30000 0x900>; + interrupts = ; + /*sensor_freq = <37125000>;*/ + }; + + tge@f0cc0000 { + compatible = "nvt,kdrv_tge"; + reg = <0xf0cc0000 0x150>; + interrupts = ; + }; + + rhe@f0ce0000 { + compatible = "nvt,kdrv_rhe"; + reg = <0xf0ce0000 0x900>; + interrupts = ; + }; + + ime@f0c40000 { + compatible = "nvt,kdrv_ime"; + reg = <0xf0c40000 0x1000>; + interrupts = ; + }; + + ife2@f0d00000 { + compatible = "nvt,kdrv_ife2"; + reg = <0xf0d00000 0x100>; + interrupts = ; + }; + + ise@f0c90000 { + compatible = "nvt,kdrv_ise"; + reg = <0xf0c90000 0x100>; + interrupts = ; + }; + + ipe@f0c30000 { + compatible = "nvt,kdrv_ipe"; + reg = <0xf0c30000 0x900>; + interrupts = ; + }; + + ife@f0c70000 { + compatible = "nvt,kdrv_ife"; + reg = <0xf0c70000 0x800>; + interrupts = ; + }; + + vpe@f0cd0000 { + compatible = "nvt,kdrv_vpe"; + reg = <0xf0cd0000 0x1040>; + interrupts = ; + }; + + ai@f0c60000 { + compatible = "nvt,kdrv_ai"; + reg = <0xf0c60000 0x23c + 0xf0d50000 0x114 + 0xf0cb0000 0x22c>; + interrupts = ; + clock-frequency = <600000000 480000000 600000000>; + }; + + md@f0c10000 { + compatible = "nvt,kdrv_md"; + reg = <0xf0c10000 0x150>; + interrupts = ; + clock-frequency = <240000000>; + }; + dis@f0c50000 { + compatible = "nvt,kdrv_dis"; + reg = <0xf0c50000 0x114>; + interrupts = ; + }; + + coe@f0a11000 { + compatible = "nvt,nvt_coe"; + reg = <0xf0a11000 0x2c0>; + }; + + dce@f0c20000 { + compatible = "nvt,kdrv_dce"; + reg = <0xf0c20000 0x650>; + interrupts = ; + }; + + ive@f0d70000 { + compatible = "nvt,kdrv_ive"; + reg = <0xf0d70000 0x6c>; + interrupts = ; + }; + + sde@f0d90000 { + compatible = "nvt,kdrv_sde"; + reg = <0xf0d90000 0x90>; + interrupts = ; + }; + + ide@f0800000 { + compatible = "nvt,nvt_ide"; + reg = <0xf0800000 0x1000>; + interrupts = ; + }; + + dsi@f0840000 { + compatible = "nvt,nvt_dsi"; + reg = <0xf0840000 0x1000>; + interrupts = ; + }; + + csi@f0280000 { + compatible = "nvt,nvt_csi"; + reg = <0xf0280000 0x100 + 0xf0330000 0x100>; + interrupts = ; + }; + + lvds@f0270000 { + compatible = "nvt,nvt_lvds"; + reg = <0xF0270000 0x200 + 0xF0370000 0x200>; + interrupts = ; + }; + + senphy@f06b0000 { + compatible = "nvt,nvt_senphy"; + reg = <0xF06B0000 0x100>; + }; + + ssenif@f0xx0000 { + compatible = "nvt,nvt_ssenif"; + reg = <0xF02C0000 0x2000>; + interrupts = ; + }; + + sif@f0240000 { + compatible = "nvt,nvt_sif"; + reg = <0xf0240000 0x200>; + interrupts = ; + clock-frequency = <1000000>; + }; + + graphic@f0c80000 { + compatible = "nvt,nvt_graphic"; + reg = <0xF0C80000 0x300 + 0xF0D10000 0x100>; + interrupts = ; + }; + + affine@f0ca0000 { + compatible = "nvt,nvt_affine"; + reg = <0xF0CA0000 0x100>; + interrupts = ; + }; + + h26x@f0a10000 { + compatible = "nvt,nvt_h26x"; + reg = <0xf0a10000 0xa00>; + interrupts = ; + power_saving = <0>; /* 0:using pllf320, 1:using fix96m */ + }; + + timer@f0040000 { + compatible = "nvt,nvt_timer"; + reg = <0xf0040000 0x300>; + interrupts = ; + }; + + eac@f0640000 { + compatible = "nvt,nvt_eac"; + reg = <0xF0640000 0x200>; + }; + + jpg@f0a00000 { + compatible = "nvt,nvt_jpg"; + reg = <0xf0a00000 0x100>; + interrupts = ; + }; + + nvt_usb2host@f0600000 { + compatible = "nvt,ehci-nvtivot"; + reg = <0xf0600000 0x10000>; + interrupts = ; + }; + + nvt_usb2dev@f0600000 { + compatible = "nvt,fotg200_udc"; + reg = <0xf0600000 0x10000>; + interrupts = ; + }; + + nvt_usb_chrg@f0600000 { + compatible = "nvt,nvt_usb_chrgdet"; + reg = <0xf0600000 0x10000>; + }; + + dai@f0630000 { + compatible = "nvt,nvt_dai"; + reg = <0xF0630000 0xbc>; + interrupts = ; + }; + + rotate@f0cf0000 { + compatible = "nvt,nvt_rotation"; + reg = <0xF0CF0000 0x100>; + interrupts = ; + }; + + drvdump@0 { + compatible = "nvt,nvt_drvdump"; + }; + + dsp@f1430000 { + compatible = "nvt,nvt_dsp"; + reg = <0xF1430000 0x200 + 0xF2000000 0x1000000 + 0xF1440000 0x200 + 0xF3000000 0x1000000>; + interrupts = ; + }; + + spi0: spi@f0230000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0230000 0x10000>; + interrupts = ; + dma-support = <0>; + nvt-devname = <0>; + }; + + spi1: spi@f0320000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0320000 0x10000>; + interrupts = ; + dma-support = <0>; + nvt-devname = <1>; + }; + + spi2: spi@f0340000 { + compatible = "nvt,nvt_spi"; + reg = <0xf0340000 0x10000>; + interrupts = ; + dma-support = <0>; + nvt-devname = <2>; + }; + + sdp@f0390000 { + compatible = "nvt,nvt_sdp"; + reg = <0xf0390000 0x28>; + interrupts = ; + }; + + tse@f0650000 { + compatible = "nvt,nvt_tse"; + reg = <0xF0650000 0x90>; + interrupts = ; + }; + + remote@f0250000 { + compatible = "nvt,nvt_remote"; + reg = <0xf0250000 0x28>; + interrupts = ; + }; + + rng: rng@f0680000 { + compatible = "nvt,nvt_rng"; + reg = <0xf0680000 0x100>; + }; + + nvt_arb@f0000000 { + compatible = "nvt,nvt_arb"; + reg = <0xF0000000 0xA000 + 0xF0FE0000 0x300>; + interrupts = ; + }; + + nvt_otp@f0660000 { + compatible = "nvt,nvt_otp"; + reg = <0xF0660000 0x70>; + }; + + kdrv_ipp { + clock-frequency = <240000000>; + }; + + uvcp: uvcp@f0690000 { + compatible = "nvt,nvt_uvcp"; + reg = <0xf0690000 0x200>; + interrupts = ; + }; + pll_preset@0 { + pll3{pll_config = <3 0 0>;}; + pll4{pll_config = <4 0 0>;}; + pll5{pll_config = <5 297000000 1>;}; + pll6{pll_config = <6 0 0>;}; + pll7{pll_config = <7 0 0>;}; + pll8{pll_config = <8 0 0>;}; + pll9{pll_config = <9 0 0>;}; + pll11{pll_config = <11 0 0>;}; + pll12{pll_config = <12 0 1>;}; + }; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-storage-partition.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-storage-partition.dtsi new file mode 100755 index 000000000..4942292be --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-storage-partition.dtsi @@ -0,0 +1,22 @@ +/* + * Novatek Ltd. NA51089 BSP part of dts + * + * Cortex-A9 + * + */ + +&nor { + partition_loader { label = "loader"; reg = <0x0 0x0000000 0x0 0x10000>; }; /* Fixed */ + partition_fdt { label = "fdt"; reg = <0x0 0x10000 0x0 0x10000>; }; /* Fixed */ + partition_fdt.restore { label = "fdt.restore"; reg = <0x0 0x20000 0x0 0x10000>; }; /* Fixed */ + partition_fdt.app { label = "fdt.app"; reg = <0x0 0x30000 0x0 0x20000>; }; /* Fixed */ + partition_uboot { label = "uboot"; reg = <0x0 0x50000 0x0 0xA0000>; }; + partition_uenv { label = "uenv"; reg = <0x0 0xF0000 0x0 0x10000>; }; + partition_kernel { label = "kernel"; reg = <0x0 0x100000 0x0 0x260000>; }; + partition_rootfs { label = "rootfs"; reg = <0x0 0x360000 0x0 0x3E0000>; }; + partition_rootfs1 { label = "rootfs1"; reg = <0x0 0x740000 0x0 0x810000>; }; + partition_rtos { label = "rtos"; reg = <0x0 0xF50000 0x0 0x900000>; }; + partition_app { label = "app"; reg = <0x0 0x1850000 0x0 0x50000>; }; /* app size depneds on hdal/samples/vendor_cfg/Makeile: ROOTFS_UBI_MAX_LEB_COUNT */ + partition_sys { label = "sys"; reg = <0x0 0x18A0000 0x0 0x10000>; }; + partition_all { label = "all"; reg = <0x0 0x0000000 0x0 0x2000000>; }; +}; diff --git a/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-top.dtsi b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-top.dtsi new file mode 100755 index 000000000..332e9bc2f --- /dev/null +++ b/configs/rtos/cfg_565_HUNTING_EVB_LINUX_4G_S550/nvt-top.dtsi @@ -0,0 +1,24 @@ +&top { + sdio{pinmux = <0x5>;}; + sdio2{pinmux = <0x5>;}; + sdio3{pinmux = <0x0>;}; + nand{pinmux = <0x5>;}; + sensor{pinmux = <0x0>;}; + sensor2{pinmux = <0x0>;}; + mipi_lvds{pinmux = <0x0>;}; + i2c{pinmux = <0x40>;}; + sif{pinmux = <0x0>;}; + uart{pinmux = <0x1021>;}; + spi{pinmux = <0x0>;}; + sdp{pinmux = <0x0>;}; + remote{pinmux = <0x0>;}; + pwm{pinmux = <0x8000>;}; /* pwm3: 0x8000 p_gp3 IRLED */ + /* pwm2{pinmux = <0x2000000>;}; pwm11: 0x2000000 p_gp11 backlight */ + pwm2{pinmux = <0x0000000>;}; + ccnt{pinmux = <0x0>;}; + audio{pinmux = <0x0>;}; + lcd{pinmux = <0x10000000>;}; + tv{pinmux = <0x0>;}; + eth{pinmux = <0x0>;}; + misc{pinmux = <0x0>;}; +}; diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCamera_Sensor.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCamera_Sensor.c new file mode 100755 index 000000000..e4d4e01f8 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCamera_Sensor.c @@ -0,0 +1,3946 @@ +/** + DxSensor + + Sensor common interface + + @file DxSensor.c + @ingroup mISYSAlg + @note Nothing (or anything need to be mentioned). + + Copyright Novatek Microelectronics Corp. 2011. All rights reserved. +*/ + +#include "Delay.h" +// sensor +#include "DxSensor.h" +#include "sensor_if.h" +#include "sensor_drv.h" +#include "IOCfg.h" +// Driver_Sys +#include "lvds.h" +#include "sif.h" + +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" // *=All, [mark]=CustomClass +#include + +typedef enum { + POW_CTRL_TURN_ON = 0, + POW_CTRL_TURN_OFF, + POW_CTRL_SAVE_ON, + POW_CTRL_SAVE_OFF, +} POW_CTRL_FLAG; + +typedef SENSOR_DRV_TAB *(*SEN_GET_DRV)(void); +typedef SENSOR_INIT_OBJ(*SEN_GET_INI_OBJ)(SENSOR_ID id); +typedef BOOL (*SEN_PLUG_IN)(SENSOR_ID id); +typedef SEN_PLUG_INFO (*SEN_PLUG_INFO_FP)(SENSOR_ID id); +typedef void (*SEN_POWER_CTRL)(SENSOR_ID id, POW_CTRL_FLAG flag); + +typedef struct { + CHAR *name; + SEN_GET_DRV drv_tab; + SEN_GET_INI_OBJ drv_obj; + SEN_POWER_CTRL pow_ctrl; + SEN_PLUG_IN det_plug_in; + SEN_PLUG_IN plug_in_cb; + SEN_PLUG_INFO_FP det_plug_info; +} SEN_MAP_INFO; + +static CHAR sensor_name[SENSOR_ID_MAX_NUM][30] = { + _SENSOR1_, + _SENSOR2_, +}; + +#if (defined(_CMOS_AR0237L_)) +static SENSOR_INIT_OBJ sensor_get_obj_ar0237l(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + + // set mclk change enable to notify sensor driver + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_ar0237l(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + // reset pin + UINT32 reset_pin = S_GPIO_4; + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //Min. 1ms + gpio_setPin(reset_pin); + Delay_DelayMs(8); //150000 MCLK + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_IMX291M_)) +#if 0 +static void csi_hw_rst_imx291cqc(SENSOR_ID sensor_id) +{ + debug_msg("~G csi_hw_rst_imx291cqc \r\n"); + gpio_setDir(S_GPIO_4, GPIO_DIR_OUTPUT); + gpio_clearPin(S_GPIO_4); + Delay_DelayMs(1); + gpio_setPin(S_GPIO_4); + Delay_DelayUs(10); +} +#endif + +static SENSOR_INIT_OBJ sensor_get_obj_imx291m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + //init_obj.interface_info.csi.fp_hw_rst = csi_hw_rst_imx291cqc; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + sensor_ssenif_timeout_manual(id,TRUE); + // set mclk change enable to notify sensor driver + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + + return init_obj; +} +static void sen_power_ctrl_imx291m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + + // set power off sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_IMX290M_)) +#if 0 +static void csi_hw_rst_imx290(SENSOR_ID sensor_id) +{ + debug_msg("~G csi_hw_rst_imx290 \r\n"); + gpio_setDir(S_GPIO_4, GPIO_DIR_OUTPUT); + gpio_clearPin(S_GPIO_4); + Delay_DelayMs(1); + gpio_setPin(S_GPIO_4); + Delay_DelayUs(10); +} +#endif + +static SENSOR_INIT_OBJ sensor_get_obj_imx290m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + //init_obj.interface_info.csi.fp_hw_rst = csi_hw_rst_imx290; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + + // set mclk change enable to notify sensor driver + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_imx290m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + + // set power off sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_IMX307M_)) +#if 0 +static void csi_hw_rst_imx307cqc(SENSOR_ID sensor_id) +{ + debug_msg("~G csi_hw_rst_imx307cqc \r\n"); + gpio_setDir(S_GPIO_4, GPIO_DIR_OUTPUT); + gpio_clearPin(S_GPIO_4); + Delay_DelayMs(1); + gpio_setPin(S_GPIO_4); + Delay_DelayUs(10); +} +#endif + +static SENSOR_INIT_OBJ sensor_get_obj_imx307m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + //init_obj.interface_info.csi.fp_hw_rst = csi_hw_rst_imx307cqc; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + + // set mclk change enable to notify sensor driver + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_imx307m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + + // set power off sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_IMX307L_)) +#if 0 +static void csi_hw_rst_imx307l(SENSOR_ID sensor_id) +{ + debug_msg("~G csi_hw_rst_imx307l \r\n"); + gpio_setDir(S_GPIO_4, GPIO_DIR_OUTPUT); + gpio_clearPin(S_GPIO_4); + Delay_DelayMs(1); + gpio_setPin(S_GPIO_4); + Delay_DelayUs(10); +} +#endif + +static SENSOR_INIT_OBJ sensor_get_obj_imx307l(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + //init_obj.interface_info.csi.fp_hw_rst = csi_hw_rst_imx307l; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_NONE; + // set mclk change enable to notify sensor driver + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 1; + init_obj.sen_2_serial_pin_map[1] = 2; + init_obj.sen_2_serial_pin_map[2] = 0; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_imx307l(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + + // set power off sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_IMX317M_)) +#if 0 +static void csi_hw_rst_imx317m(SENSOR_ID sensor_id) +{ + + gpio_setDir(S_GPIO_4, GPIO_DIR_OUTPUT); + gpio_clearPin(S_GPIO_4); + Delay_DelayMs(1); + gpio_setPin(S_GPIO_4); + Delay_DelayUs(10); + +} +#endif +static SENSOR_INIT_OBJ sensor_get_obj_imx317m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + //init_obj.interface_info.csi.fp_hw_rst = csi_hw_rst_imx317m; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + // set sensor interface pin map (LVDS/CSI/SLVS-EC/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + + return init_obj; +} + +static void sen_power_ctrl_imx317m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + + // set power off sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_IMX323P_)) +#if 0 +static void csi_hw_rst_imx323p(SENSOR_ID sensor_id) +{ + + gpio_setDir(S_GPIO_4, GPIO_DIR_OUTPUT); + gpio_clearPin(S_GPIO_4); + Delay_DelayMs(1); + gpio_setPin(S_GPIO_4); + Delay_DelayUs(10); + +} +#endif +static SENSOR_INIT_OBJ sensor_get_obj_imx323p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + // set sensor interface pin map (LVDS/CSI/SLVS-EC/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + + return init_obj; +} + +static void sen_power_ctrl_imx323p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + + // set power off sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_IMX335M_)) +static void csi_hw_rst_imx335m(SENSOR_ID sensor_id) +{ + UINT32 reset_pin = S_GPIO_4; + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayUs(1); +} +static SENSOR_INIT_OBJ sensor_get_obj_imx335m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.interface_info.csi.fp_hw_rst = csi_hw_rst_imx335m; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_imx335m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_IMX377M_)) +#if 0 +static void csi_hw_rst_imx377cqc(SENSOR_ID sensor_id) +{ + debug_msg("~G csi_hw_rst_imx377cqc \r\n"); + gpio_setDir(S_GPIO_4, GPIO_DIR_OUTPUT); + gpio_clearPin(S_GPIO_4); + Delay_DelayMs(1); + gpio_setPin(S_GPIO_4); + Delay_DelayUs(10); +} +#endif + +static SENSOR_INIT_OBJ sensor_get_obj_imx377m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + //init_obj.interface_info.csi.fp_hw_rst = csi_hw_rst_imx377cqc; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + + // set mclk change enable to notify sensor driver + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_imx377m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + + // set power off sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OV2715M_)) +static SENSOR_INIT_OBJ sensor_get_obj_ov2715m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + + //init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + switch (id) { + case SENSOR_ID_1: + default: + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + break; + + case SENSOR_ID_2: + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C1_1ST; + break; + } + + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + //init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[0] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[1] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + + switch (id) { + case SENSOR_ID_1: + default: + init_obj.sen_2_serial_pin_map[0] = 0; + break; + + case SENSOR_ID_2: + init_obj.sen_2_serial_pin_map[2] = 0; + break; + } + return init_obj; +} +static void sen_power_ctrl_ov2715m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id,SEN_CLK_SIEMCLK, ENABLE); + + switch (id) { + case SENSOR_ID_1: + default: + reset_pin = S_GPIO_4; + break; + + case SENSOR_ID_2: + reset_pin = S_GPIO_4; + break; + } + + //Power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id,SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OV2732M_)) +static SENSOR_INIT_OBJ sensor_get_obj_ov2732m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} +static void sen_power_ctrl_ov2732m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id,SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + UINT32 reset_pin = S_GPIO_4; + switch (id) { + case SENSOR_ID_1: + default: + reset_pin = S_GPIO_4; + break; + + case SENSOR_ID_2: + reset_pin = S_GPIO_4; + break; + } + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id,SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + + +#if (defined(_CMOS_OV2735M_)) +static SENSOR_INIT_OBJ sensor_get_obj_ov2735m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + + //init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + switch (id) { + case SENSOR_ID_1: + default: + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + break; + + case SENSOR_ID_2: + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C1_1ST; + break; + } + + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_FLIP | SENSOR_OPTION_MIRROR; + + // set mclk change enable to notify sensor driver + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[1] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + + switch (id) { + case SENSOR_ID_1: + default: + init_obj.sen_2_serial_pin_map[0] = 0; + break; + case SENSOR_ID_2: + init_obj.sen_2_serial_pin_map[2] = 0; + break; + } + return init_obj; +} +static void sen_power_ctrl_ov2735m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id,SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + UINT32 reset_pin = S_GPIO_4; + switch (id) { + case SENSOR_ID_1: + default: + reset_pin = S_GPIO_4; + break; + + case SENSOR_ID_2: + reset_pin = S_GPIO_4; + break; + } + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + Delay_DelayMs(5); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(5); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id,SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OS02K10M_)) +static SENSOR_INIT_OBJ sensor_get_obj_os02k10m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} +static void sen_power_ctrl_os02k10m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OS04B10M_)) +static SENSOR_INIT_OBJ sensor_get_obj_os04b10m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} +static void sen_power_ctrl_os04b10m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OS05A10M_)) +static SENSOR_INIT_OBJ sensor_get_obj_os05a10m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_os05a10m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OS08A10M_)) +static SENSOR_INIT_OBJ sensor_get_obj_os08a10m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_os08a10m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + //DBG_ERR("MCLK Enable id=%d, flag=%d\r\n", id, flag); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OV4689M_)) +static SENSOR_INIT_OBJ sensor_get_obj_ov4689m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_ov4689m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + UINT32 reset_pin = S_GPIO_4; + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OV4689M_R2A_)) +static SENSOR_INIT_OBJ sensor_get_obj_ov4689m_r2a(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_ov4689m_r2a(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + UINT32 reset_pin = S_GPIO_4; + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_OV5658M_)) +static SENSOR_INIT_OBJ sensor_get_obj_ov5658m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_ov5658m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + UINT32 reset_pin = S_GPIO_4; + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_AR0237P_)) +static SENSOR_INIT_OBJ sensor_get_obj_ar0237p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + return init_obj; +} +static void sen_power_ctrl_ar0237p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + Delay_DelayMs(2); + gpio_setPin(reset_pin); + Delay_DelayMs(10); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_AR0237IRP_)) +static SENSOR_INIT_OBJ sensor_get_obj_ar0237irp(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + return init_obj; +} +static void sen_power_ctrl_ar0237irp(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + + switch (flag) { + case POW_CTRL_TURN_ON: + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + Delay_DelayMs(2); + gpio_setPin(reset_pin); + Delay_DelayMs(10); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_AR0521M_)) +static SENSOR_INIT_OBJ sensor_get_obj_ar0521m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_ar0521m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(2); + gpio_setPin(reset_pin); + Delay_DelayMs(2); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_AR0330P_)) // for TP-LINK +static SENSOR_INIT_OBJ sensor_get_obj_ar0330p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C1_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP;; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + return init_obj; +} +static void sen_power_ctrl_ar0330p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + Delay_DelayMs(2); + gpio_setPin(reset_pin); + Delay_DelayMs(10); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_AR0330M_)) +static SENSOR_INIT_OBJ sensor_get_obj_ar0330m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} + +static void sen_power_ctrl_ar0330m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_clearPin(reset_pin); + Delay_DelayMs(2); + gpio_setPin(reset_pin); + Delay_DelayMs(10); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_HM2140M_)) +static SENSOR_INIT_OBJ sensor_get_obj_hm2140m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_hm2140m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_PS5250M_)) +static SENSOR_INIT_OBJ sensor_get_obj_ps5250m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_ps5250m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + Delay_DelayMs(1); + gpio_setPin(reset_pin); + Delay_DelayMs(1); + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(1); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_F23M_)) +static SENSOR_INIT_OBJ sensor_get_obj_f23m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_f23m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + UINT32 pwdn_pin = S_GPIO_9; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + //set pwdn to low + gpio_setDir(pwdn_pin, GPIO_DIR_OUTPUT); + gpio_setPin(pwdn_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(pwdn_pin); + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_JXK02M_)) +static SENSOR_INIT_OBJ sensor_get_obj_jxk02m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} + +static void sen_power_ctrl_jxk02m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + UINT32 pwdn_pin = S_GPIO_9; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + //set pwdn to low + gpio_setDir(pwdn_pin, GPIO_DIR_OUTPUT); + gpio_setPin(pwdn_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(pwdn_pin); + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_JXK03M_)) +static SENSOR_INIT_OBJ sensor_get_obj_jxk03m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} + +static void sen_power_ctrl_jxk03m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + UINT32 pwdn_pin = S_GPIO_9; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + //set pwdn to low + gpio_setDir(pwdn_pin, GPIO_DIR_OUTPUT); + gpio_setPin(pwdn_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(pwdn_pin); + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC2232M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc2232m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + switch (id) { + case SENSOR_ID_1: + default: + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_MCLK; + break; + + case SENSOR_ID_2: + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C1_1ST; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_MCLK2; + break; + } + + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[1] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + + switch (id) { + case SENSOR_ID_1: + default: + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + break; + + case SENSOR_ID_2: + init_obj.sen_2_serial_pin_map[2] = 0; + init_obj.sen_2_serial_pin_map[3] = 1; + break; + } + return init_obj; +} + +static void sen_power_ctrl_sc2232m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + switch (id) { + case SENSOR_ID_1: + default: + reset_pin = S_GPIO_4; + break; + + case SENSOR_ID_2: + reset_pin = S_GPIO_5; + break; + } + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + switch (id) { + case SENSOR_ID_1: + default: + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + case SENSOR_ID_2: + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK2, ENABLE); + break; + } + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + switch (id) { + case SENSOR_ID_1: + default: + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + reset_pin = S_GPIO_4; + break; + + case SENSOR_ID_2: + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK2, ENABLE); + reset_pin = S_GPIO_5; + break; + } + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC2315M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc2315m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + return init_obj; +} +static void sen_power_ctrl_sc2315m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin);//high + Delay_DelayMs(2); + gpio_clearPin(reset_pin);//Low + Delay_DelayMs(2); + gpio_setPin(reset_pin);//high + Delay_DelayMs(2); + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC2232P_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc2232p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST;//SENSOR_I2C1_1ST for TP + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + return init_obj; +} + +static void sen_power_ctrl_sc2232p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + + +#if (defined(_CMOS_SC2235P_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc2235p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST;//for TP ; EVB SENSOR_I2C2_1ST + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP;//SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} +static void sen_power_ctrl_sc2235p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + //DBG_ERR("MCLK Enable id=%d, flag=%d\r\n", id, flag); + + // set power on sequence + UINT32 reset_pin = S_GPIO_4; + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + //gpio_clearPin(reset_pin);//Low + //Delay_DelayMs(1); + gpio_setPin(reset_pin);//high + Delay_DelayMs(1); + gpio_clearPin(reset_pin);//Low + Delay_DelayMs(1); + gpio_setPin(reset_pin);//high + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC2310M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc2310m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST;//SENSOR_I2C1_1ST for TP + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} +static void sen_power_ctrl_sc2310m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC2315P_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc2315p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST;//SENSOR_I2C1_1ST for TP + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + return init_obj; +} +static void sen_power_ctrl_sc2315p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin);//high + Delay_DelayMs(2); + gpio_clearPin(reset_pin);//Low + Delay_DelayMs(2); + gpio_setPin(reset_pin);//high + Delay_DelayMs(2); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC3235M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc3235m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc3235m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC4210M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc4210m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = 2; + init_obj.sen_2_serial_pin_map[3] = 3; + return init_obj; +} + +static void sen_power_ctrl_sc4210m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC4236M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc4236m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc4236m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC4236M_24M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc4236m_24m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc4236m_24m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC4236P_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc4236p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + return init_obj; +} + +static void sen_power_ctrl_sc4236p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin,GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC4238M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc4238m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc4238m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC4335M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc4335m(SENSOR_ID id) +{ + SENSOR_INIT_OBJ init_obj = {0}; + + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + + return init_obj; +} + +static void sen_power_ctrl_sc4335m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(3); //>=2ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC5035M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc5035m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_NONE;//SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc5035m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC5235M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc5235m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc5235m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC5236M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc5236m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_NONE;//SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc5236m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC5238M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc5238m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc5238m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_SC5335M_)) +static SENSOR_INIT_OBJ sensor_get_obj_sc5335m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_sc5335m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_GC4623M_)) +static SENSOR_INIT_OBJ sensor_get_obj_gc4623m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_gc4623m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_GC2053M_)) +static SENSOR_INIT_OBJ sensor_get_obj_gc2053m(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + // set sensor interface pin map (LVDS/CSI/...) + init_obj.sen_2_serial_pin_map[0] = 0; + init_obj.sen_2_serial_pin_map[1] = 1; + init_obj.sen_2_serial_pin_map[2] = SEN_IGNORE; + init_obj.sen_2_serial_pin_map[3] = SEN_IGNORE; + return init_obj; +} + +static void sen_power_ctrl_gc2053m(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + UINT32 reset_pin = S_GPIO_4; + switch (flag) { + case POW_CTRL_TURN_ON: + // set power on sequence + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_clearPin(reset_pin); + Delay_DelayMs(2); //>=1ms + gpio_setPin(reset_pin); + Delay_DelayMs(2); //>=1ms + + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + Delay_DelayMs(2); + gpio_clearPin(reset_pin); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_GC2053P_)) +static SENSOR_INIT_OBJ sensor_get_obj_gc2053p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C2_1ST;//for TP ; EVB SENSOR_I2C2_1ST + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option= SENSOR_OPTION_MIRROR | SENSOR_OPTION_FLIP; + + // set mclk change enable to notify sensor driver + // init_obj.chg_mclk_en = ENABLE; + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_DFT; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + return init_obj; +} +static void sen_power_ctrl_gc2053p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // set clock information + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + //DBG_ERR("MCLK Enable id=%d, flag=%d\r\n", id, flag); + + // set power on sequence + UINT32 reset_pin = S_GPIO_4; + gpio_setDir(reset_pin, GPIO_DIR_OUTPUT); + //gpio_clearPin(reset_pin);//Low + //Delay_DelayMs(1); + gpio_setPin(reset_pin);//high + Delay_DelayMs(1); + gpio_clearPin(reset_pin);//Low + Delay_DelayMs(1); + gpio_setPin(reset_pin);//high + Delay_DelayMs(1); + + break; + + case POW_CTRL_TURN_OFF: + // set power off sequence + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} + +#endif + + +#if (defined(_CMOS_TP2827P_)) +static SENSOR_INIT_OBJ sensor_get_obj_tp2827p(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + + return init_obj; +} + +static void sen_power_ctrl_tp2827p(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + break; + + case POW_CTRL_TURN_OFF: + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +#if (defined(_CMOS_NVP6124B_)) +static SENSOR_INIT_OBJ sensor_get_obj_nvp6124b(SENSOR_ID id) +{ + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + + init_obj.cmd_info.cmd_type = SENSOR_CMD_I2C; + init_obj.cmd_info.info.i2c.i2c = SENSOR_I2C3_1ST; + init_obj.cmd_info.info.i2c.w_addr_sel = SEN_I2C_W_ADDR_DFT; + init_obj.sen_map_if = SENSOR_MAP_IF_DEFAULT; + init_obj.option = SENSOR_OPTION_USER; + return init_obj; +} + +static void sen_power_ctrl_nvp6124b(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + // reset pin + gpio_setDir(P_GPIO_15, GPIO_DIR_OUTPUT); + gpio_clearPin(P_GPIO_15); + Delay_DelayMs(20); + gpio_setPin(P_GPIO_15); + Delay_DelayMs(20); + break; + + case POW_CTRL_TURN_OFF: + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +static BOOL sen_det_plug_in_nvp6124b(SENSOR_ID id) +{ + BOOL rt = E_OK; + SENSOR_HANDLE sen_handle = {0}; + + if (!sensor_is_open(id)) { + DBG_IND("sensor is not open\r\n"); + drv_sensor_power_turn_on(id); + if (drv_sensor_init(id, &sen_handle) == TRUE) { + if (sen_handle.drv_tab == NULL) { + DBG_ERR("Error drv_tab NULL\r\n"); + return E_SYS; + } else { + rt = sensor_open(id, &sen_handle); + } + } else { + DBG_ERR("Error sensor_init fail\r\n"); + return E_SYS; + } + } + + + if (sensor_get_info(id, SEN_GET_DET_PLUG, &rt) != E_OK) { + DBG_ERR("get sensor plugin fail\r\n"); + return FALSE; + } + + return rt; +} + +#endif + +#if (defined(_CMOS_SIEPATGEN_)) +static SENSOR_INIT_OBJ sensor_get_obj_siepatgen(SENSOR_ID id) +{ + + // set sensor command interface info (Vx1/SIF/I2C/IO/...) + SENSOR_INIT_OBJ init_obj = {0}; + + init_obj.sie_mclk_info.mclk_src = SEN_SIEMCLK_SRC_MCLK; + init_obj.sie_mclk_info.chg_mclk_en = ENABLE; + + return init_obj; +} + +static void sen_power_ctrl_siepatgen(SENSOR_ID id, POW_CTRL_FLAG flag) +{ + switch (flag) { + case POW_CTRL_TURN_ON: + + if (id == SENSOR_ID_1) { + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, ENABLE); + } else { + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK2, ENABLE); + } + + break; + + case POW_CTRL_TURN_OFF: + if (id == SENSOR_ID_1) { + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK, DISABLE); + } else { + sensor_if_get_pll_ctrl_obj()->set_clk_en(id, SEN_CLK_SIEMCLK2, DISABLE); + } + break; + + case POW_CTRL_SAVE_ON: + break; + + case POW_CTRL_SAVE_OFF: + break; + + default: + DBG_ERR("SenPowerCtrl fail (%d)\r\n", flag); + break; + } +} +#endif + +static SEN_MAP_INFO sensor_map_tab[SENSOR_ID_MAX_NUM + 1] = { +#if (defined(_CMOS_AR0237L_)) + {"CMOS_AR0237L", sensor_get_drv_tab_ar0237l, sensor_get_obj_ar0237l, sen_power_ctrl_ar0237l, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_IMX291M_)) + {"CMOS_IMX291M", sensor_get_drv_tab_imx291m, sensor_get_obj_imx291m, sen_power_ctrl_imx291m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_IMX290M_)) + {"CMOS_IMX290M", sensor_get_drv_tab_imx290m, sensor_get_obj_imx290m, sen_power_ctrl_imx290m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_IMX307M_)) + {"CMOS_IMX307M", sensor_get_drv_tab_imx307m, sensor_get_obj_imx307m, sen_power_ctrl_imx307m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_IMX307L_)) + {"CMOS_IMX307L", sensor_get_drv_tab_imx307l, sensor_get_obj_imx307l, sen_power_ctrl_imx307l, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_IMX317M_)) + {"CMOS_IMX317M", sensor_get_drv_tab_imx317m, sensor_get_obj_imx317m, sen_power_ctrl_imx317m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_IMX323P_)) + {"CMOS_IMX323P", sensor_get_drv_tab_imx323p, sensor_get_obj_imx323p, sen_power_ctrl_imx323p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_IMX335M_)) + {"CMOS_IMX335M", sensor_get_drv_tab_imx335m, sensor_get_obj_imx335m, sen_power_ctrl_imx335m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_IMX377M_)) + {"CMOS_IMX377M", sensor_get_drv_tab_imx377m, sensor_get_obj_imx377m, sen_power_ctrl_imx377m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OV2715M_)) + {"CMOS_OV2715M", sensor_get_drv_tab_ov2715m, sensor_get_obj_ov2715m, sen_power_ctrl_ov2715m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OV2732M_)) + {"CMOS_OV2732M", sensor_get_drv_tab_ov2732m, sensor_get_obj_ov2732m, sen_power_ctrl_ov2732m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OV2735M_)) + {"CMOS_OV2735M", sensor_get_drv_tab_ov2735m, sensor_get_obj_ov2735m, sen_power_ctrl_ov2735m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OS02K10M_)) + {"CMOS_OS02K10M", sensor_get_drv_tab_os02k10m, sensor_get_obj_os02k10m, sen_power_ctrl_os02k10m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OS04B10M_)) + {"CMOS_OS04B10M", sensor_get_drv_tab_os04b10m, sensor_get_obj_os04b10m, sen_power_ctrl_os04b10m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OS05A10M_)) + {"CMOS_OS05A10M", sensor_get_drv_tab_os05a10m, sensor_get_obj_os05a10m, sen_power_ctrl_os05a10m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OS08A10M_)) + {"CMOS_OS08A10M", sensor_get_drv_tab_os08a10m, sensor_get_obj_os08a10m, sen_power_ctrl_os08a10m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OV4689M_)) + {"CMOS_OV4689M", sensor_get_drv_tab_ov4689m, sensor_get_obj_ov4689m, sen_power_ctrl_ov4689m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_OV4689M_R2A_)) + {"CMOS_OV4689M_R2A", sensor_get_drv_tab_ov4689m_r2a, sensor_get_obj_ov4689m_r2a, sen_power_ctrl_ov4689m_r2a, NULL, NULL}, +#endif +#if (defined(_CMOS_OV5658M_)) + {"CMOS_OV5658M", sensor_get_drv_tab_ov5658m, sensor_get_obj_ov5658m, sen_power_ctrl_ov5658m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_AR0237P_)) + {"CMOS_AR0237P", sensor_get_drv_tab_ar0237p, sensor_get_obj_ar0237p, sen_power_ctrl_ar0237p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_AR0237IRP_)) + {"CMOS_AR0237IRP", sensor_get_drv_tab_ar0237irp, sensor_get_obj_ar0237irp, sen_power_ctrl_ar0237irp, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_AR0330M_)) + {"CMOS_AR0330M", sensor_get_drv_tab_ar0330m, sensor_get_obj_ar0330m, sen_power_ctrl_ar0330m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_AR0330P_)) + {"CMOS_AR0330P", sensor_get_drv_tab_ar0330p, sensor_get_obj_ar0330p, sen_power_ctrl_ar0330p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_AR0521M_)) + {"CMOS_AR0521M", sensor_get_drv_tab_ar0521m, sensor_get_obj_ar0521m, sen_power_ctrl_ar0521m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_HM2140M_)) + {"CMOS_HM2140M", sensor_get_drv_tab_hm2140m, sensor_get_obj_hm2140m, sen_power_ctrl_hm2140m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_PS5250M_)) + {"CMOS_PS5250M", sensor_get_drv_tab_ps5250m, sensor_get_obj_ps5250m, sen_power_ctrl_ps5250m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_F23M_)) + {"CMOS_F23M", sensor_get_drv_tab_f23m, sensor_get_obj_f23m, sen_power_ctrl_f23m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_JXK02M_)) + {"CMOS_JXK02M", sensor_get_drv_tab_jxk02m, sensor_get_obj_jxk02m, sen_power_ctrl_jxk02m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_JXK03M_)) + {"CMOS_JXK03M", sensor_get_drv_tab_jxk03m, sensor_get_obj_jxk03m, sen_power_ctrl_jxk03m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC2232M_)) + {"CMOS_SC2232M", sensor_get_drv_tab_sc2232m, sensor_get_obj_sc2232m, sen_power_ctrl_sc2232m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC2232P_)) + {"CMOS_SC2232P", sensor_get_drv_tab_sc2232p, sensor_get_obj_sc2232p, sen_power_ctrl_sc2232p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC2235P_)) + {"CMOS_SC2235P", sensor_get_drv_tab_sc2235p, sensor_get_obj_sc2235p, sen_power_ctrl_sc2235p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC2310M_)) + {"CMOS_SC2310M", sensor_get_drv_tab_sc2310m, sensor_get_obj_sc2310m, sen_power_ctrl_sc2310m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC2315M_)) + {"CMOS_SC2315M", sensor_get_drv_tab_sc2315m, sensor_get_obj_sc2315m, sen_power_ctrl_sc2315m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC2315P_)) + {"CMOS_SC2315P", sensor_get_drv_tab_sc2315p, sensor_get_obj_sc2315p, sen_power_ctrl_sc2315p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC3235M_)) + {"CMOS_SC3235M", sensor_get_drv_tab_sc3235m, sensor_get_obj_sc3235m, sen_power_ctrl_sc3235m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC4210M_)) + {"CMOS_SC4210M", sensor_get_drv_tab_sc4210m, sensor_get_obj_sc4210m, sen_power_ctrl_sc4210m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC4236M_)) + {"CMOS_SC4236M", sensor_get_drv_tab_sc4236m, sensor_get_obj_sc4236m, sen_power_ctrl_sc4236m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC4236M_24M_)) + {"CMOS_SC4236M_24M", sensor_get_drv_tab_sc4236m_24m, sensor_get_obj_sc4236m_24m, sen_power_ctrl_sc4236m_24m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC4236P_)) + {"CMOS_SC4236P", sensor_get_drv_tab_sc4236p, sensor_get_obj_sc4236p, sen_power_ctrl_sc4236p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC4238M_)) + {"CMOS_SC4238M", sensor_get_drv_tab_sc4238m, sensor_get_obj_sc4238m, sen_power_ctrl_sc4238m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC4335M_)) + {"CMOS_SC4335M", sensor_get_drv_tab_sc4335m, sensor_get_obj_sc4335m, sen_power_ctrl_sc4335m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC5035M_)) + {"CMOS_SC5035M", sensor_get_drv_tab_sc5035m, sensor_get_obj_sc5035m, sen_power_ctrl_sc5035m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC5235M_)) + {"CMOS_SC5235M", sensor_get_drv_tab_sc5235m, sensor_get_obj_sc5235m, sen_power_ctrl_sc5235m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC5236M_)) + {"CMOS_SC5236M", sensor_get_drv_tab_sc5236m, sensor_get_obj_sc5236m, sen_power_ctrl_sc5236m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC5238M_)) + {"CMOS_SC5238M", sensor_get_drv_tab_sc5238m, sensor_get_obj_sc5238m, sen_power_ctrl_sc5238m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SC5335M_)) + {"CMOS_SC5335M", sensor_get_drv_tab_sc5335m, sensor_get_obj_sc5335m, sen_power_ctrl_sc5335m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_GC4623M_)) + {"CMOS_GC4623M", sensor_get_drv_tab_gc4623m, sensor_get_obj_gc4623m, sen_power_ctrl_gc4623m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_GC2053M_)) + {"CMOS_GC2053M", sensor_get_drv_tab_gc2053m, sensor_get_obj_gc2053m, sen_power_ctrl_gc2053m, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_GC2053P_)) + {"CMOS_GC2053P", sensor_get_drv_tab_gc2053p, sensor_get_obj_gc2053p, sen_power_ctrl_gc2053p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_SIEPATGEN_)) + {"CMOS_SIEPATGEN", sensor_get_drv_tab_siepatgen, sensor_get_obj_siepatgen, sen_power_ctrl_siepatgen, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_TP2827P_)) + {"CMOS_TP2827P", sensor_get_drv_tab_tp2827p, sensor_get_obj_tp2827p, sen_power_ctrl_tp2827p, NULL, NULL, NULL}, +#endif +#if (defined(_CMOS_NVP6124B_)) + {"CMOS_NVP6124B", sensor_get_drv_tab_nvp6124b, sensor_get_obj_nvp6124b, sen_power_ctrl_nvp6124b, sen_det_plug_in_nvp6124b, NULL, NULL}, +#endif + {"END", NULL, NULL, NULL, NULL, NULL, NULL}, +}; + + +#if 0 +#endif +/************************************************************************/ +/* common function */ +/************************************************************************/ +static SEN_MAP_INFO *drv_sensor_search(CHAR *search_name) +{ + UINT32 i; + SEN_MAP_INFO *info; + + DBG_IND("search drv name = %s\r\n", search_name); + info = sensor_map_tab; + + for (i = 0; (strcmp(info[i].name, "END") != 0); i ++) { + if (strcmp(info[i].name, search_name) == 0) { + return &info[i]; + } + } + return NULL; +} + +BOOL drv_sensor_repalce_drv(SENSOR_ID id, CHAR *repalce_name) +{ + if (id >= SENSOR_ID_MAX_NUM) { + DBG_ERR("id(%d) overflow\r\n"); + return FALSE; + } + DBG_IND("id = %d, repalce drv name = %s\r\n", id, repalce_name); + + if (drv_sensor_search(repalce_name) == NULL) { + DBG_ERR("search sensor driver fail (%s)\r\n", repalce_name); + return FALSE; + } + + strncpy(&sensor_name[id][0], repalce_name, sizeof(sensor_name[id])); + + return TRUE; +} + + +SENSOR_MULTI_ID sensor_gp_map[SENSOR_ID_MAX_NUM] = {0}, sensor_subgp_map[SENSOR_ID_MAX_NUM] = {0}; +ER drv_sensor_group_cfg(SENSOR_MULTI_ID* sensor_gp, SENSOR_MULTI_ID* sensor_subgp) +{ + UINT32 cnt, chk_cnt; + + for (cnt = 0; cnt < SENSOR_ID_MAX_NUM; cnt++) { + if (sensor_gp == SENSOR_MULTI_ID_NONE) { + continue; + } + for (chk_cnt = 0; chk_cnt < SENSOR_ID_MAX_NUM; chk_cnt++) { + if (sensor_chk_multiid(chk_cnt, sensor_gp[cnt])) { + sensor_gp_map[chk_cnt] |= sensor_gp[cnt]; + } + } + } + for (cnt = 0; cnt < SENSOR_ID_MAX_NUM; cnt++) { + if (sensor_subgp == SENSOR_MULTI_ID_NONE) { + continue; + } + for (chk_cnt = 0; chk_cnt < SENSOR_ID_MAX_NUM; chk_cnt++) { + if (sensor_chk_multiid(chk_cnt, sensor_subgp[cnt])) { + sensor_subgp_map[chk_cnt] |= sensor_subgp[cnt]; + } + } + } + + return E_OK; +} + +BOOL drv_sensor_first_cfg(void) +{ + UINT32 cnt_id; + SEN_MAP_INFO *sen_map_info; + ER rt = E_OK; + + for (cnt_id = 0; cnt_id < SENSOR_ID_MAX_NUM; cnt_id++) { + if (sensor_debug_item[cnt_id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s\r\n", __func__); + } + } + + // Check that no sensor is open + for (cnt_id = 0; cnt_id < SENSOR_ID_MAX_NUM; cnt_id++) { + if (sensor_is_open(cnt_id)) { + DBG_ERR("sensor id %d is open\r\n", cnt_id); + return FALSE; + } + } + + // set group info. + sensor_set_group_info(sensor_gp_map, sensor_subgp_map); + + // set mclk info for SIE MCLK + for (cnt_id = 0; cnt_id < SENSOR_ID_MAX_NUM; cnt_id++) { + sen_map_info = drv_sensor_search(sensor_name[cnt_id]); + + if ((strcmp(sensor_name[cnt_id], "CMOS_OFF") != 0) && (sen_map_info != NULL)) { + rt = sensor_cfg_sie_mclk(cnt_id, sen_map_info->drv_obj(cnt_id), sen_map_info->drv_tab()); + if (rt != E_OK) { + DBG_ERR("id %d sensor_cfg_sie_mclk error %d\r\n", cnt_id, rt); + } + rt = sensor_cfg_sie_max_clk(cnt_id, sen_map_info->drv_obj(cnt_id), sen_map_info->drv_tab()); + if (rt != E_OK) { + DBG_ERR("id %d sensor_cfg_sie_clk error %d\r\n", cnt_id, rt); + } + } + } + + // set pll clk + rt = sensor_cfg_pll_clk(); + if (rt != E_OK) { + DBG_ERR("sensor_cfg_pll_clk %d\r\n", rt); + } + + return FALSE; +} + +BOOL drv_sensor_init(SENSOR_ID id, SENSOR_HANDLE *handle) +{ + SEN_MAP_INFO *sensor_info = drv_sensor_search(sensor_name[id]); + + if (sensor_debug_item[id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s id %d\r\n", __func__, id); + } + + if (sensor_info == NULL) { + DBG_ERR("driver get fail\r\n"); + return FALSE; + } + + if ((sensor_info->drv_tab == NULL) || (sensor_info->drv_obj == NULL)) { + DBG_ERR("fp NULL fail\r\n"); + return FALSE; + } + + if (handle != NULL) { + handle->drv_tab = sensor_info->drv_tab(); + handle->ini_obj = sensor_info->drv_obj(id); + if (handle->drv_tab == NULL) { + DBG_ERR("input parame error 0x%.8x\r\n", handle->drv_tab); + } else { + return TRUE; + } + } else { + DBG_ERR("input parame error 0x%.8x\r\n", handle); + } + + return FALSE; +} + +void drv_sensor_power_turn_on(SENSOR_ID id) +{ + SEN_MAP_INFO *sensor_info = drv_sensor_search(sensor_name[id]); + + if (sensor_debug_item[id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s id %d\r\n", __func__, id); + } + + if (sensor_info == NULL) { + DBG_ERR("driver get fail\r\n"); + return; + } + + if (sensor_info->pow_ctrl == NULL) { + DBG_IND("driver NULL\r\n"); + return; + } + + if (sensor_chk_power_on(id)) { + sensor_info->pow_ctrl(id, POW_CTRL_TURN_ON); + } +} + +void drv_sensor_power_turn_off(SENSOR_ID id) +{ + SEN_MAP_INFO *sensor_info = drv_sensor_search(sensor_name[id]); + + if (sensor_debug_item[id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s id %d\r\n", __func__, id); + } + + if (sensor_info == NULL) { + DBG_ERR("driver get fail\r\n"); + return; + } + + if (sensor_info->pow_ctrl == NULL) { + DBG_IND("driver NULL\r\n"); + return; + } + + if (sensor_chk_power_off(id)) { + sensor_info->pow_ctrl(id, POW_CTRL_TURN_OFF); + } +} + +void drv_sensor_power_save_on(SENSOR_ID id) +{ + SEN_MAP_INFO *sensor_info = drv_sensor_search(sensor_name[id]); + + if (sensor_debug_item[id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s id %d\r\n", __func__, id); + } + + if (sensor_info == NULL) { + DBG_ERR("driver get fail\r\n"); + return; + } + + if (sensor_info->pow_ctrl == NULL) { + DBG_IND("driver NULL\r\n"); + return; + } + + if (sensor_chk_power_save_on(id)) { + sensor_info->pow_ctrl(id, POW_CTRL_SAVE_ON); + } +} + +void drv_sensor_power_save_off(SENSOR_ID id) +{ + SEN_MAP_INFO *sensor_info = drv_sensor_search(sensor_name[id]); + + if (sensor_debug_item[id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s id %d\r\n", __func__, id); + } + + if (sensor_info == NULL) { + DBG_ERR("driver get fail\r\n"); + return; + } + + if (sensor_info->pow_ctrl == NULL) { + DBG_IND("driver NULL\r\n"); + return; + } + + if (sensor_chk_power_save_off(id)) { + sensor_info->pow_ctrl(id, POW_CTRL_SAVE_OFF); + } +} + +BOOL drv_sensor_det_plug_in(SENSOR_ID id) +{ + SEN_MAP_INFO *sensor_info = drv_sensor_search(sensor_name[id]); + + if (sensor_debug_item[id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s id %d\r\n", __func__, id); + } + + if (sensor_info == NULL) { + DBG_ERR("driver get fail\r\n"); + return FALSE; + } + + if (sensor_info->det_plug_in == NULL) { + DBG_IND("driver NULL\r\n"); + return FALSE; + } + + return sensor_info->det_plug_in(id); +} + +BOOL drv_sensor_plug_in_cb(SENSOR_ID id) +{ + SEN_MAP_INFO *sensor_info = drv_sensor_search(sensor_name[id]); + + if (sensor_debug_item[id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s id %d\r\n", __func__, id); + } + + if (sensor_info == NULL) { + DBG_ERR("driver get fail\r\n"); + return FALSE; + } + + if (sensor_info->plug_in_cb == NULL) { + DBG_IND("driver NULL\r\n"); + return FALSE; + } + + return sensor_info->plug_in_cb(id); +} + +SEN_PLUG_INFO drv_sensor_det_plug_info(SENSOR_ID id) +{ + SEN_MAP_INFO *sen_map_info = drv_sensor_search(sensor_name[id]); + SEN_PLUG_INFO plug_info; + + plug_info.resolution.w = 1920; + plug_info.resolution.h = 1080; + plug_info.fps = 30; + + if (sensor_debug_item[id] & SENSOR_DEBUG_MODELEXT) { + debug_msg("^C%s id %d\r\n", __func__, id); + } + + if (sen_map_info == NULL) { + DBG_ERR("driver get fail\r\n"); + return plug_info; + } + + if (sen_map_info->det_plug_info == NULL) { + DBG_IND("driver NULL\r\n"); + return plug_info; + } + + return sen_map_info->det_plug_info(id); +} + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.c new file mode 100755 index 000000000..ad21fa240 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.c @@ -0,0 +1,197 @@ +#include "kwrap/type.h" +#include "DrvExt.h" +#include "Dx.h" +#include "DxCommon.h" +#include "DxCfg.h" +#if defined(_MCU_ENABLE_) +#include "MCUCtrl.h" +#include "MCU2Ctrl.h" +#endif + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +//IO +/* +[PinmuxCfg.c] +pinmux + +[GpioMapping.c] +cgpio x32 (Storage) +pgpio x64 (Peripheral) +sgpio x30 (SENSOR) +lgpio x28 (LCD) +dgpio x9 (Dedicated) +pwm x20 +pwm_ccnt x3 + +[VoltageDet.c] +adc x8 + +[SerialComm.c] +i2c x2 x2 +sif x1 x6 +csi x2 x4 +lvds x1 x10 +spi x3 +uart x2 +*/ + + +extern DX_OBJECT gDevLCD; +extern DX_OBJECT gDevTV; +#if _TODO +extern DX_OBJECT gDevLCD2; +extern DX_OBJECT gDevHDMI; +#endif +extern DX_OBJECT gDevEmbMem0; +extern DX_OBJECT gDevEmbMem1; +extern DX_OBJECT gDevEmbMem2; +extern DX_OBJECT gDevEmbMem3; +extern DX_OBJECT gDevEmbMem4; +extern DX_OBJECT gDevEmbMem5; +extern DX_OBJECT gDevEmbMem6; +extern DX_OBJECT gDevEmbMem7; +extern DX_OBJECT gDevEmbMem8; +extern DX_OBJECT gDevCARD1; +extern DX_OBJECT gDevCARD3; +extern DX_OBJECT gDevUSB; +extern DX_OBJECT gDevSnd; +extern DX_OBJECT gDevPowerBATT; +extern DX_OBJECT gDevPowerDC; +extern DX_OBJECT gDevLED; + + +DX_HANDLE Dx_GetObject(UINT32 DxClassType) // Query device object +{ + UINT32 hDevice = 0; + + switch (DxClassType & DX_CLASS_MASK) { + + //external device + case DX_CLASS_DISPLAY_EXT: + #if !defined(_Disp_VIRTUAL_LCD1_OFF_) + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_LCD) { + hDevice = (UINT32)(&gDevLCD); + } + #endif + break; + case DX_CLASS_AUDIO_EXT: + #if (defined(_AUDIO_ON_)) + hDevice = (UINT32)(&gDevSnd); + #endif + break; + case DX_CLASS_SENSOR_EXT: + break; + case DX_CLASS_STORAGE_EXT: + #if (!defined(_EMBMEM_NONE_)) && (!defined(_EMBMEM_UITRON_OFF_)) + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM0) { + hDevice = (UINT32)(&gDevEmbMem0); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM1) { + hDevice = (UINT32)(&gDevEmbMem1); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM2) { + hDevice = (UINT32)(&gDevEmbMem2); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM3) { + hDevice = (UINT32)(&gDevEmbMem3); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM4) { + hDevice = (UINT32)(&gDevEmbMem4); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM5) { + hDevice = (UINT32)(&gDevEmbMem5); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM6) { + hDevice = (UINT32)(&gDevEmbMem6); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM7) { + hDevice = (UINT32)(&gDevEmbMem7); + } else if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_EMBMEM8) { + hDevice = (UINT32)(&gDevEmbMem8); + } + #endif + #if !defined(_CARD1_NONE_) + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_CARD1) { + hDevice = (UINT32)(&gDevCARD1); + } + #endif + #if !defined(_CARD3_NONE_) + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_CARD3) { + hDevice = (UINT32)(&gDevCARD3); + } + #endif + break; + case DX_CLASS_USB_EXT: + hDevice = (UINT32)(&gDevUSB); + break; + case DX_CLASS_POWER_EXT: + #if defined(_POWER_BATT_) + hDevice = (UINT32)(&gDevPowerBATT); + #elif defined(_POWER_DC_) + hDevice = (UINT32)(&gDevPowerDC); + #else + hDevice = 0; + DBG_ERR("Require a POWER EXT device!\r\n"); + #endif + break; + case DX_CLASS_INPUT_EXT: + break; + case DX_CLASS_STATUS_EXT: + if ((DxClassType & DX_TYPE_MASK) == DX_TYPE_OUTLED) { +#if (defined(_MODEL_IPCAM1_EVB_) || defined(_MODEL_IPCAM2_EVB_)) +#elif (defined(_MODEL_DVCAM1_EVB_) || defined(_MODEL_DVCAM2_EVB_)) + hDevice = (UINT32)(&gDevLED); +#endif + } + break; + } + + if (hDevice == 0) { + DBG_ERR("[Dx] GetObject %08x failed\r\n", DxClassType); + } + return (DX_HANDLE)hDevice; +} + +UINT8 *Dx_GetModelExtCfg(MODELEXT_TYPE type, MODELEXT_HEADER **header) +{ +#if _TODO + UINT8 *p_modelext = NULL; +#if defined(_MODELEXT_BUILT_IN_ON_) +#define LABEL_NAME(_name_) _name_ + extern char LABEL_NAME(_section_modelext_info_addr)[]; + extern char LABEL_NAME(_section_modelext_info_size)[]; + static BOOL bInit = FALSE; + if (!bInit) { + MODELEXT_HEADER *header; + MODELEXT_INFO *pData; + pData = (MODELEXT_INFO *)modelext_get_cfg((unsigned char *)_section_modelext_info_addr, MODELEXT_TYPE_INFO, &header); + if (pData == NULL) { + DBG_FATAL("MODELEXT_INFO is null, call by = 0x%08X\r\n", __CALL__ - 8); + return NULL; + } + pData->ext_bin_length = (UINT32)_section_modelext_info_size; + bInit = TRUE; + } + UINT8 *p_modelext = (UINT8 *)modelext_get_cfg((unsigned char *)_section_modelext_info_addr, type, header); //_TODO: VOS need nvt_mem converting address +#else + UINT8 *p_modelext = (UINT8 *)modelext_get_cfg((unsigned char *)_BOARD_IPC_ADDR_, type, header); //_TODO: VOS need nvt_mem converting address +#endif + + if (p_modelext == NULL || *header == NULL) { + DBG_FATAL("MODELEXT_TYPE = %d is null\r\n", type); + return NULL; + } + + return p_modelext; +#else + return 0; +#endif +} + +void Install_DrvExt(void) +{ + #if defined(_MCU_ENABLE_) + MCUCtrl_InstallID(); + MCU2Ctrl_InstallID(); + #endif +} + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h new file mode 100755 index 000000000..dd8b3c563 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCfg.h @@ -0,0 +1,18 @@ +#ifndef _DXCFG_H +#define _DXCFG_H + +//#define _Disp_VIRTUAL_LCD1_OFF_ +//#define _AUDIO_ON_ +//#define _EMBMEM_NONE_ +//#define _EMBMEM_UITRON_OFF_ +//#define _CARD1_NONE_ +//#define _CARD3_NONE_ +#define _POWER_DC_ +//#define _POWER_BATT_ +//#define _MCU_ENABLE_ + +#define USB_CHARGE_FUNCTION DISABLE +#define TV_SWITCH_FUNCTION DISABLE +#define GPIO_DUMMYLOAD_FUNCTION DISABLE + +#endif diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCmd.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCmd.c new file mode 100755 index 000000000..3581ed48a --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxCmd.c @@ -0,0 +1,201 @@ +#include +#include +#include +#include "Utility.h" + +#include "DrvExt.h" + +#include "adc.h" //for adc_readData() +#include "top.h" //for pinmux_select_ick(), pinmux_select_goice(), PINMUX_ICK, PINMUX_GOICE +#include "DxApi.h" +#include "Driver.h" //for drv_getVerInfo(), drv_getBuildDate() +#include "IOCfg.h" //for USE_VIO +#include "SwTimer.h" + + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +#include "SxCmd.h" + +static BOOL Cmd_dx_lcd(CHAR *strCmd) +{ + DX_HANDLE devLCDObj = Dx_GetObject(DX_CLASS_DISPLAY_EXT | DX_TYPE_LCD); + return Dx_Command(devLCDObj, strCmd); +} + +static BOOL Cmd_dx_tv(CHAR *strCmd) +{ + DX_HANDLE devTVObj = Dx_GetObject(DX_CLASS_DISPLAY_EXT | DX_TYPE_TVOUT); + return Dx_Command(devTVObj, strCmd); +} +#if _TODO +static BOOL Cmd_dx_hdmi(CHAR *strCmd) +{ + DX_HANDLE devHDMIObj = Dx_GetObject(DX_CLASS_DISPLAY_EXT | DX_TYPE_HDMIOUT); + return Dx_Command(devHDMIObj, strCmd); +} +static BOOL Cmd_dx_lcd2(CHAR *strCmd) +{ + DX_HANDLE devLCD2Obj = Dx_GetObject(DX_CLASS_DISPLAY_EXT | DX_TYPE_LCD2); + return Dx_Command(devLCD2Obj, strCmd); +} +static BOOL Cmd_dx_snr1(CHAR *strCmd) +{ + switch (*strCmd) { +#if (USE_VIO == ENABLE) + case 'v': + if (!strncmp(strCmd, "vdet", 4)) { + char ts[10]; + UINT32 v1; + sscanf_s(strCmd, "%s %d", ts, &v1); //fix for CID 44011 + DBG_IND("v1 = %d\r\n", v1); + vio_setpin(VIO_SENSOR1_DET, v1); + return TRUE; + } + break; +#endif + } + return FALSE; +} +static BOOL Cmd_dx_snr2(CHAR *strCmd) +{ + switch (*strCmd) { +#if (USE_VIO == ENABLE) + case 'v': + if (!strncmp(strCmd, "vdet", 4)) { + char ts[10]; + UINT32 v1; + sscanf_s(strCmd, "%s %d", ts, &v1); //fix for CID 44012 + DBG_IND("v1 = %d\r\n", v1); + vio_setpin(VIO_SENSOR2_DET, v1); + return TRUE; + } + break; +#endif + } + return FALSE; +} +#endif +static BOOL Cmd_dx_aout(CHAR *strCmd) +{ + DX_HANDLE devAudObj = Dx_GetObject(DX_CLASS_AUDIO_EXT); + return Dx_Command(devAudObj, strCmd); +} + + +SXCMD_BEGIN(dx, "driver extern debug using") +SXCMD_ITEM("lcd %", Cmd_dx_lcd, "lcd relay command") +SXCMD_ITEM("tv %", Cmd_dx_tv, "tv relay command") +#if _TODO +SXCMD_ITEM("hdmi %", Cmd_dx_hdmi, "hdmi relay command") +SXCMD_ITEM("lcd2 %", Cmd_dx_lcd2, "lcd2 relay command") +SXCMD_ITEM("snr1 %", Cmd_dx_snr1, "sensor1 relay command") +SXCMD_ITEM("snr2 %", Cmd_dx_snr2, "sensor2 relay command") +#endif +SXCMD_ITEM("aout %", Cmd_dx_aout, "audio out relay command") +SXCMD_END() + + +static BOOL Cmd_drv_all(CHAR *Name) +{ + DBG_DUMP("@ITEM_BEGIN [%s]\r\n", Name); + + drv_begin_dump(); + + // CPU + drv_dumpCPUInfo(); + + // DRAM + drv_dumpDRAMInfo(); + +#if (!defined(_Disp_VIRTUAL_LCD1_OFF_) || !defined(_TV_OFF_)) + // IDE + drv_dumpIDEInfo(); +#endif + + // DSI + //drv_dumpDSIInfo(); + +#if (!defined(_CARD1_NONE_) || !defined(_CARD3_NONE_)) + // SDIO + drv_dumpSDIOInfo(); +#endif + +#if (!defined(_EMBMEM_NONE_)) && (!defined(_EMBMEM_UITRON_OFF_)) + // NAND + drv_dumpNANDInfo(); +#endif + +#if !defined(_USB1_OFF_) + // USB + drv_dumpUSBInfo(); +#endif + + // PWM + drv_dumpPWMInfo(); + +#if !defined(_AUDIO_OFF_) + // EAC + drv_dumpEACInfo(); +#endif + + // SIF + drv_dumpSIFInfo(); + + // SIE + drv_dumpSIEInfo(); + + // Sensor + drv_dumpSensorInfo(); + +#if !defined(_TV_OFF_) + // TV + drv_dumpTVInfo(); +#endif + + // PWBC + drv_dumpPWBCInfo(); + + // HDMI + //drv_dumpHDMIInfo(); + + // PLL + drv_dumpPllInfo(); + + // Misc + drv_dumpMISCInfo(); + + drv_end_dump(); + + DBG_DUMP("@ITEM_END\r\n"); + return TRUE; +} + + +static BOOL Cmd_drv_ide(CHAR *strCmd) +{ +#if (!defined(_Disp_VIRTUAL_LCD1_OFF_) || !defined(_TV_OFF_)) + idec_dumpInfo(0); +#endif + return TRUE; +} + +static BOOL Cmd_drv_pwm(CHAR *strCmd) +{ + pwm_dumpInfo(); + return TRUE; +} + + +SXCMD_BEGIN(drvdump, "Dump driver information") +SXCMD_ITEM("ide", Cmd_drv_ide, "Dump IDE") +SXCMD_ITEM("pwm", Cmd_drv_pwm, "Dump PWM") +SXCMD_ITEM("all", Cmd_drv_all, "Dump current status in any status") +SXCMD_END() + + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxDisplay_LCD.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxDisplay_LCD.c new file mode 100755 index 000000000..f52ed80ec --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxDisplay_LCD.c @@ -0,0 +1,739 @@ +#include "kwrap/type.h" +#include "Dx.h" +#include "DxCommon.h" +#include "DxDisplay.h" +#include "IOCfg.h" +#include "hdal.h" +#include "vendor_videoout.h" +#include "GxVideo.h" +#include "Utility/SwTimer.h" +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDisp +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +//EVB default is _Disp_IF8B_LCD1_PW35P00_HX8238D_ +#define LCD_MAX_W ALIGN_CEIL_16(320) //device w of DISP_LCDMODE_xxx, to support rotate, it must align to 16 +#define LCD_MAX_H ALIGN_CEIL_16(720) //device h of DISP_LCDMODE_xxx, to support rotate, it must align to 16 +#define LCD_ASPECT_W 3 +#define LCD_ASPECT_H 4 + +#define DISP_DUAL DISABLE + +#if !defined(_Disp_VIRTUAL_LCD1_OFF_) + +#define LCDMODE 0 + +//Configure +#define CFG_IDE_DMA_HIGH DISABLE //Enable will cause IPE bandwith not enough + +// Local Variables +static UINT32 g_LCDDout = 0; //current dout +static UINT32 g_LCDMode = 0; //current mode +static UINT32 g_LCDLastMode = 0; //current mode +static UINT32 g_LCDEnable = FALSE; //not yet enable +static UINT32 g_LCDSleep = FALSE; +#define DRVLCD_BRT_LEVEL_MAX 10 +#define DRVLCD_BRT_LEVEL_INIT 5 +static BOOL g_LCDBacklightEn = FALSE; +static INT32 g_LCDBacklightLvl = DRVLCD_BRT_LEVEL_INIT; + +static UINT32 g_LCDDual = FALSE; + +// LCD control object +static BOOL g_bLCDWaitTurnOnFinish = FALSE; + +static UINT32 g_localMode = 0; //new mode +static USIZE *pCurrentSize = 0; //return size + +//public func +static UINT32 DrvLCDGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +static UINT32 DrvLCDSetcfgs(UINT32 CfgID, UINT32 Param1); // Set Config Setting +static UINT32 DrvLCDInit(void *pInitParam); // Set Init Parameters +static UINT32 DrvLCDOpen(void); // Common Constructor +static UINT32 DrvLCDClose(void); // Common Destructor +static UINT32 DrvLCDState(UINT32 StateID, UINT32 Value); // General Properties +static UINT32 DrvLCDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +static UINT32 DrvLCDCommand(CHAR *pcCmdStr); //General Command Console + +//internal func +static void DrvLCD_TurnOn(void); +static void DrvLCD_TurnOn_WaitFinish(void); +static void DrvLCD_TurnOff(void); +static void DrvLCD_Dump(void); +static void DrvLCD_SleepEnter(void); +static void DrvLCD_SleepLeave(void); + +static void GPIOMap_TurnOnLCDBacklight(void); +static void GPIOMap_TurnOffLCDBacklight(void); +static void GPIOMap_SetLCDBacklightBrightLevel(INT32 uiLevel); +static void GPIOMap_AdjustLCDBacklight(UINT32 uiAdjValue); +static BOOL GPIOMap_IsLCDBacklightOn(void); +static void GPIOMap_DumpBacklight(void); + +static void GPIOMap_TurnOnLCDPower(void); +static void GPIOMap_TurnOffLCDPower(void); +static void GPIOMap_LCDReset(void); +//static BOOL GPIOMap_IsLCDPowerOn(void); + +//dx object +DX_OBJECT gDevLCD = { + DXFLAG_SIGN, + DX_CLASS_DISPLAY_EXT | DX_TYPE_LCD, + DISPLAY_VER, + "Display_LCD", + 0, 0, 0, 0, + DrvLCDGetcaps, + DrvLCDSetcfgs, + DrvLCDInit, + DrvLCDOpen, + DrvLCDClose, + DrvLCDState, + DrvLCDControl, + DrvLCDCommand, + 0, +}; + +static UINT32 DrvLCDGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID & 0x0000ffff) { + case DISPLAY_CAPS_BASE: + v = DISPLAY_BF_BACKLIGHT; + break; + case DISPLAY_CAPS_DEFMODE: + v = LCDMODE; + break; +#if 0 + case DISPLAY_CAPS_MODEINFO: { +// int mode = (CapID & 0xffff0000) >> 16; + ISIZE *pModeInfo = (ISIZE *)Param1; + #if 0 + _DrvLCDHookDout(g_LCDDout); + pDev->SEL.SET_LCDMODE.Mode = mode; + pObj->devCtrl(DISPDEV_SET_LCDMODE, pDev); + pDev->SEL.GET_PREDISPSIZE.DevID = DISPDEV_ID_PANEL; + pObj->devCtrl(DISPDEV_GET_PREDISPSIZE, pDev); + if (pModeInfo) { + pModeInfo->w = pDev->SEL.GET_PREDISPSIZE.uiBufWidth; + pModeInfo->h = pDev->SEL.GET_PREDISPSIZE.uiBufHeight; + } + #else + pModeInfo->w = 960; + pModeInfo->w = 240; + DBG_ERR("need porting\r\n"); + #endif + } + break; +#endif + case DISPLAY_CAPS_MAXSIZE: { + ISIZE *pSizeInfo = (ISIZE *)Param1; + if (pSizeInfo) { + pSizeInfo->w = LCD_MAX_W; + pSizeInfo->h = LCD_MAX_H; + } + } + break; + case DISPLAY_CAPS_ASPECT: { + ISIZE *pAspectInfo = (ISIZE *)Param1; + if (pAspectInfo) { + pAspectInfo->w = LCD_ASPECT_W; + pAspectInfo->h = LCD_ASPECT_H; + } + } + break; + default: + break; + } + return v; +} + +static UINT32 DrvLCDSetcfgs(UINT32 CfgID, UINT32 Param1) // Set Config Setting +{ + switch (CfgID) { + case DISPLAY_CFG_MODE: + DBG_IND("set mode %08x\r\n", Param1); + g_LCDLastMode = Param1; + break; + case DISPLAY_CFG_DOUT: + g_LCDDout = Param1; + break; + case DISPLAY_CFG_DUAL: + g_LCDDual = Param1; + break; + case DISPLAY_CFG_INFOBUF: + pCurrentSize = (USIZE *)Param1; + break; + default: + break; + } + return DX_OK; +} + +static UINT32 DrvLCDInit(void *pInitParam) // Set Init Parameters +{ + DBG_FUNC_BEGIN("\r\n"); + + g_LCDLastMode = DrvLCDGetcaps(DISPLAY_CAPS_DEFMODE, 0); + + return DX_OK; +} + +static UINT32 DrvLCDOpen(void) // Common Constructor +{ + DBG_FUNC_BEGIN("\r\n"); + +#if 0 + if (!_DrvLCDHookDout(g_LCDDout)) { + return DX_NOT_SUPPORT; + } +#endif + DBG_IND("LCD dout by IDE%d\r\n", g_LCDDout + 1); +#if 0 + //////////////////////////////////////////////////// + // LCD default use PLL2 for precisely CLK, but if enable dual, it can use PLL1. +#if (_FPGA_EMULATION_ == ENABLE) + pCtrl->SEL.SET_SRCCLK.SrcClk = DISPCTRL_SRCCLK_PLL6; + pObj->dispCtrl(DISPCTRL_SET_SRCCLK, pCtrl); +#else + if (g_LCDDual == FALSE) { + DBG_IND("^YLCD Dual=0\r\n"); + // NOTE: Our LCD device driver will always try to change PLL clock setting for its "target frame rate" + // Solution: select PLL1(fixed at 480Mhz) or PLL2(used by TV/HDMI) or PLL4(support SpreadSpectrum) + if (g_LCDDout == 0) { + pCtrl->SEL.SET_SRCCLK.SrcClk = DISPCTRL_SRCCLK_PLL6; + pObj->dispCtrl(DISPCTRL_SET_SRCCLK, pCtrl); + } + } else { + DBG_IND("^YLCD Dual=1\r\n"); + // NOTE: Under "Dual Display" condition, PLL2 clock must be fixed and reserved for TV/HDMI device! + // Solution: Do NOT select PLL2(used by TV/HDMI)! Just use PLL1(fixed at 480Mhz) or PLL4(support SpreadSpectrum) + if (g_LCDDout == 0) { + pCtrl->SEL.SET_SRCCLK.SrcClk = DISPCTRL_SRCCLK_PLL1; + pObj->dispCtrl(DISPCTRL_SET_SRCCLK, pCtrl); + } + } +#endif + //////////////////////////////////////////////////// + //Panel have 3 types: NORMAL(8BIT or PARAL),DSI(MIPI), MI(MEMORY-INTERFACE) + if (g_LCDDout == 0) { +#if (LCD_COMM_CTRL == LCD_COMM_BY_GPIO) + pDev->SEL.SET_REG_IF.LcdCtrl = DISPDEV_LCDCTRL_GPIO; + pDev->SEL.SET_REG_IF.uiSifCh = 0; + pDev->SEL.SET_REG_IF.uiGpioSen = GPIO_LCD_SIF_SEN; + pDev->SEL.SET_REG_IF.uiGpioClk = GPIO_LCD_SIF_SCK; + pDev->SEL.SET_REG_IF.uiGpioData = GPIO_LCD_SIF_SDA; + pObj->devCtrl(DISPDEV_SET_REG_IF, pDev); +#endif +#if (LCD_COMM_CTRL == LCD_COMM_BY_SIF) + pDev->SEL.SET_REG_IF.LcdCtrl = DISPDEV_LCDCTRL_SIF; + pDev->SEL.SET_REG_IF.uiSifCh = SIF_LCD_CH; + pDev->SEL.SET_REG_IF.uiGpioSen = 0; + pDev->SEL.SET_REG_IF.uiGpioClk = 0; + pDev->SEL.SET_REG_IF.uiGpioData = 0; + pObj->devCtrl(DISPDEV_SET_REG_IF, pDev); + //Configure SIF pins to default state + pad_setPullUpDown(PAD_LCD_SIF_SEN, DIR_LCD_SIF_SEN); + pad_setPullUpDown(PAD_LCD_SIF_SCK, DIR_LCD_SIF_SCK); + pad_setPullUpDown(PAD_LCD_SIF_SDA, DIR_LCD_SIF_SDA); +#endif + //pad_setDrivingSink(PAD_DS_LCD8, PAD_DRIVINGSINK_6MA); + } + + //////////////////////////////////////////////////// +#endif + + GPIOMap_TurnOnLCDPower(); + GPIOMap_LCDReset(); + + g_localMode = g_LCDLastMode; + DBG_IND("open mode %08x\r\n", g_localMode); + DrvLCD_TurnOn(); + + g_LCDEnable = TRUE; + + return DX_OK; +} + +static UINT32 DrvLCDClose(void) // Common Destructor +{ + DBG_FUNC_BEGIN("\r\n"); + + DrvLCD_TurnOff(); + + // Panel enter sleep mode + GPIOMap_TurnOffLCDPower(); + + g_LCDLastMode = g_LCDMode; + g_LCDMode = 0; + g_LCDEnable = FALSE; + + return DX_OK; +} + +static void DrvLCD_TurnOn(void) +{ + DBG_FUNC_BEGIN("\r\n"); + +#if 0 + // Turn on LCD power + if (g_localMode < DISPDEV_LCDMODE_NO_CHANGE) { //must be LCD + pDev->SEL.SET_LCDMODE.Mode = g_localMode; + pObj->devCtrl(DISPDEV_SET_LCDMODE, pDev); + /* + pDev->SEL.GET_PREDISPSIZE.DevID = DISPDEV_ID_PANEL; + pObj->devCtrl(DISPDEV_GET_PREDISPSIZE,pDev); + g_localSize.w = pDev->SEL.GET_PREDISPSIZE.uiBufWidth; + g_localSize.h = pDev->SEL.GET_PREDISPSIZE.uiBufHeight; + */ + } else { + DBG_ERR("mode=%d not support!\r\n", g_localMode); + return; + } + //IMPORTANT! for FAST BOOT, Photo App will ask disp size very early~ + //Update size of first mode (before open) + //DxDisplay_UpdateModeInfo(g_LCDDout<<4, g_localMode, &g_localSize); + + //LCD panel open + pDev->SEL.OPEN_DEVICE.DevID = DISPDEV_ID_PANEL; + pObj->devCtrl(DISPDEV_OPEN_DEVICE, pDev); + + ////////////////////////////////////////////////////////////////////// + // special operation for this project! + // + //pDev->SEL.SET_ROTATE.Rot = DISPDEV_LCD_ROTATE_180; + //pObj->devCtrl(DISPDEV_SET_ROTATE,pDev); + ////////////////////////////////////////////////////////////////////// + + pObj->devCtrl(DISPDEV_GET_DISPSIZE, pDev); + g_localSize.w = pDev->SEL.GET_DISPSIZE.uiBufWidth; + g_localSize.h = pDev->SEL.GET_DISPSIZE.uiBufHeight; + if (pCurrentSize) { + pCurrentSize[0] = g_localSize; + } +#endif + + g_LCDMode = g_localMode; +} + +static void DrvLCD_TurnOn_WaitFinish(void) +{ + DBG_FUNC_BEGIN("\r\n"); + + g_LCDEnable = TRUE; +} + + +static void DrvLCD_TurnOff(void) +{ + DBG_FUNC_BEGIN("\r\n"); + + //NOTE: VERY VERY VERY VERY VERY IMPORTANT!!!!! + //�W�h�n�T�OSleepEnter()��TurnOff()���|���Ƶo��!!! + //if DrvLCD_SleepEnter() is called ClosePanel, then here DrvLCD_TurnOff() also call ClosePanel again, + //=> it will cause sif_close() is call twice by LCD driver internal, + //=> then ALL sif_send() command of other devices will become abnormally!!! + //=> �i��{�H1: �y��CCD�L�kwakeup (TG�|�Ψ�sif) + //=> �i��{�H2: �y��CCD��X�a�Ӥ� (TG�|�Ψ�sif) +#if 0 + //LCD panel close + pObj->devCtrl(DISPDEV_CLOSE_DEVICE, NULL); +#endif + // Turn off LCD power + g_LCDEnable = FALSE; +} + +static void DrvLCD_SleepEnter(void) +{ + HD_RESULT ret =0 ; + HD_PATH_ID video_out_path = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_PATH); + + // LCD backlight + GPIOMap_TurnOffLCDBacklight(); + hd_videoout_stop(video_out_path); + ret = vendor_videoout_set(VENDOR_VIDEOOUT_ID0,VENDOR_VIDEOOUT_ITEM_ENTER_SLEEP,NULL); + if(ret!=HD_OK){ + DBG_ERR("ret %d\r\n", ret); + } + GPIOMap_LCDReset(); + + g_LCDSleep = TRUE; +} + +static void DrvLCD_SleepLeave(void) +{ + HD_RESULT ret =0 ; + HD_PATH_ID video_out_path = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_PATH); + HD_PATH_ID video_out_ctrl = GxVideo_GetDeviceCtrl(DOUT1,DISPLAY_DEVCTRL_CTRLPATH); + HD_FB_ENABLE video_out_enable={0}; + ret = vendor_videoout_set(VENDOR_VIDEOOUT_ID0,VENDOR_VIDEOOUT_ITEM_EXIT_SLEEP,NULL); + if(ret!=HD_OK){ + DBG_ERR("wake %d\r\n"); + } + hd_videoout_start(video_out_path); + video_out_enable.fb_id = HD_FB0; + video_out_enable.enable = 1; + ret = hd_videoout_set(video_out_ctrl, HD_VIDEOOUT_PARAM_FB_ENABLE, &video_out_enable); + if(ret!=HD_OK){ + DBG_ERR("fb enable %d\r\n", ret); + } + // LCD backlight + GPIOMap_TurnOnLCDBacklight(); + + g_LCDSleep = FALSE; +} + + +static UINT32 DrvLCDState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + DBG_IND("get %08x\r\n", StateID); + switch (StateID) { + case DRVDISP_STATE_ENBALE: + //lost device? ---> cannot determine enable or not + //under flow like: enable/disable + rvalue = g_LCDEnable; + break; + case DRVDISP_STATE_MODE: + //lost device? ---> cannot determine mode + //under flow like: change mode + rvalue = g_LCDMode; + break; + case DRVDISP_STATE_LASTMODE: + rvalue = g_LCDLastMode; + break; + case DRVDISP_STATE_SLEEP: + rvalue = g_LCDSleep; + break; + case DRVDISP_STATE_BACKLIGHT: + rvalue = GPIOMap_IsLCDBacklightOn() ? DRVDISP_BACKLIGHT_ON : DRVDISP_BACKLIGHT_OFF; + break; + case DRVDISP_STATE_BRIGHTLVL: + rvalue = g_LCDBacklightLvl; + break; + default: + DBG_WRN("get state=0x%02X not support!\r\n", StateID); + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("set %08x\r\n", StateID); + switch (StateID) { + case DRVDISP_STATE_BACKLIGHT: + if (Value == DRVDISP_BACKLIGHT_OFF) { + DBG_IND("DRVDISP_BACKLIGHT_OFF\r\n"); + GPIOMap_TurnOffLCDBacklight(); + } else { //if(value == DRVDISP_BACKLIGHT_ON) + DBG_IND("DRVDISP_BACKLIGHT_ON\r\n"); + GPIOMap_TurnOnLCDBacklight(); + } + break; + case DRVDISP_STATE_BRIGHTLVL: { + DBG_IND("DRVDISP_BRIGHTLVL=%d\r\n", Value); + GPIOMap_SetLCDBacklightBrightLevel((INT32)Value); + } + break; + case DRVDISP_STATE_DIRECT: + #if 0 //set direct by LCD driver! + if(pObj) { + ////////////////////////////////////////////////////////////////////// + // special operation for this project! + // + //if (Value == (0x01 | 0x02)) { + // pDev->SEL.SET_ROTATE.Rot = DISPDEV_LCD_ROTATE_180; + //} else { + // pDev->SEL.SET_ROTATE.Rot = DISPDEV_LCD_ROTATE_NONE; + //} + //pObj->devCtrl(DISPDEV_SET_ROTATE,pDev); + ////////////////////////////////////////////////////////////////////// + } + #endif + #if 0 //set direct by IDE! + //NOTE: project must set GxDisplay OSD1 layer's uiWinAttr = MIRROR_KEEP; + //NOTE: project must set VdoOut VDO1 layer's desc.degree = VDODISP_ROTATE_NO_HANDLE; + if(pObj) { + DISPLAYER_PARAM LyrParam; + memset(&LyrParam, 0, sizeof(DISPLAYER_PARAM)); + if (Value == (0x01 | 0x02)) { + LyrParam.SEL.SET_OUTDIR.BufOutDir = DISPOUTDIR_ROT_180; + } else { + LyrParam.SEL.SET_OUTDIR.BufOutDir = DISPOUTDIR_NORMAL; + } + pObj->dispLyrCtrl(DISPLAYER_OSD1, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress + pObj->dispLyrCtrl(DISPLAYER_OSD2, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress + pObj->dispLyrCtrl(DISPLAYER_VDO1, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress + pObj->dispLyrCtrl(DISPLAYER_VDO2, DISPLAYER_OP_SET_OUTDIR, &LyrParam); //it will call disp_translateBufAddress + pObj->load(TRUE); + } + #endif + break; + + default: + DBG_WRN("set state=0x%02X not support!\r\n", StateID); + break; + } + } + return DX_OK; +} + +static UINT32 DrvLCDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + DBG_IND("ctrl %08x\r\n", CtrlID); + + switch (CtrlID) { + case DRVDISP_CTRL_MODE: { + //DrvLCD_TurnOff(); + g_localMode = Param1; + //DrvLCD_TurnOn(); + //g_bLCDWaitTurnOnFinish = TRUE; + } + break; + case DRVDISP_CTRL_SLEEP: + if (Param1 == TRUE) { + DBG_IND("DRVDISP_CTRL_SLEEP 1\r\n"); + DrvLCD_SleepEnter(); + } else if (Param1 == FALSE) { + DBG_IND("DRVDISP_CTRL_SLEEP 0\r\n"); + DrvLCD_SleepLeave(); + } + break; + case DRVDISP_CTRL_WAITFINISH: + if (g_bLCDWaitTurnOnFinish == TRUE) { + DrvLCD_TurnOn_WaitFinish(); + g_bLCDWaitTurnOnFinish = FALSE; + } + break; + + default: + DBG_WRN("ctrl id=0x%02X not support!\r\n", CtrlID); + break; + } + return DX_OK; +} + +static UINT32 DrvLCDCommand(CHAR *pcCmdStr) //General Command Console +{ + switch (*pcCmdStr) { + case 'd': + if (!strncmp(pcCmdStr, "disp lcd dump", 13)) { + DrvLCD_Dump(); + return TRUE; + } + break; + } + return FALSE; +} + +static void DrvLCD_Dump(void) +{ + GPIOMap_DumpBacklight(); +} + + +//////////////////////////////////////////////////////////////////////////////// +// GPIO related +static void GPIOMap_LCDReset(void) +{ + // Reset LCD +#if 1 + gpio_setDir(GPIO_LCD_RESET, GPIO_DIR_OUTPUT); + gpio_setPin(GPIO_LCD_RESET); + SwTimer_DelayMs(10); + gpio_clearPin(GPIO_LCD_RESET); + SwTimer_DelayMs(10); + gpio_setPin(GPIO_LCD_RESET); +#elif defined(_Disp_IFDSI_LCD1_BPB5017BFW_ILI9806E_) + gpio_clearPin(GPIO_LCD_RESET); + SwTimer_DelayMs(10); + gpio_setPin(GPIO_LCD_RESET); +#endif +} + +/** + Turn on LCD power + + Turn on LCD power. + + @param void + @return void +*/ +static void GPIOMap_TurnOnLCDPower(void) +{ +} + +/** + Turn off LCD power + + Turn off LCD power. + + @param void + @return void +*/ +static void GPIOMap_TurnOffLCDPower(void) +{ + +} + +/** + Check whether LCD power is on or not + + Check whether LCD power is on or not. + Return TRUE if LCD power is on, return FALSE if LCD power is off. + + @param void + @return BOOL +*/ +//static BOOL GPIOMap_IsLCDPowerOn(void) +//{ +// return TRUE; +//} + +//////////////////////////////////////////////////////////////////////// + +//#NT#2009/12/15#Lincy Lin -begin +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) +static PWM_CFG g_LCDBacklightPWMInfo = {1, 60, 0, 60, 0, 0}; +static UINT32 g_LCDBacklightLvlPWMDuty[DRVLCD_BRT_LEVEL_MAX] = { + 59,//48,// level 0 + 44,// level 1 + 35,// level 2 + 28,// level 3 + 25,// level 4 + 22,// level 5 + 20,// level 6 + 18,// level 7 + 17,// level 8 + 5, //10 // level 9 +}; +#endif + + +/** + Turn on LCD backlight + + Turn on LCD backlight. + + @param void + @return void +*/ +static void GPIOMap_TurnOnLCDBacklight(void) +{ + DBG_IND("GPIOMap_TurnOnLCDBacklight: Adjust value %d\r\n", g_LCDBacklightLvl); + + if (g_LCDBacklightEn == FALSE) { +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) + g_LCDBacklightPWMInfo.uiRise = g_LCDBacklightLvlPWMDuty[g_LCDBacklightLvl]; + DBG_IND("PWM: rise=%d\r\n", g_LCDBacklightPWMInfo.uiRise); + pwm_open(PWMID_LCD_BLG_PCTL); + pwm_pwmConfig(PWMID_LCD_BLG_PCTL, &g_LCDBacklightPWMInfo); + pwm_pwmEnable(PWMID_LCD_BLG_PCTL); +#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO) + gpio_setPin(GPIO_LCD_BLG_PCTL); +#else + DrvLCD_TurnOn(); + DrvLCD_TurnOn_WaitFinish(); +#endif + g_LCDBacklightEn = TRUE; + } +} + +static void GPIOMap_SetLCDBacklightBrightLevel(INT32 uiLevel) +{ + g_LCDBacklightLvl = uiLevel; + if (g_LCDBacklightLvl < 0) { + DBG_WRN("DrvLCDSetCtrl Warning! brightlvl=0x%02X out of range\r\n", g_LCDBacklightLvl); + g_LCDBacklightLvl = 0; + } + if (g_LCDBacklightLvl >= DRVLCD_BRT_LEVEL_MAX) { + DBG_WRN("DrvLCDSetCtrl Warning! brightlvl=0x%02X out of range\r\n", g_LCDBacklightLvl); + g_LCDBacklightLvl = DRVLCD_BRT_LEVEL_MAX - 1; + } + + if (!g_LCDBacklightEn) { + return; + } + + GPIOMap_AdjustLCDBacklight(g_LCDBacklightLvl); +} + +/** + Turn off LCD backlight + + Turn off LCD backlight. + + @param void + @return void +*/ +static void GPIOMap_TurnOffLCDBacklight(void) +{ + DBG_IND("GPIOMap_TurnOffLCDBacklight: Adjust value %d\r\n", g_LCDBacklightLvl); + + if (g_LCDBacklightEn == TRUE) { +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) + pwm_pwmDisable(PWMID_LCD_BLG_PCTL); + pwm_close(PWMID_BLG_PCTL, TRUE); +#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO) + gpio_clearPin(GPIO_LCD_BLG_PCTL); +#else + DrvLCD_TurnOff(); +#endif + g_LCDBacklightEn = FALSE; + } +} + +/** + Adjust LCD backlight level + + Adjust LCD backlight level. + + @param UINT32 uiAdjValue + @return void +*/ +static void GPIOMap_AdjustLCDBacklight(UINT32 uiAdjValue) +{ + DBG_IND("GPIOMap_AdjustLCDBacklight: Adjust value %d\r\n", uiAdjValue); + + /* Re-start PWM */ + if (g_LCDBacklightEn) { +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) + g_LCDBacklightPWMInfo.uiRise = g_LCDBacklightLvlPWMDuty[g_LCDBacklightLvl]; + DBG_IND("PWM: rise=%d\r\n", g_LCDBacklightPWMInfo.uiRise); + pwm_pwmDisable(PWMID_LCD_BLG_PCTL); + pwm_pwmConfig(PWMID_LCD_BLG_PCTL, &g_LCDBacklightPWMInfo); + pwm_pwmEnable(PWMID_LCD_BLG_PCTL); +#endif + } +} + +/** + Check whether LCD backlight is on or not + + Check whether LCD backlight is on or not. + Return TRUE if LCD backlight is on, return FALSE if LCD backlight is off. + + @param void + @return BOOL +*/ +static BOOL GPIOMap_IsLCDBacklightOn(void) +{ + return g_LCDBacklightEn; +} + +static void GPIOMap_DumpBacklight(void) +{ +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) + DBG_DUMP("BACKLIGHT clk :\t\t%d MHz\r\n", 48 / (g_LCDBacklightPWMInfo.uiDiv + 1)); + DBG_DUMP("BACKLIGHT Duty :\t%d %\r\n", (g_LCDBacklightPWMInfo.uiFall - g_LCDBacklightPWMInfo.uiRise) * 100 / g_LCDBacklightPWMInfo.uiPrd); +#endif +} + +#endif + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxHunting.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxHunting.c new file mode 100755 index 000000000..dee40df9c --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxHunting.c @@ -0,0 +1,516 @@ +/** + Copyright Novatek Microelectronics Corp. 2019. All rights reserved. + + @file DxHunting.c + @ingroup mIPRJAPKeyIO + + @brief Scan key, modedial + Scan key, modedial + + @note Nothing. + + @date 2019/06/11 +*/ + +/** \addtogroup mIPRJAPKeyIO */ +//@{ + +#include "DxCfg.h" +#include "IOCfg.h" +#include "DxHunting.h" +#include "kwrap/type.h" +#include +#include "modelext_info.h" +#include "DrvExt.h" +#include "PrjInc.h" +#if HUNTING_CAMERA_MCU == ENABLE +#include +#include "sys_fastboot.h" +#endif + +#define IRLED_CTRL_BY_PWM ENABLE//DISABLE// +#define IRLED_PWMID PWMID_3 /* P_GPIO3 */ +#include "pwm.h" +#include "flow_preview.h" +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxHunting +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// +static UINT8 IsNightLedOn = 0; + +static UINT32 g_uiWorkMode = 0; +static UINT32 g_uiBootMode = DX_HUNTING_MODE_PHOTO_MOVIE; +static VK_TASK_HANDLE g_handle_ir_cut = 0; +#define FLG_IR_CUT_IN FLGPTN_BIT(0) // +#define FLG_IR_CUT_ON FLGPTN_BIT(1) // +#define FLG_IR_CUT_OFF FLGPTN_BIT(2) // + +void DrvGPIO_MicroController_PwrOff(void) +{ + #if 0 + gpio_setPin(GPIO_MCU_CORT); + gpio_clearPin(GPIO_MCU_SCL); + gpio_clearPin(GPIO_MCU_SDA); + Delay_DelayMs(10); + #endif +} + +/** + get the hardware work mode + + + @param void + @return BOOL: +*/ +/*------------------------*/ +// SET(P_GPIO_49) OFF(P_GPIO_48) +// 0 0 ==> OFF +// 0 1 ==> undefine +// 1 0 ==> on (monitor mode) +// 1 1 ==> setup (normal mode) +/** + Get hunting working mode + + @param void + @return UINT32: level3 +*/ +UINT32 DrvGPIO_GetHuntingWorkMode(void) +{ +#if 1 + UINT32 level1 = 0; + UINT32 level2 = 0; + UINT32 uiWorkMode = 0; + + //level1 = (gpio_getPin(GPIO_SET_DET) == 0) ? FALSE : TRUE; + //level2 = (gpio_getPin(GPIO_OFF_DET) == 0) ? FALSE : TRUE; + + uiWorkMode = (level1<<1)|level2; + switch (uiWorkMode) + { + case 0: + g_uiWorkMode = HUNTING_OFF_MODE; + break; + case 1: + break; + case 2: + g_uiWorkMode = HUNTING_MONITOR_MODE; + break; + case 3: + g_uiWorkMode = HUNTING_NORMAL_MODE; + break; + default: + g_uiWorkMode = HUNTING_NORMAL_MODE; + break; + } + +#else + g_uiWorkMode = HUNTING_NORMAL_MODE; + + BOOL bIsFastBoot; + MODELEXT_HEADER *head = NULL; + BININFO *pBinInfo = (BININFO *)Dx_GetModelExtCfg(MODELEXT_TYPE_BIN_INFO, &head); + + if (pBinInfo == NULL) { + DBG_ERR("pBinInfo is NULL\r\n"); + return FALSE; + } + + bIsFastBoot = (pBinInfo->ld.LdCtrl2 & LDCF_FASTBOOT) ? TRUE : FALSE; + + if (bIsFastBoot) { + g_uiWorkMode = HUNTING_MONITOR_MODE; + } +#endif + + //return g_uiWorkMode; + return HUNTING_MONITOR_MODE; +} + +void DrvGPIO_SetPhotoMovieModeFromMonitor(UINT32 u32PhotoMovieMode) +{ + g_uiBootMode = u32PhotoMovieMode; +} + +UINT32 DrvGPIO_GetPhotoMovieModeFromMonitor(void) +{ + static BOOL first_entry = TRUE; + + if(first_entry == TRUE){ + + VOS_TICK t1, t2; + + first_entry = FALSE; + +#if HUNTING_CAMERA_MCU == ENABLE + + //int ret = 1; + UINT8 value; + UIMenuStoreInfo *puiPara = sf_ui_para_get(); + + if(gpio_getIntStatus(GPIO_INT_USBPLUGIN) || FALSE == (gpio_getPin(GPIO_CARD_DETECT) == 0 ? TRUE : FALSE)) + { + g_uiBootMode = DX_HUNTING_MODE_OTHER; + Save_MenuInfo(); + return g_uiBootMode; + } + vos_perf_mark(&t1); + // ret = sf_mod_init(); + // printf("%s:%d ret:%d\n", __FUNCTION__, __LINE__,ret); + value = sf_get_power_on_mode(); + //sf_mcu_power_on_para_get(SF_MCU_POWERON); + //sf_mcu_wdg_set(5); + //sf_mcu_reg_set(SF_MCU_CTRL_MODULE_PIR, 1); + switch(value) + { + case PWR_OFF: + printf("%s:%d\n", __FUNCTION__, __LINE__); + sf_set_power_off_flag(APP_POWER_OFF_BATT_EMPTY); + flow_preview_set_stop_flag(TRUE); + //sf_mcu_reg_set(SF_MCU_POWEROFF,0); + g_uiBootMode = DX_HUNTING_MODE_OTHER; + printf("%s:%d\n", __FUNCTION__, __LINE__); + break; + case PWR_ON_SETUP: + #if SF_IQ_TEST == DISABLE + case PWR_ON_AUTO: + //fastboot_msg_en(ENABLE); + //Delay_DelayMs(300); + case PWR_ON_SMS: + case PWR_ON_DAILY_REPORT: + case PWR_ON_GPRS_INIT://A + case PWR_ON_TIME_SYNC://B + case PWR_ON_TIME_SEND: + #endif + Save_MenuInfo(); + g_uiBootMode = DX_HUNTING_MODE_OTHER; + break; + + /*case 3: + g_uiBootMode = DX_HUNTING_MODE_PHOTO; + break; + + case 5: + g_uiBootMode = DX_HUNTING_MODE_MOVIE; + break; + + case 1: + g_uiBootMode = DX_HUNTING_MODE_OTHER; + break*/; + + default: + + if(SF_CAM_MODE_PHOTO == puiPara->CamMode) + { + g_uiBootMode = DX_HUNTING_MODE_PHOTO; + } + else if(SF_CAM_MODE_VIDEO == puiPara->CamMode) + { + g_uiBootMode = DX_HUNTING_MODE_MOVIE; + } + else + { + g_uiBootMode = DX_HUNTING_MODE_PHOTO_MOVIE; + } + break; + } + printf("%s:%d CamMode:%lu DebugMode:%lu\n", __FUNCTION__, __LINE__,puiPara->CamMode,puiPara->DebugMode); + +#else +// UINT8 bit0 = 0; +// UINT8 bit1 = 0; +// +// bit0 = (gpio_getPin(GPIO_KEY_UP) == 0) ? 1 : 0; +// bit1 = (((gpio_getPin(GPIO_KEY_DOWN) == 0) ? 1 : 0) << 1); +// +// value = (bit1 | bit0); +// +// switch(value) +// { +// case 0: +// g_uiBootMode = DX_HUNTING_MODE_PHOTO_MOVIE; +// break; +// +// case 1: +// g_uiBootMode = DX_HUNTING_MODE_PHOTO; +// break; +// +// case 2: +// g_uiBootMode = DX_HUNTING_MODE_MOVIE; +// break; +// +// case 3: +// g_uiBootMode = DX_HUNTING_MODE_OTHER; +// break; +// +// } + + g_uiBootMode = DX_HUNTING_MODE_PHOTO_MOVIE; +#endif + + vos_perf_mark(&t2); + + DBG_DUMP("********** first_entry = %lu\n", vos_perf_duration(t1, t2)); + } + + return g_uiBootMode; +} + + +void DrvGOIO_Turn_Onoff_IRCUT(UINT8 onoff) +{ + static UINT32 ir_flag = 1; + static UINT32 ir_flag_on = 1; + static UINT32 ir_flag_off = 1; + printf("[%s:%d]s onoff:%d\n",__FUNCTION__,__LINE__,onoff); + + if(ir_flag) + { + gpio_setDir(GPIO_IRCUT_MEN1, GPIO_DIR_OUTPUT); + gpio_setDir(GPIO_IRCUT_MEN2, GPIO_DIR_OUTPUT); + ir_flag = 0; + } + + if((onoff == 1) && (ir_flag_on == 1)){//Just open it once. night + gpio_setPin(GPIO_IRCUT_MEN1); + gpio_clearPin(GPIO_IRCUT_MEN2); + sf_ir_cut_ctrl_PowerOff(); + ir_flag_off = 1; + ir_flag_on = 0; + }else if((onoff == 0) && (ir_flag_off == 1)){//Just open it once. + gpio_setPin(GPIO_IRCUT_MEN2); + gpio_clearPin(GPIO_IRCUT_MEN1); + sf_ir_cut_ctrl_PowerOff(); + ir_flag_off = 0; + ir_flag_on = 1; + }else if(onoff == 2){ + gpio_clearPin(GPIO_IRCUT_MEN1); + gpio_clearPin(GPIO_IRCUT_MEN2); + }else{ + printf("[%s:%d] on off\n",__FUNCTION__,__LINE__); + } + //DBG_DUMP("\r\n DrvGPIO_SetIRCut value:%d \r\n",onoff); + //Delay_DelayMs(20); + //gpio_clearPin(GPIO_IRCUT_MEN1); + //gpio_clearPin(GPIO_IRCUT_MEN2); + printf("[%s:%d]e\n",__FUNCTION__,__LINE__); +} + + +void DrvGPIO_IRLed_Turn_Onoff(BOOL onoff) +{ + #if IRLED_CTRL_BY_PWM == ENABLE + printf("[%s:%d]s onoff:%d\n",__FUNCTION__,__LINE__,onoff); + + PWM_CFG pwm_cfg = { + .ui_prd = 100, + .ui_rise = 0, + .ui_fall = 100, + .ui_on_cycle = 0, + .ui_inv = 0 + }; + static UINT32 ir_flag = 1; + + if(ir_flag) + { + //CHKPNT; + pwm_open(IRLED_PWMID); + + ir_flag = 0; + } + if (onoff ==1) + { + //CHKPNT; + pwm_pwm_config(IRLED_PWMID, &pwm_cfg); + //CHKPNT; + pwm_pwm_enable(IRLED_PWMID); + CHKPNT; + //printf("%s:%d e\n", __FUNCTION__, __LINE__); + } + else + { + //CHKPNT; + pwm_pwm_disable(IRLED_PWMID); + //CHKPNT; + //pwm_close(IRLED_PWMID, TRUE); + CHKPNT; + //printf("%s:%d e\n", __FUNCTION__, __LINE__); + } + #else + gpio_setDir(GPIO_IR_LED_PWR, GPIO_DIR_OUTPUT); + if (onoff ==1) + { + gpio_setPin(GPIO_IR_LED_PWR); + } + else + { + gpio_clearPin(GPIO_IR_LED_PWR); + } + #endif +} + +/************************************************* + Function: IrCutCtrlThreadTask + Description: receive event and set ir cut power off + Input: N/A + Output: N/A + Return: N/A + Others: N/A +*************************************************/ + +THREAD_RETTYPE IrCutCtrlThread(void *arg) +{ + THREAD_ENTRY(); + + Delay_DelayMs(80); + DrvGOIO_Turn_Onoff_IRCUT(2); //IR CUT power off + //DBG_DUMP("\r\n [%s:%d] s3 \r\n",__FUNCTION__,__LINE__); + + g_handle_ir_cut = 0; + THREAD_RETURN(0); +} + +/************************************************* + Function: IrCutCtrlThreadInit + Description: init thread + Input: N/A + Output: N/A + Return: N/A + Others: N/A +*************************************************/ +static void IrCutCtrlThreadInit(void) +{ + //DBG_DUMP("\r\n [%s:%d] s \r\n",__FUNCTION__,__LINE__); + + g_handle_ir_cut = vos_task_create(IrCutCtrlThread, NULL, "IrCutCtrlThread", 18, 2048); + if(!g_handle_ir_cut){ + DBG_ERR("[ERROR] IR CUT thread creat failed!\r\n"); + Delay_DelayMs(80); + DrvGOIO_Turn_Onoff_IRCUT(2); + return ; + } + else + vos_task_resume(g_handle_ir_cut); + //DBG_DUMP("\r\n [%s:%d] e g_handle_ir_cut:%d\r\n",__FUNCTION__,__LINE__,g_handle_ir_cut); +} + +/************************************************* + Function: sf_ir_cut_ctrl_PowerOff + Description: init and set event flag + Input: N/A + Output: N/A + Return: N/A + Others: N/A +*************************************************/ +void sf_ir_cut_ctrl_PowerOff(void) +{ + //DBG_DUMP("\r\n [%s:%d] s \r\n",__FUNCTION__,__LINE__); + if(g_handle_ir_cut == 0) + { + IrCutCtrlThreadInit(); + } + //DBG_DUMP("\r\n [%s:%d] e \r\n",__FUNCTION__,__LINE__); +} + + + +/************************************************* + Function: sf_ir_led_set + Description: IR LED luminance control + Input: mode: 1:on 0:off ; + Output: N/A + Return: N/A + Others: N/A +*************************************************/ +void sf_ir_led_set(UINT8 mode, UINT8 flashLed, UINT8 stillExp, UINT8 isSnapVideo) +{ + printf("[%s:%d]s mode:%d,flashLed:%d,isSnapVideo:%d\n",__FUNCTION__,__LINE__,mode,flashLed, isSnapVideo); + +#if SF_HW_TEST == ENABLE + return ; +#endif + PWM_CFG pwm_cfg = { + .ui_prd = 100, + .ui_rise = 0, + .ui_fall = 100, + .ui_on_cycle = 0, + .ui_inv = 0 + }; + static UINT32 ir_flag = 1; + UINT32 ui_rise = 0; ///< Rising at which clock + if(ir_flag) + { + //CHKPNT; + pwm_open(IRLED_PWMID); + ir_flag = 0; + } + + if(mode) + { + #if HUNTING_IR_LED_940 == ENABLE + if(isSnapVideo) + { + if(flashLed == 0) + { + ui_rise = 30;//70% + } + else + { + ui_rise = 60;//40% + } + } + else + { + if(flashLed == 0) + { + ui_rise = 15;//85% + } + else + { + ui_rise = 55;//45% + } + } + #else + + //530，850ç¯ å¾…æœºç”µæµ120 å¼€ç¯pic800（25） video680（35） + if(isSnapVideo) + { + if(flashLed == 0) + { + ui_rise = 35;//65% + } + else + { + ui_rise = 65;//35% + } + } + else + { + if(flashLed == 0) + { + ui_rise = 25;//75% + } + else + { + ui_rise = 60;//40% + } + } + #endif + + + pwm_cfg.ui_rise = ui_rise; + pwm_pwm_config_clock_div(PWM0_3_CLKDIV, 14);//pwm clk = 120M/clk div+1/period + pwm_pwm_config(IRLED_PWMID, &pwm_cfg); + pwm_pwm_enable(IRLED_PWMID); + + IsNightLedOn = 1; + } + else + { + //sf_pwm_set(IR_LED_1, 0, 100, 100, 0); + pwm_pwm_disable(IRLED_PWMID); + IsNightLedOn = 0; + } +} + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxInput_Key.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxInput_Key.c new file mode 100755 index 000000000..8f5b82909 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxInput_Key.c @@ -0,0 +1,248 @@ +/** + Copyright Novatek Microelectronics Corp. 2009. All rights reserved. + + @file DetKey.c + @ingroup mIPRJAPKeyIO + + @brief Scan key, modedial + Scan key, modedial + + @note Nothing. + + @date 2017/05/02 +*/ + +/** \addtogroup mIPRJAPKeyIO */ +//@{ + +#include "DxCfg.h" +#include "IOCfg.h" +#include "DxInput.h" +#include "KeyDef.h" +#include "comm/hwclock.h" +#include "comm/hwpower.h" +#if 0 +#include "rtc.h" +#include "Delay.h" +#endif +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxKey +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// ADC related +//////////////////////////////////////////////////////////////////////////////// +#if (ADC_KEY == ENABLE) +#define VOLDET_KEY_ADC_LVL1 (251) +#define VOLDET_KEY_ADC_LVL2 (155) +#define VOLDET_KEY_ADC_LVL3 (51) +#define VOLDET_KEY_ADC_TH (460) +#define VOLDET_KEY_ADC_LVL4 (358) + +#define VOLDET_KEY_LVL_UNKNOWN 0xFFFFFFFF +#define VOLDET_KEY_LVL_0 0 +#define VOLDET_KEY_LVL_1 1 +#define VOLDET_KEY_LVL_2 2 +#define VOLDET_KEY_LVL_3 3 +#define VOLDET_KEY_LVL_4 4 +#define VOLDET_KEY_LVL_5 5 +#endif +#if (ADC_KEY == ENABLE) +static UINT32 VolDet_GetKey1ADC(void) +{ +#if (VOLDET_ADC_CONT_MODE == DISABLE) + UINT32 uiADCValue; + + uiADCValue = adc_readData(ADC_CH_VOLDET_KEY1); + // One-Shot Mode, trigger one-shot + adc_triggerOneShot(ADC_CH_VOLDET_KEY1); + + return uiADCValue; +#else + return adc_readData(ADC_CH_VOLDET_KEY1); +#endif +} +/** + Get ADC key voltage level + + Get ADC key 2 voltage level. + + @param void + @return UINT32 key level, refer to VoltageDet.h -> VOLDET_MS_LVL_XXXX +*/ +static UINT32 VolDet_GetKey1Level(void) +{ + static UINT32 uiRetKey1Lvl; + UINT32 uiKey1ADC, uiCurKey2Lvl; + + uiKey1ADC = VolDet_GetKey1ADC(); + DBG_IND("uiKey1ADC %d \r\n", uiKey1ADC); + if (uiKey1ADC < VOLDET_KEY_ADC_TH) { + if (uiKey1ADC < VOLDET_KEY_ADC_LVL3) { + uiCurKey2Lvl = VOLDET_KEY_LVL_4; + } else if (uiKey1ADC < VOLDET_KEY_ADC_LVL2) { + uiCurKey2Lvl = VOLDET_KEY_LVL_3; + } else if (uiKey1ADC < VOLDET_KEY_ADC_LVL1) { + uiCurKey2Lvl = VOLDET_KEY_LVL_2; + } else if (uiKey1ADC < VOLDET_KEY_ADC_LVL4) { + uiCurKey2Lvl = VOLDET_KEY_LVL_1; + } else { + uiCurKey2Lvl = VOLDET_KEY_LVL_0; + } + } else { + uiCurKey2Lvl = VOLDET_KEY_LVL_UNKNOWN; + } + + uiRetKey1Lvl = uiCurKey2Lvl; + + return uiRetKey1Lvl; +} + +/** + Detect Mode Switch state. + + Detect Mode Switch state. + + @param void + @return UINT32 Mode Switch state (DSC Mode) +*/ +#endif + +//////////////////////////////////////////////////////////////////////////////// +// GPIO related + +//static BOOL g_bIsShutter2Pressed = FALSE; + +/** + Delay between toggle GPIO pin of input/output + + Delay between toggle GPIO pin of input/output + + @param void + @return void +*/ +static void DrvKey_DetKeyDelay(void) +{ + gpio_readData(0); + gpio_readData(0); + gpio_readData(0); + gpio_readData(0); +} + +void DrvKey_Init(void) +{ +} +/** + Detect normal key is pressed or not. + + Detect normal key is pressed or not. + Return key pressed status (refer to KeyDef.h) + + @param void + @return UINT32 +*/ +UINT32 DrvKey_DetNormalKey(void) +{ + UINT32 uiKeyCode = 0; + +#if (ADC_KEY == ENABLE) + UINT32 uiKey1Lvl = VolDet_GetKey1Level(); + switch (uiKey1Lvl) { + case VOLDET_KEY_LVL_UNKNOWN: + default: + break; + case VOLDET_KEY_LVL_0: + uiKeyCode |= FLGKEY_RIGHT; + break; + case VOLDET_KEY_LVL_1: + uiKeyCode |= FLGKEY_DOWN; + break; + case VOLDET_KEY_LVL_2: + uiKeyCode |= FLGKEY_SHUTTER2; + break; + case VOLDET_KEY_LVL_3: + uiKeyCode |= FLGKEY_UP; + break; + case VOLDET_KEY_LVL_4: + uiKeyCode |= FLGKEY_ENTER; + break; + } +#endif + + +#if (GPIO_KEY == ENABLE) + if (!gpio_getPin(GPIO_KEY_LEFT)) { + uiKeyCode |= FLGKEY_SHUTTER2; + } + if (!gpio_getPin(GPIO_KEY_UP)) { + uiKeyCode |= FLGKEY_UP; + } + if (!gpio_getPin(GPIO_KEY_DOWN)) { + uiKeyCode |= FLGKEY_DOWN; + } + if (!gpio_getPin(GPIO_KEY_ENTER)) { + uiKeyCode |= FLGKEY_RIGHT; + } +#endif + /* + //detect if power-on by press playback key + if (!hwpower_get_power_key(POWER_ID_PSW2)) + { + uiKeyCode |= FLGKEY_PLAYBACK; + } + */ + DBG_IND("KEY=%08x\r\n", uiKeyCode); + + DrvKey_DetKeyDelay(); + return uiKeyCode; +} +/** + Detect power key is pressed or not. + + Detect power key is pressed or not. + Return key pressed status (refer to KeyDef.h) + + @param void + @return UINT32 +*/ +UINT32 DrvKey_DetPowerKey(void) +{ + UINT32 uiKeyCode = 0; + +// if (hwpower_get_power_key(POWER_ID_PSW1)) { +// uiKeyCode = FLGKEY_KEY_POWER; +// // Reset shutdown timer +// hwpower_set_power_key(POWER_ID_PSW1, 0xf0); +// +// } + + return uiKeyCode; +} +UINT32 DrvKey_DetStatusKey(DX_STATUS_KEY_GROUP KeyGroup) +{ + UINT32 uiReturn = STATUS_KEY_LVL_UNKNOWN; + switch (KeyGroup) { + case DX_STATUS_KEY_GROUP1: + break; + + case DX_STATUS_KEY_GROUP2: + break; + + case DX_STATUS_KEY_GROUP3: + break; + + case DX_STATUS_KEY_GROUP4: + break; + + case DX_STATUS_KEY_GROUP5: + break; + + default: + DBG_ERR("[StatusKey]no this attribute"); + break; + } + return uiReturn; +} diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxOutput_LED.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxOutput_LED.c new file mode 100755 index 000000000..01d05659b --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxOutput_LED.c @@ -0,0 +1,529 @@ +/** + Copyright Novatek Microelectronics Corp. 2005. All rights reserved. + + @file DetLED.c + @ingroup mIPRJAPKeyIO + + @brief Control LED on/off + Control LED on/off/toggle + + @note Nothing. + + @date 2005/12/15 +*/ + +/** \addtogroup mIPRJAPKeyIO */ +//@{ + +#include "DxCfg.h" +#include "IOCfg.h" + +#include "DxOutput.h" +#include "DxCommon.h" +#include "DxApi.h" + +#if defined(_MCU_ENABLE_) +#if ((LED_FOCUS_CTRL == LED_RED_BY_MCU)||(LED_FOCUS_CTRL == LED_GREEN_BY_MCU)) +#include "MCUCtrl.h" +#endif +#endif + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +//#NT#set FCS LED brightness level +UINT32 FcsLedLvl = LCSBRT_LVL_03; +UINT32 FcsLedPrdVal[LCSBRT_LVL_SETTING_MAX] = { + 14, + 15, + 16, + 17, + 18, + 19, + 20 +}; + +//////////////////////////////////////////////////////////////////////////////// +// GPIO related + +/** + Turn on LED + + Turn on LED. + + @param UINT32 uiLED: Which LED, could be the following + GPIOMAP_LED_GREEN + GPIOMAP_LED_RED + GPIOMAP_LED_FCS //FOCUS + @return void +*/ +void LED_TurnOnLED(UINT32 uiLED) +{ + + DBG_IND("LED_TurnOnLED %d\r\n", uiLED); + switch (uiLED) { + case GPIOMAP_LED_GREEN: +#if (LED_GREEN_CTRL == LED_GREEN_BY_GPIO) + gpio_setPin(GPIO_GREEN_LED); +#endif + break; + + case GPIOMAP_LED_RED: +#if (LED_RED_CTRL == LED_RED_BY_GPIO) + gpio_setPin(GPIO_RED_LED); +#endif + break; + + case GPIOMAP_LED_FCS: +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_GPIO) + gpio_setPin(GPIO_FOCUS_LED); +#endif +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_PWM) + { + //set FOCUS LED brightness level + PWM_CFG PWMInfo; + if (pwm_open(PWMID_FOCUS_LED) != E_OK) { + pwm_stop(PWMID_FOCUS_LED); + pwm_close(PWMID_FOCUS_LED, TRUE); + pwm_open(PWMID_FOCUS_LED); + } + PWMInfo.uiDiv = 220; + PWMInfo.uiPrd = 22; + PWMInfo.uiFall = FcsLedPrdVal[FcsLedLvl]; + PWMInfo.uiOnCycle = 0; + PWMInfo.uiInv = 0; + PWMInfo.uiRise = 0; + pwm_set(PWMID_FOCUS_LED, &PWMInfo); + pwm_reload(PWMID_FOCUS_LED); + } +#endif + + default: + break; + } +} + +/** + Turn off LED + + Turn off LED. + + @param UINT32 uiLED: Which LED, could be the following + GPIOMAP_LED_GREEN + GPIOMAP_LED_RED + GPIOMAP_LED_FCS + @return void +*/ +void LED_TurnOffLED(UINT32 uiLED) +{ + DBG_IND("LED_TurnOffLED %d\r\n", uiLED); + switch (uiLED) { + case GPIOMAP_LED_GREEN: +#if (LED_GREEN_CTRL == LED_GREEN_BY_GPIO) + gpio_clearPin(GPIO_GREEN_LED); +#endif + break; + + case GPIOMAP_LED_RED: +#if (LED_RED_CTRL == LED_RED_BY_GPIO) + gpio_clearPin(GPIO_RED_LED); +#endif + break; + + case GPIOMAP_LED_FCS: +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_GPIO) + gpio_clearPin(GPIO_FOCUS_LED); +#endif +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_PWM) + { + //set FOCUS LED brightness level + PWM_CFG PWMInfo; + PWMInfo.uiDiv = 220; + PWMInfo.uiPrd = 0; + PWMInfo.uiFall = 0; + PWMInfo.uiOnCycle = 0; + PWMInfo.uiInv = 0; + PWMInfo.uiRise = 0; + pwm_set(PWMID_FOCUS_LED, &PWMInfo); + pwm_reload(PWMID_FOCUS_LED); + } +#endif + default: + break; + } +} + +/** + Check whether LED is on or not + + Check whether LED is on or not. + Return TRUE if LED is on, return FALSE if LED is off. + + @param UINT32 uiLED: Which LED, could be the following + GPIOMAP_LED_GREEN + GPIOMAP_LED_RED + GPIOMAP_LED_FCS + @return BOOL +*/ +BOOL LED_IsLEDOn(UINT32 uiLED) +{ + BOOL bvalue = FALSE; + DBG_IND("LED_IsLEDOn %d\r\n", uiLED); + switch (uiLED) { + case GPIOMAP_LED_GREEN: +#if (LED_GREEN_CTRL == LED_GREEN_BY_GPIO) + bvalue = gpio_getPin(GPIO_GREEN_LED); +#endif + break; + case GPIOMAP_LED_RED: +#if (LED_RED_CTRL == LED_RED_BY_GPIO) + bvalue = gpio_getPin(GPIO_RED_LED); +#endif + break; + case GPIOMAP_LED_FCS: +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_GPIO) + bvalue = gpio_getPin(GPIO_FOCUS_LED); +#endif + break; + default: + bvalue = FALSE; + break; + } + return bvalue; +} + +//set FCS LED brightness level +void LED_SetFcsLevel(UINT32 uiLevel) +{ +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_PWM) + FcsLedLvl = uiLevel; +#endif +} + +/////////////////////////////////////////////////////////////////////////////// + +//public func +UINT32 DrvOutGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvOutSetcfgs(UINT32 CfgID, UINT32 Param1); // Set Config Setting +UINT32 DrvOutInit(void *pInitParam); // Set Init Parameters +UINT32 DrvOutOpen(void); // Common Constructor +UINT32 DrvOutClose(void); // Common Destructor +UINT32 DrvOutState(UINT32 StateID, UINT32 Value); // General Properties +UINT32 DrvOutControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +UINT32 DrvOutCommand(CHAR *pcCmdStr); //General Command Console + +//dx object +DX_OBJECT gDevLED = { + DXFLAG_SIGN, + DX_CLASS_STATUS_EXT, + OUTPUT_VER, + "Output_LED", + 0, 0, 0, 0, + DrvOutGetcaps, + DrvOutSetcfgs, + DrvOutInit, + DrvOutOpen, + DrvOutClose, + DrvOutState, + DrvOutControl, + DrvOutCommand, + 0, +}; + +UINT32 hDevOut = (UINT32) &gDevLED; + +#define LED_BLINK_FAST (25) ///< if toggle timer interval set 20ms for 1 Count ,25*20ms = 500ms +#define LED_BLINK_SLOW (50) ///< if toggle timer interval set 20ms for 1 Count ,50*20ms = 1000ms + +#if (LED_GREEN_CTRL == LED_GREEN_BY_GPIO) +UINT32 uState_LED_GREEN = 0; +UINT32 uState_LED_GREEN_on = 0; +UINT32 uState_LED_GREEN_count = 0; +#endif +#if (LED_RED_CTRL == LED_RED_BY_GPIO) +UINT32 uState_LED_RED = 0; +UINT32 uState_LED_RED_on = 0; +UINT32 uState_LED_RED_count = 0; +#endif +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_GPIO) +UINT32 uState_LED_FCS = 0; +UINT32 uState_LED_FCS_on = 0; +UINT32 uState_LED_FCS_count = 0; +#endif + +UINT32 DrvOutGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID & 0x0000ffff) { + case OUTPUT_CAPS_BASE: + v = 0; + break; + case OUTPUT_CAPS_TIMER: + //for GPIOMAP_LED_GREEN: +#if (LED_GREEN_CTRL == LED_GREEN_BY_GPIO) + if (uState_LED_GREEN & 0x80000000) { //if dirty + uState_LED_GREEN &= ~0x80000000; //clear dirty + uState_LED_GREEN_count = 0; //reset count + } + uState_LED_GREEN_count++; //increase count + if (((uState_LED_GREEN == 2) && (uState_LED_GREEN_count == LED_BLINK_SLOW)) //SLOW + || ((uState_LED_GREEN == 3) && (uState_LED_GREEN_count == LED_BLINK_FAST))) { //FAST + uState_LED_GREEN_count = 0; //reset count + if (uState_LED_GREEN_on == TRUE) { //do blink + gpio_clearPin(GPIO_GREEN_LED); + uState_LED_GREEN_on = FALSE; + } else { + gpio_setPin(GPIO_GREEN_LED); + uState_LED_GREEN_on = TRUE; + } + } +#endif + //for GPIOMAP_LED_RED: +#if (LED_RED_CTRL == LED_RED_BY_GPIO) + if (uState_LED_RED & 0x80000000) { //if dirty + uState_LED_RED &= ~0x80000000; //clear dirty + uState_LED_RED_count = 0; //reset count + } + uState_LED_RED_count++; //increase count + if (((uState_LED_RED == 2) && (uState_LED_RED_count == LED_BLINK_SLOW)) //SLOW + || ((uState_LED_RED == 3) && (uState_LED_RED_count == LED_BLINK_FAST))) { //FAST + uState_LED_RED_count = 0; //reset count + if (uState_LED_RED_on == TRUE) { //do blink + gpio_clearPin(GPIO_RED_LED); + uState_LED_RED_on = FALSE; + } else { + gpio_setPin(GPIO_RED_LED); + uState_LED_RED_on = TRUE; + } + } +#endif + //for GPIOMAP_LED_FCS: +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_GPIO) + if (uState_LED_FCS & 0x80000000) { //if dirty + uState_LED_FCS &= ~0x80000000; //clear dirty + uState_LED_FCS_count = 0; //reset count + } + uState_LED_FCS_count++; //increase count + if (((uState_LED_FCS == 2) && (uState_LED_FCS_count == LED_BLINK_SLOW)) //SLOW + || ((uState_LED_FCS == 3) && (uState_LED_FCS_count == LED_BLINK_FAST))) { //FAST + uState_LED_FCS_count = 0; //reset count + if (uState_LED_FCS_on == TRUE) { //do blink + gpio_clearPin(GPIO_FOCUS_LED); + uState_LED_FCS_on = FALSE; + } else { + gpio_setPin(GPIO_FOCUS_LED); + uState_LED_FCS_on = TRUE; + } + } +#endif + break; + default: + break; + } + return v; +} + +UINT32 DrvOutSetcfgs(UINT32 CfgID, UINT32 Param1) // Set Config Setting +{ + switch (CfgID) { + case OUTPUT_CFG_MODE: + break; + default: + break; + } + return DX_OK; +} + +UINT32 DrvOutInit(void *pInitParam) // Set Init Parameters +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DrvOutOpen(void) // Common Constructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DrvOutClose(void) // Common Destructor +{ + DBG_FUNC_BEGIN("\r\n"); + + return DX_OK; +} + +UINT32 DrvOutState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + switch (StateID) { + case GPIOMAP_LED_GREEN: +#if (LED_GREEN_CTRL == LED_GREEN_BY_GPIO) + rvalue = (uState_LED_GREEN & ~0x80000000); +#endif + break; + case GPIOMAP_LED_RED: +#if (LED_RED_CTRL == LED_RED_BY_GPIO) + rvalue = (uState_LED_RED & ~0x80000000); +#endif + break; + case GPIOMAP_LED_FCS: +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_GPIO) + rvalue = (uState_LED_FCS & ~0x80000000); +#endif + break; + default: + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("StateID %d %d\r\n", StateID, Value); + switch (StateID) { + case GPIOMAP_LED_GREEN: +#if (LED_GREEN_CTRL == LED_GREEN_BY_GPIO) + uState_LED_GREEN = 0x80000000 | Value; //set dirty + if (Value == 0) { + gpio_clearPin(GPIO_GREEN_LED); + uState_LED_GREEN_on = FALSE; + } else { + gpio_setPin(GPIO_GREEN_LED); + uState_LED_GREEN_on = FALSE; + } +#endif +#if (LED_GREEN_CTRL == LED_FOCUS_BY_MCU) + if (Value == 0) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_GREEN, UART_PAR_OFF, 0); + } else if (Value == 1) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_GREEN, UART_PAR_ON, 0); + } else if (Value == 2) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_GREEN, UART_PAR_BLK_F, 0); + } else if (Value == 3) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_GREEN, UART_PAR_BLK_S, 0); + } +#endif + break; + + case GPIOMAP_LED_RED: +#if (LED_RED_CTRL == LED_RED_BY_GPIO) + uState_LED_RED = 0x80000000 | Value; //set dirty + if (Value == 0) { + gpio_clearPin(GPIO_RED_LED); + uState_LED_RED_on = FALSE; + } else { + gpio_setPin(GPIO_RED_LED); + uState_LED_RED_on = FALSE; + } +#endif +#if (LED_RED_CTRL == LED_RED_BY_MCU) + if (Value == 0) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_RED, UART_PAR_OFF, 0); + } else if (Value == 1) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_RED, UART_PAR_ON, 0); + } else if (Value == 2) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_RED, UART_PAR_BLK_F, 0); + } else if (Value == 3) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_RED, UART_PAR_BLK_S, 0); + } else if (Value == 4) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_RED, UART_PAR_BLK_B, 0); + } +#endif + break; + + case GPIOMAP_LED_FCS: +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_GPIO) + uState_LED_FCS = 0x80000000 | Value; //set dirty + if (Value == 0) { + gpio_clearPin(GPIO_FOCUS_LED); + uState_LED_FCS_on = FALSE; + } else { + gpio_setPin(GPIO_FOCUS_LED); + uState_LED_FCS_on = TRUE; + } +#endif +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_PWM) + if (Value == 0) { + //set FOCUS LED brightness level + PWM_CFG PWMInfo; + PWMInfo.uiDiv = 220; + PWMInfo.uiPrd = 0; + PWMInfo.uiFall = 0; + PWMInfo.uiOnCycle = 0; + PWMInfo.uiInv = 0; + PWMInfo.uiRise = 0; + pwm_set(PWMID_FOCUS_LED, &PWMInfo); + pwm_reload(PWMID_FOCUS_LED); + } else { + //set FOCUS LED brightness level + PWM_CFG PWMInfo; + if (pwm_open(PWMID_FOCUS_LED) != E_OK) { + pwm_stop(PWMID_FOCUS_LED); + pwm_close(PWMID_FOCUS_LED, TRUE); + pwm_open(PWMID_FOCUS_LED); + } + PWMInfo.uiDiv = 220; + PWMInfo.uiPrd = 22; + PWMInfo.uiFall = FcsLedPrdVal[Value]; + PWMInfo.uiOnCycle = 0; + PWMInfo.uiInv = 0; + PWMInfo.uiRise = 0; + pwm_set(PWMID_FOCUS_LED, &PWMInfo); + pwm_reload(PWMID_FOCUS_LED); + } +#endif +#if (LED_FOCUS_CTRL == LED_FOCUS_BY_MCU) + if (Value == 0) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_BLUE, UART_PAR_OFF, 0); + } else if (Value == 1) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_BLUE, UART_PAR_ON, 0); + } else if (Value == 2) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_BLUE, UART_PAR_BLK_F, 0); + } else if (Value == 3) { + MCUCtrl_SendCmd(UART_CMD_LED, UART_LED_BLUE, UART_PAR_BLK_S, 0); + } +#endif + break; + default: + break; + } + } + return DX_OK; +} + +UINT32 DrvOutControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + + switch (CtrlID) { + case OUTPUT_CTRL_MODE: + break; + + default: + break; + } + return DX_OK; +} + +UINT32 DrvOutCommand(CHAR *pcCmdStr) //General Command Console +{ + switch (*pcCmdStr) { + case 'v': + if (!strncmp(pcCmdStr, "ver", 3)) { + DBG_DUMP("0x%X\r\n", OUTPUT_VER); + return TRUE; + } + break; + } + return FALSE; +} + + +//@} diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_Battery.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_Battery.c new file mode 100755 index 000000000..b8a8b12a5 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_Battery.c @@ -0,0 +1,727 @@ +#include "DxCfg.h" +#include "IOCfg.h" +#include "DxPower.h" +#include "DxFlash.h" +#include "DxCommon.h" +#include "DxApi.h" +#include "Dx.h" +#include +#include +#include +#if defined(_MCU_ENABLE_) +#include "MCUCtrl.h" +#endif + +#define THIS_DBGLVL 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxPwr +#define __DBGLVL__ THIS_DBGLVL +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include + +#if defined(_POWER_BATT_) + +#define TEMPDET_FUNCTION DISABLE +#define TEMPDET_TEST DISABLE +#define ADC_TEST ENABLE +#define DUMMY_LOAD 0 +#define BATT_SLIDE_WINDOW_COUNT 8 + +#define VOLDET_BATTERY_420V 782 +#define VOLDET_BATTERY_415V 772 +#define VOLDET_BATTERY_410V 763 +#define VOLDET_BATTERY_405V 754 +#define VOLDET_BATTERY_400V 744 +#define VOLDET_BATTERY_390V 726 +#define VOLDET_BATTERY_380V 707 +#define VOLDET_BATTERY_378V 703 +#define VOLDET_BATTERY_377V 701 +#define VOLDET_BATTERY_376V 699 +#define VOLDET_BATTERY_375V 698 +#define VOLDET_BATTERY_374V 696 +#define VOLDET_BATTERY_373V 694 +#define VOLDET_BATTERY_372V 692 +#define VOLDET_BATTERY_371V 690 +#define VOLDET_BATTERY_370V 688 +#define VOLDET_BATTERY_369V 687 +#define VOLDET_BATTERY_367V 683 +#define VOLDET_BATTERY_366V 681 +#define VOLDET_BATTERY_360V 670 +#define VOLDET_BATTERY_355V 660 +#define VOLDET_BATTERY_350V 651 +#define VOLDET_BATTERY_340V 633 +#define VOLDET_BATTERY_004V 7 +#define CHARGE_ADC_OFFSET 25 +#define LENS_ADC_OFFSET 23 +#define LENS_ADC_OFFSET2 12 + + + +DummyLoadType dummyLoadData[11]; + +//*********************************************** +//* +//* Battery Rule depend on Model +//* +//*********************************************** + +//#define VOLDET_BATTERY_ADC_TH 0 + +#if TEMPDET_TEST +INT32 temperature_value = 0; +#endif + + +static INT32 gTempValue = 25; +#if ADC_TEST +UINT32 gAdcValue = 3000; +#endif +#if defined(_MCU_ENABLE_) +UINT32 gMCUValue = 99; +#endif + +//------------------ Battery Status Level -------------------// +#define BATT_LEVEL_COUNT 4 + +static UINT32 LiBattAdcLevelValue[BATT_LEVEL_COUNT] = { + VOLDET_BATTERY_355V, + VOLDET_BATTERY_371V, + VOLDET_BATTERY_376V, + VOLDET_BATTERY_380V, +}; + + + +#define DUMMY_LOAD_OFFSETV VOLDET_BATTERY_004V +#define LENS_MOVE_MAX_COUNT 10 + +static UINT32 *pBattAdcLevelValue = &LiBattAdcLevelValue[0];; +static UINT32 uiBattADCSlideWin[BATT_SLIDE_WINDOW_COUNT] = {0}; +static UINT8 uiBattSlideIdx = 0; +static UINT8 uiCurSlideWinCnt = 0; +static INT32 iBattAdcCalOffset = 0; +#if USB_CHARGE_FUNCTION +static UINT32 u32BattChargeCurrent = BATTERY_CHARGE_CURRENT_LOW; +#endif +#if DUMMY_LOAD +static void DrvPower_dummy_process(UINT32 *V1, UINT32 *V2, BOOL bIris); +#endif +static INT32 DrvPower_GetTempCompentation(INT32 tempValue); + +static UINT32 bDummyLoadPwrOff = FALSE; + +//static DX_CALLBACK_PTR g_fpDxPowerCB = NULL; +/** + Get battery voltage ADC value + + Get battery voltage ADC value + + @param void + @return UINT32 ADC value +*/ + + +static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1); +static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1); +static UINT32 DrvPowerInit(void *pInitParam); +static UINT32 DrvPowerOpen(void); +static UINT32 DrvPowerClose(void); +static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value); +static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); +static UINT32 DrvPowerCommand(CHAR *pcCmdStr); +static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl); +static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value); +#if USB_CHARGE_FUNCTION +static INT32 DrvPower_BattTempGet(void); +#endif +static void DrvPower_PowerOnInit(void); +DX_OBJECT gDevPowerBATT = { + DXFLAG_SIGN, + DX_CLASS_POWER_EXT, + POWER_VER, + "Power", + 0, 0, 0, 0, + DrvPowerGetcaps, + DrvPowercfgs, + DrvPowerInit, + DrvPowerOpen, + DrvPowerClose, + DrvPowerState, + DrvPowerControl, + DrvPowerCommand, + 0, +}; + + + + +static UINT32 DrvPower_GetBatteryADC(void) +{ + + UINT32 uiADCValue; + INT32 TempCompentationADC; + +#if ADC_TEST + uiADCValue = gAdcValue; +#else + #if defined(_MCU_ENABLE_) + MCUCtrl_SendCmd(UART_CMD_VBAT_DETECT,0,0,0); + uiADCValue = gMCUValue; + return uiADCValue; + #else + uiADCValue = (adc_readData(ADC_CH_VOLDET_BATTERY)); + #endif +#endif + { + TempCompentationADC = DrvPower_GetTempCompentation(gTempValue); + DBG_MSG("Temp= %d\r\n", gTempValue); +#if 0 //charlie need wait DrvFlash_IsCharge finish + if (DrvFlash_IsCharge()) { + //DBG_MSG("ADC = %d,",uiADCValue); + uiADCValue += (CHARGE_ADC_OFFSET + TempCompentationADC); + DBG_MSG("Charge ADC+= %d\r\n", CHARGE_ADC_OFFSET + TempCompentationADC); + } else { + if (gDevPower.pfCallback) { + + gDevPower.pfCallback(DRVPWR_CB_IS_LENS_MOVING, 0, 0); + DBG_MSG("ADC = %d,", uiADCValue); + uiADCValue += (LENS_ADC_OFFSET + TempCompentationADC); + DBG_MSG("lens2 ADC+= %d\r\n", LENS_ADC_OFFSET + TempCompentationADC); + + + + } + } +#else + if (gDevPowerBATT.pfCallback) { + + gDevPowerBATT.pfCallback(DRVPWR_CB_IS_LENS_MOVING, 0, 0); + DBG_MSG("ADC = %d,", uiADCValue); + uiADCValue += (LENS_ADC_OFFSET + TempCompentationADC); + DBG_MSG("lens2 ADC+= %d\r\n", LENS_ADC_OFFSET + TempCompentationADC); + + + + } +#endif + uiADCValue += (iBattAdcCalOffset / 2); + return 782;//uiADCValue; + } + +} +//#NT#2009/09/02#Lincy Lin -begin +//#Add function for check battery overheat +/** + Get battery + + Get battery Temperature ADC value + + @param void + @return UINT32 ADC value +*/ +static BOOL DrvPower_IsBattOverHeat(void) +{ + return FALSE; +} +//#NT#2009/09/02#Lincy Lin -end + + + + +/** + Get battery voltage level + + Get battery voltage level. + If battery voltage level is DRVPWR_BATTERY_LVL_EMPTY, it means + that you have to power off the system. + + @param void + @return UINT32 Battery Level, refer to VoltageDet.h -> VOLDET_BATTERY_LVL_XXXX +*/ + +static UINT32 DrvPower_GetBatteryLevel(void) +{ + static UINT32 uiPreBatteryLvl = DRVPWR_BATTERY_LVL_UNKNOWN; + //static UINT32 uiPreBatteryADC = 0; + static UINT32 uiRetBatteryLvl; + static UINT32 uiEmptycount = 0; + static UINT32 uiCount = 0; + UINT32 uiCurBatteryADC, uiCurBatteryLvl, i; + BOOL isMatch = FALSE; + + uiCurBatteryLvl = 0; + if (uiPreBatteryLvl == DRVPWR_BATTERY_LVL_UNKNOWN) { + uiCurBatteryADC = DrvPower_GetBatteryADC(); + //uiPreBatteryADC = DrvPower_GetBatteryADC() - 1; + for (i = 0; i < BATT_SLIDE_WINDOW_COUNT; i++) { + uiBattADCSlideWin[i] = uiCurBatteryADC; + DBG_MSG("AVG=%d\r\n", uiCurBatteryADC); + } + } else { + + uiCurSlideWinCnt = BATT_SLIDE_WINDOW_COUNT; + uiBattADCSlideWin[uiBattSlideIdx++] = DrvPower_GetBatteryADC(); + if (uiBattSlideIdx >= uiCurSlideWinCnt) { + uiBattSlideIdx = 0; + } + uiCurBatteryADC = 0; + for (i = 0; i < uiCurSlideWinCnt; i++) { + uiCurBatteryADC += uiBattADCSlideWin[i]; + DBG_MSG("A[%d]=%d,", i, uiBattADCSlideWin[i]); + } + uiCurBatteryADC /= uiCurSlideWinCnt; + DBG_MSG("AVG=%d", uiCurBatteryADC); + DBG_MSG(", V=%d", uiCurBatteryADC * 42 / 9100); + DBG_MSG(".%02d\r\n", (uiCurBatteryADC * 42 / 91) % 100); + } + + //DBG_IND("%d,%d,%d\r\n",VOLDET_BATTERY_ADC_LVL0,VOLDET_BATTERY_ADC_LVL1,VOLDET_BATTERY_ADC_LVL2); + for (i = BATT_LEVEL_COUNT; i > 0; i--) { + if (uiCurBatteryADC > pBattAdcLevelValue[i - 1]) { + uiCurBatteryLvl = i; + isMatch = TRUE; + break; + } + } + if (isMatch != TRUE) { + uiCurBatteryLvl = 0; + } + + // Debounce + if ((uiCurBatteryLvl == uiPreBatteryLvl) || + (uiPreBatteryLvl == DRVPWR_BATTERY_LVL_UNKNOWN)) { + uiRetBatteryLvl = uiCurBatteryLvl; + } + uiPreBatteryLvl = uiCurBatteryLvl; + //uiPreBatteryADC = uiCurBatteryADC; + + if (uiCount % 2 == 0) { + uiRetBatteryLvl = uiPreBatteryLvl; + } + uiCount++; + // + if (uiEmptycount || uiRetBatteryLvl == DRVPWR_BATTERY_LVL_0) { + uiEmptycount++; + if (uiEmptycount == 4) { + return DRVPWR_BATTERY_LVL_EMPTY; + } + } + + return DRVPWR_BATTERY_LVL_4;//uiRetBatteryLvl; +} + + +static void DrvPower_PowerOnInit(void) +{ + pBattAdcLevelValue = &LiBattAdcLevelValue[0]; +#if USB_CHARGE_FUNCTION + gTempValue = DrvPower_BattTempGet(); +#endif +} + +UINT32 DrvPower_DummyLoad(void) +{ +#if DUMMY_LOAD + UINT32 Ave_V, deltaV, V1, V2; + + DrvPower_dummy_process(&V1, &V2, FALSE); + deltaV = V2 - V1; + Ave_V = V1; + dummyLoadData[0].deltaV = deltaV; + dummyLoadData[0].Ave_V = Ave_V; + + + if (dummyLoadData[0].Ave_V < (LiBattAdcLevelValue[0] + DUMMY_LOAD_OFFSETV)) { + bDummyLoadPwrOff = TRUE; + + } else { + bDummyLoadPwrOff = FALSE; + } + DBG_IND("Ave_V=%d ; deltaV=%d , bDummyLoadPwrOff=%d\r\n", Ave_V, deltaV, bDummyLoadPwrOff); + return (!bDummyLoadPwrOff); +#else + return TRUE; +#endif +} +#if DUMMY_LOAD +static void DrvPower_dummy_process(UINT32 *V1, UINT32 *V2, BOOL bIris) +{ + UINT32 i, Va; + UINT32 Vtotal, DetectLoop = 25; + float Vtmp1, Vtmp2, Vtmp3; + + if (gDevPower.pfCallback) { + gpio_clearPin(GPIO_LENS_MD_RST); // Enable motor driver.GPIO_LENS_MD_RST + Delay_DelayMs(5); + gpio_setPin(GPIO_LENS_MD_RST); // Enable motor driver.GPIO_LENS_MD_RST + gDevPower.pfCallback(DRVPWR_CB_DUMMY_LOAD_START, 0, 0); + } + Delay_DelayMs(40); + + Vtotal = 0; + for (i = 0; i < DetectLoop ; i++) { //sample 25 times. + Va = DrvPower_GetBatteryADC(); //sample average value.(In loading) + Delay_DelayUs(200); + Vtotal += Va; + } + *V1 = Vtotal / DetectLoop; + if (gDevPower.pfCallback) { + gDevPower.pfCallback(DRVPWR_CB_DUMMY_LOAD_END, 0, 0); + } + Delay_DelayMs(5); + Vtotal = 0; + for (i = 0; i < DetectLoop ; i++) { //sample 25 times. + Va = DrvPower_GetBatteryADC(); //sample average value.(after loading) + Delay_DelayUs(200); + Vtotal += Va; + } + + *V2 = Vtotal / DetectLoop; + + + Vtmp1 = (float)(*V1) * 3.3 * 1.39 / 4096; + Vtmp2 = (float)(*V2) * 3.3 * 1.39 / 4096; + + + Vtmp3 = Vtmp2 - Vtmp1; + + DBG_IND("delta=(%1.3f, %d) Ave_V:%1.3f V2:%1.3f, %d, %d, Cal = %d \r\n", Vtmp3, (*V2) - (*V1), Vtmp1, Vtmp2, *V1, *V2, iBattAdcCalOffset); + +} +#endif + +static void DrvPower_BattADC_Calibration(BOOL enable) +{ +} + +#if USB_CHARGE_FUNCTION +static void DrvPower_EnableChargeIC(BOOL bCharge) +{ + +} + +static void DrvPower_ChargeBattEn(BOOL bCharge) +{ + +} + + +static void DrvPower_ChargeCurrentSet(UINT32 Current) +{ + u32BattChargeCurrent = Current; +} + +static UINT32 DrvPower_ChargeCurrentGet(void) +{ + return u32BattChargeCurrent; +} + +static void DrvPower_ChargeISet(BOOL isHigh) +{ + +} + +static BOOL DrvPower_ChargeIGet(void) +{ + return 0; +} + +static void DrvPower_ChargeVSet(BOOL isHigh) +{ + +} + +static BOOL DrvPower_ChargeVGet(void) +{ + return 0; +} + + +static BOOL DrvPower_IsUnderCharge(void) +{ + return 0; +} + +static BOOL DrvPower_IsUSBChargeOK(void) +{ + return 0; +} + +static BOOL DrvPower_IsBattIn(void) +{ + return TRUE; + +} + +static BOOL DrvPower_IsDeadBatt(void) +{ + return FALSE; +} + +static BOOL DrvPower_IsNeedRecharge(void) +{ + return FALSE; +} + +static INT32 DrvPower_BattTempGet(void) +{ + return 25; +} +#endif + +static INT32 DrvPower_GetTempCompentation(INT32 tempValue) +{ + return 0; +} + +static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value) +{ + DBG_IND("DrvPwrCtrl(%d), value(%d)\r\n", DrvPwrCtrl, value); + switch (DrvPwrCtrl) { + case DRVPWR_CTRL_BATTERY_CALIBRATION_EN: + DrvPower_BattADC_Calibration((BOOL)value); + break; + + case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET: + iBattAdcCalOffset = (INT32)value; + break; + +#if USB_CHARGE_FUNCTION + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + DrvPower_ChargeBattEn((BOOL)value); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT: + DrvPower_ChargeCurrentSet(value); + break; + + case DRVPWR_CTRL_BATTERY_CHARGE_ISET: + DrvPower_ChargeISet((BOOL)value); + break; + + case DRVPWR_CTRL_BATTERY_CHARGE_VSET: + DrvPower_ChargeVSet((BOOL)value); + break; + + case DRVPWR_CTRL_ENABLE_CHARGEIC: + DrvPower_EnableChargeIC((BOOL)value); + break; + +#endif +#if defined(_MCU_ENABLE_) + case DRVPWR_CTRL_PIR_EN: + if(value!=0) { + gpio_setPin(PIR_POWER_ON); + Delay_DelayMs(100); + gpio_clearPin(PIR_POWER_ON); + MCUCtrl_SendCmd(UART_CMD_PIR_SWITCH,UART_PAR_ON,0,0); + } else { + gpio_setPin(PIR_POWER_OFF); + Delay_DelayMs(100); + gpio_clearPin(PIR_POWER_OFF); + MCUCtrl_SendCmd(UART_CMD_PIR_SWITCH,UART_PAR_OFF,0,0); + } + break; +#endif + case DRVPWR_CTRL_PSW1: + hwpower_set_power_key(POWER_ID_PSW1, value); + break; + case DRVPWR_CTRL_HWRT: + hwpower_set_power_key(POWER_ID_HWRT, value); + break; + case DRVPWR_CTRL_SWRT: + hwpower_set_power_key(POWER_ID_SWRT, value); + break; + default: + DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl); + break; + } +} + +static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl) +{ + UINT32 rvalue = 0; + switch (DrvPwrCtrl) { + case DRVPWR_CTRL_BATTERY_LEVEL: + rvalue = DrvPower_GetBatteryLevel(); + break; + case DRVPWR_CTRL_BATTERY_ADC_VALUE: + rvalue = DrvPower_GetBatteryADC(); + break; + case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET: + rvalue = iBattAdcCalOffset; + break; + case DRVPWR_CTRL_IS_DUMMUYLOAD_POWEROFF: + rvalue = bDummyLoadPwrOff; + break; + case DRVPWR_CTRL_IS_BATT_OVERHEAT: + rvalue = (UINT32)DrvPower_IsBattOverHeat(); + break; +#if USB_CHARGE_FUNCTION + case DRVPWR_CTRL_IS_BATT_INSERT: + rvalue = (UINT32)DrvPower_IsBattIn(); + break; + case DRVPWR_CTRL_IS_DEAD_BATT: + rvalue = (UINT32)DrvPower_IsDeadBatt(); + break; + case DRVPWR_CTRL_IS_NEED_RECHARGE: + rvalue = (UINT32)DrvPower_IsNeedRecharge(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + rvalue = (UINT32)DrvPower_IsUnderCharge(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_OK: + rvalue = (UINT32)DrvPower_IsUSBChargeOK(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT: + rvalue = DrvPower_ChargeCurrentGet(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_ISET: + rvalue = (UINT32)DrvPower_ChargeIGet(); + break; + case DRVPWR_CTRL_BATTERY_CHARGE_VSET: + rvalue = (UINT32)DrvPower_ChargeVGet(); + break; + case DRVPWR_CTRL_BATTERY_TEMPERATURE: +#if USB_CHARGE_FUNCTION + rvalue = DrvPower_BattTempGet(); +#endif + break; + +#else + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + rvalue = FALSE; + break; +#endif + case DRVPWR_CTRL_POWERON_SOURCE: + #if defined(_MCU_ENABLE_) + rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0); + #else + rvalue = hwpower_get_poweron_state(POWER_STATE_SRC); + #endif + break; + case DRVPWR_CTRL_POWER_LOST: + #if defined(_MCU_ENABLE_) + rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0); + #else + rvalue = hwpower_get_poweron_state(POWER_STATE_FIRST); + #endif + break; + case DRVPWR_CTRL_PSW1: + rvalue = hwpower_get_power_key(POWER_ID_PSW1); + break; + case DRVPWR_CTRL_HWRT: + rvalue = hwpower_get_power_key(POWER_ID_HWRT); + break; + case DRVPWR_CTRL_SWRT: + rvalue = hwpower_get_power_key(POWER_ID_SWRT); + break; + default: + DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl); + break; + } + return rvalue; +} +/* +void DrvPower_RegCB(DX_CALLBACK_PTR fpDxPowerCB) +{ + + g_fpDxPowerCB = fpDxPowerCB; +} +*/ +///////////DX object +static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1) +{ + + return DX_OK; +} + +static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1) +{ + + return DX_OK; +} +static UINT32 DrvPowerInit(void *pInitParam) +{ + DBG_IND("Init\r\n"); + DrvPower_PowerOnInit(); + return DX_OK; +} + +static UINT32 DrvPowerOpen(void) +{ + DBG_IND("open\r\n"); + hwclock_open(HWCLOCK_MODE_RTC); + return DX_OK; +} + +static UINT32 DrvPowerClose(void) +{ + DBG_IND("close\r\n"); + hwclock_close(); + return DX_OK; +} + +static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value) +{ + if (StateID & DXGET) { + StateID &= ~DXGET; + return DrvPower_GetControl(StateID); + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DrvPower_SetControl(StateID, Value); + } + return DX_OK; +} +static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) +{ + switch(CtrlID) { + case DRVPWR_CTRL_CURRENT_TIME: + printf("[%s:%d] s DRVPWR_CTRL_CURRENT_TIME\n",__FUNCTION__,__LINE__); + if (Param1 == 0) + hwclock_set_time(TIME_ID_CURRENT, *(struct tm*)Param2, 0); + if (Param1 == 1) + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_CURRENT); + break; + case DRVPWR_CTRL_HWRT_TIME: + printf("[%s:%d] s DRVPWR_CTRL_HWRT_TIME\n",__FUNCTION__,__LINE__); + if (Param1 == 0) + hwclock_set_time(TIME_ID_HWRT, *(struct tm*)Param2, 0); + if (Param1 == 1) + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_HWRT); + break; + case DRVPWR_CTRL_SWRT_TIME: + printf("[%s:%d] s DRVPWR_CTRL_SWRT_TIME\n",__FUNCTION__,__LINE__); + if (Param1 == 0) + hwclock_set_time(TIME_ID_SWRT, *(struct tm*)Param2, 0); + if (Param1 == 1) + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_SWRT); + break; + } + return DX_OK; +} + +static UINT32 DrvPowerCommand(CHAR *pcCmdStr) //General Command Console +{ + + switch (*pcCmdStr) { + case 'd': + /*if (!strncmp(pcCmdStr, "Nand dump", 9)) + { + return TRUE; + }*/ + break; + } + return FALSE; +} +/* +static void DrvPowerCallback(UINT32 EventID, UINT32 Param1, UINT32 Param2){ + + if(g_fpDxPowerCB){ + g_fpDxPowerCB(EventID,Param1,Param2); + } +} +*/ + + +#endif + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_DC.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_DC.c new file mode 100755 index 000000000..527622a58 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxPower_DC.c @@ -0,0 +1,272 @@ +#include "DxCfg.h" +#include "IOCfg.h" +#include "DxPower.h" +#include "DxCommon.h" +#include "DxApi.h" +#include "Dx.h" +#include +#include +#include + +#define THIS_DBGLVL 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxPwr +#define __DBGLVL__ THIS_DBGLVL +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include + +#if defined(_POWER_DC_) + +static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1); +static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1); +static UINT32 DrvPowerInit(void *pInitParam); +static UINT32 DrvPowerOpen(void); +static UINT32 DrvPowerClose(void); +static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value); +static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); +static UINT32 DrvPowerCommand(CHAR *pcCmdStr); +static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl); +static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value); + +DX_OBJECT gDevPowerDC = { + DXFLAG_SIGN, + DX_CLASS_POWER_EXT, + POWER_VER, + "PowerDC", + 0, 0, 0, 0, + DrvPowerGetcaps, + DrvPowercfgs, + DrvPowerInit, + DrvPowerOpen, + DrvPowerClose, + DrvPowerState, + DrvPowerControl, + DrvPowerCommand, + 0, +}; + +UINT32 DrvPower_DummyLoad(void) +{ + return TRUE; +} + + +static void DrvPower_SetControl(DRVPWR_CTRL DrvPwrCtrl, UINT32 value) +{ + DBG_IND("DrvPwrCtrl(%d), value(%d)\r\n", DrvPwrCtrl, value); + switch (DrvPwrCtrl) { + case DRVPWR_CTRL_BATTERY_CALIBRATION_EN: + break; + + case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET: + break; + +#if USB_CHARGE_FUNCTION + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_ISET: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_VSET: + break; + case DRVPWR_CTRL_ENABLE_CHARGEIC: + break; +#endif + case DRVPWR_CTRL_PSW1: +// hwpower_set_power_key(POWER_ID_PSW1, value); + break; + case DRVPWR_CTRL_HWRT: +// hwpower_set_power_key(POWER_ID_HWRT, value); + break; + case DRVPWR_CTRL_SWRT: +// hwpower_set_power_key(POWER_ID_SWRT, value); + break; + default: + DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl); + break; + } +} + +static UINT32 DrvPower_GetControl(DRVPWR_CTRL DrvPwrCtrl) +{ + UINT32 rvalue = 0; + switch (DrvPwrCtrl) { + case DRVPWR_CTRL_BATTERY_LEVEL: + break; + case DRVPWR_CTRL_BATTERY_ADC_VALUE: + break; + case DRVPWR_CTRL_BATTERY_ADC_CAL_OFFSET: + break; + case DRVPWR_CTRL_IS_DUMMUYLOAD_POWEROFF: + break; + case DRVPWR_CTRL_IS_BATT_OVERHEAT: + break; +#if USB_CHARGE_FUNCTION + case DRVPWR_CTRL_IS_BATT_INSERT: + break; + case DRVPWR_CTRL_IS_DEAD_BATT: + break; + case DRVPWR_CTRL_IS_NEED_RECHARGE: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_OK: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_CURRENT: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_ISET: + break; + case DRVPWR_CTRL_BATTERY_CHARGE_VSET: + break; + case DRVPWR_CTRL_BATTERY_TEMPERATURE: + break; +#else + case DRVPWR_CTRL_BATTERY_CHARGE_EN: + rvalue = FALSE; + break; +#endif + case DRVPWR_CTRL_POWERON_SOURCE: + #if defined(_MCU_ENABLE_) + rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0); + #else +// rvalue = hwpower_get_poweron_state(POWER_STATE_SRC); + #endif + break; + case DRVPWR_CTRL_POWER_LOST: + #if defined(_MCU_ENABLE_) + rvalue = MCUCtrl_SendCmd(UART_CMD_POWER_ON_REASON,0,0,0); + #else +// rvalue = hwpower_get_poweron_state(POWER_STATE_FIRST); + #endif + break; + case DRVPWR_CTRL_PSW1: +// rvalue = hwpower_get_power_key(POWER_ID_PSW1); + break; + case DRVPWR_CTRL_HWRT: +// rvalue = hwpower_get_power_key(POWER_ID_HWRT); + break; + case DRVPWR_CTRL_SWRT: +// rvalue = hwpower_get_power_key(POWER_ID_SWRT); + break; + default: + DBG_ERR("DrvPwrCtrl(%d)\r\n", DrvPwrCtrl); + break; + } + return rvalue; +} +/* +void DrvPower_RegCB(DX_CALLBACK_PTR fpDxPowerCB) +{ + + g_fpDxPowerCB = fpDxPowerCB; +} +*/ +///////////DX object +static UINT32 DrvPowerGetcaps(UINT32 CapID, UINT32 Param1) +{ + UINT32 v = 0; + switch (CapID & 0x0000ffff) { + case POWER_CAPS_BASE: + v = POWER_BF_DRTC; + break; + default: + break; + } + return v; +} + +static UINT32 DrvPowercfgs(UINT32 CfgID, UINT32 Param1) +{ + + return DX_OK; +} +static UINT32 DrvPowerInit(void *pInitParam) +{ + DBG_IND("Init\r\n"); + return DX_OK; +} + +static UINT32 DrvPowerOpen(void) +{ + DBG_IND("open\r\n"); + //DBG_WRN("[%s:%d] s HWCLOCK_MODE_RTC\n",__FUNCTION__,__LINE__); + hwclock_open(HWCLOCK_MODE_RTC); + return DX_OK; +} + +static UINT32 DrvPowerClose(void) +{ + DBG_IND("close\r\n"); + hwclock_close(); + return DX_OK; +} + +static UINT32 DrvPowerState(UINT32 StateID, UINT32 Value) +{ + if (StateID & DXGET) { + StateID &= ~DXGET; + return DrvPower_GetControl(StateID); + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DrvPower_SetControl(StateID, Value); + } + return DX_OK; +} +static UINT32 DrvPowerControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) +{ + switch(CtrlID) { + case DRVPWR_CTRL_CURRENT_TIME: + //DBG_WRN("[%s:%d] s DRVPWR_CTRL_CURRENT_TIME\n",__FUNCTION__,__LINE__); + if (Param1 == 0) { + hwclock_set_time(TIME_ID_CURRENT, *(struct tm*)Param2, 0); + } + if (Param1 == 1) { + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_CURRENT); + } + break; + case DRVPWR_CTRL_HWRT_TIME: + //DBG_WRN("[%s:%d] s DRVPWR_CTRL_HWRT_TIME\n",__FUNCTION__,__LINE__); + if (Param1 == 0) { + hwclock_set_time(TIME_ID_HWRT, *(struct tm*)Param2, 0); + } + if (Param1 == 1) { + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_HWRT); + } + break; + case DRVPWR_CTRL_SWRT_TIME: + //DBG_WRN("[%s:%d] s DRVPWR_CTRL_SWRT_TIME\n",__FUNCTION__,__LINE__); + if (Param1 == 0) { + hwclock_set_time(TIME_ID_SWRT, *(struct tm*)Param2, 0); + } + if (Param1 == 1) { + *((struct tm*)Param2) = hwclock_get_time(TIME_ID_SWRT); + } + break; + } + return DX_OK; +} + +static UINT32 DrvPowerCommand(CHAR *pcCmdStr) //General Command Console +{ + + switch (*pcCmdStr) { + case 'd': + /*if (!strncmp(pcCmdStr, "Nand dump", 9)) + { + return TRUE; + }*/ + break; + } + return FALSE; +} +/* +static void DrvPowerCallback(UINT32 EventID, UINT32 Param1, UINT32 Param2){ + + if(g_fpDxPowerCB){ + g_fpDxPowerCB(EventID,Param1,Param2); + } +} +*/ + +#endif diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxSound_Audio.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxSound_Audio.c new file mode 100755 index 000000000..28f172cda --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxSound_Audio.c @@ -0,0 +1,1122 @@ +#include "DxCfg.h" +#include "IOCfg.h" + +#include "Debug.h" +#include "Audio.h" +#include "eac.h" + +#include "DxSound.h" +#include "mIType.h" +#include "ErrorNo.h" +#include "Audio.h" +#include "hdmitx.h" + +#include "DxCommon.h" +#include "DxApi.h" + +#include "kwrap/type.h" +#include "DxType.h" +#include "Dx.h" +#include "stdio.h" //for sscanf +#include "AudioCodec.h" + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +#define DRVSOUND_OUTDEV_CONFIG_CNT 5 +#define DRVSOUND_MAX_VOL_LVL 100 +#define DRVSOUND_DEFAULT_SET AUDIO_DEFSET_20DB + +typedef struct { + DRVSOUND_VOUT vidOutType; + AUDIO_CH audChannel; + BOOL monoExpand; +} DRVSOUND_OUTDEV_CONFIG; + +typedef enum { + DRVSOUND_SR_8000 = 8000, ///< 8 KHz + DRVSOUND_SR_11025 = 11025, ///< 11.025 KHz + DRVSOUND_SR_12000 = 12000, ///< 12 KHz + DRVSOUND_SR_16000 = 16000, ///< 16 KHz + DRVSOUND_SR_22050 = 22050, ///< 22.05 KHz + DRVSOUND_SR_24000 = 24000, ///< 24 KHz + DRVSOUND_SR_32000 = 32000, ///< 32 KHz + DRVSOUND_SR_44100 = 44100, ///< 44.1 KHz + DRVSOUND_SR_48000 = 48000, ///< 48 KHz + ENUM_DUMMY4WORD(DRVSOUND_SR) +} DRVSOUND_SR; + +#if 1 +DRVSOUND_OUTDEV_CONFIG gDxSndAudOutDevConfigTbl[DRVSOUND_OUTDEV_CONFIG_CNT] = { + {DRVSOUND_VOUT_LCD, AUDIO_CH_LEFT, FALSE}, + {DRVSOUND_VOUT_TV, AUDIO_CH_RIGHT, FALSE}, + {DRVSOUND_VOUT_HDMI, AUDIO_CH_LEFT, FALSE}, + {DRVSOUND_VOUT_LCDTV, AUDIO_CH_STEREO, FALSE}, + {DRVSOUND_VOUT_LCDHDMI, AUDIO_CH_LEFT, TRUE}, +}; +#else +DRVSOUND_OUTDEV_CONFIG gDxSndAudOutDevConfigTbl[DRVSOUND_OUTDEV_CONFIG_CNT] = { + {DRVSOUND_VOUT_LCD, AUDIO_CH_LEFT, TRUE}, + {DRVSOUND_VOUT_TV, AUDIO_CH_LEFT, TRUE}, + {DRVSOUND_VOUT_HDMI, AUDIO_CH_LEFT, FALSE}, + {DRVSOUND_VOUT_LCDTV, AUDIO_CH_LEFT, TRUE}, + {DRVSOUND_VOUT_LCDHDMI, AUDIO_CH_LEFT, TRUE}, +}; +#endif + +DRVSOUND_OUTDEV_CONFIG *gpCurDrvAudOutDev = &gDxSndAudOutDevConfigTbl[0]; +UINT32 gDrvSndTotalVolLvl = 0xFFFFFFFF; +PAUDIO_CODEC_FUNC gDrvSndCodecFunc = 0; +AUDIO_CODECSEL gDrvSndCodecSel = AUDIO_CODECSEL_DEFAULT; +AUDIO_VOL_LEVEL gDrvSndTotalAudVolLvl = AUDIO_VOL_LEVEL64;////AUDIO_VOL_LEVEL8 +UINT32 gCurDrvSndVol = 50; +AUDIO_GAIN gCurDrvSndGain = AUDIO_GAIN_4; +UINT32 gDrvSndTotalGainLvl = AUDIO_RECG_LEVEL8; +BOOL gDrvSndConfigALC = TRUE; +#ifdef _AudCodecExt_None_ +BOOL gDrvSndCodecExt = FALSE; +#else +BOOL gDrvSndCodecExt = TRUE; +#endif + +#ifndef _AudCodecExt_None_ +AUDIO_SETTING embedded_setting = +{ + .Clock.bClkExt = FALSE, // Must be + .Clock.Clk = AUDIO_CLK_12288, // Clock = Sampling rate * 256 + .I2S.bMaster = TRUE, // Must be + .I2S.I2SFmt = AUDIO_I2SFMT_STANDARD, // Must be + .I2S.ClkRatio = AUDIO_I2SCLKR_256FS_32BIT, // Must be + .Fmt = AUDIO_FMT_I2S, // Must be + .SamplingRate = AUDIO_SR_48000, // Sampling rate = Clock / 256 + .Channel = AUDIO_CH_STEREO, //AUDIO_CH_RIGHT; // Audio channel + .RecSrc = AUDIO_RECSRC_MIC, // Must be + .Output = AUDIO_OUTPUT_SPK, + .bEmbedded = TRUE, +}; + +AUDIO_SETTING external_setting = +{ + .Clock.bClkExt = FALSE, // Must be + .Clock.Clk = AUDIO_CLK_12288, // Clock = Sampling rate * 256 + .I2S.bMaster = TRUE, // Must be + .I2S.I2SFmt = AUDIO_I2SFMT_STANDARD, // Must be + .I2S.ClkRatio = AUDIO_I2SCLKR_256FS_32BIT, // Must be + .Fmt = AUDIO_FMT_I2S, // Must be + .SamplingRate = AUDIO_SR_48000, // Sampling rate = Clock / 256 + .Channel = AUDIO_CH_RIGHT, //AUDIO_CH_RIGHT; // Audio channel + .RecSrc = AUDIO_RECSRC_MIC, // Must be + .Output = AUDIO_OUTPUT_SPK, + .bEmbedded = TRUE, +}; +#endif + + +//========== Debug Messsage ======= +#ifdef NDEBUG //release version +#define _DRVSOUND_DBG_ 0 +#else +#define _DRVSOUND_DBG_ 3 +#endif + +#if (_DRVSOUND_DBG_ > 2) +#define DbgMsg_DrvSoundIO(msg) DBG_IND msg +#define DbgMsg_DrvSound(msg) DBG_IND msg +#define DbgCode_DrvSound(x) x + +_INLINE void DrvSound_DmpOutDevConfig(void) +{ + DBG_IND("\r\n"); + DBG_IND("audCodec= %d \r\n", gpCurDrvAudOutDev->vidOutType); + DBG_IND("audChannel= %d \r\n", gpCurDrvAudOutDev->audChannel); + DBG_IND("monoExpand= %d \r\n", gpCurDrvAudOutDev->monoExpand); +} + +#else + +#define DbgMsg_DrvSoundIO(msg) +#define DbgMsg_DrvSound(msg) +#define DbgCode_DrvSound(x) + +_INLINE void DrvSound_DmpOutDevConfig(void) {} + +#endif +ER DrvSound_SetCodec(PAUDIO_CODEC_FUNC codecFunc, AUDIO_CODECSEL audCodecSel); +ER DrvSound_SetTotalVolLvl(AUDIO_VOL_LEVEL volLvl); +ER DrvSound_SetTotalGainLvl(AUDIO_RECG_LEVEL gainLvl); +ER DrvSound_SwitchExtCodec(BOOL isExt); +ER DrvSound_GetExtCodecFP(PAUDIO_CODEC_FUNC pAudCodecFunc); + + +ER DrvSound_SetOutDevConfig(UINT32 outDevIdx, PAUDTS_OBJ pAudPlayObj) +{ + ER retV = E_OK; + DBG_IND(":idx=%d\r\n", outDevIdx); + + if (0 == pAudPlayObj) { + DBG_ERR("No AudObj\r\n"); + return E_PAR; + } + if (outDevIdx >= DRVSOUND_OUTDEV_CONFIG_CNT) { + DBG_ERR(":idx=%d\r\n", outDevIdx); + return E_PAR; + } + gpCurDrvAudOutDev = &gDxSndAudOutDevConfigTbl[outDevIdx]; + DrvSound_DmpOutDevConfig(); + if (FALSE == pAudPlayObj->isOpened()) { + DBG_ERR("idx=%d,pAudPlayObj Not opened,Open now!\r\n", __func__, outDevIdx); + pAudPlayObj->open(); + } + + //[Config audio Codec & Output] + //Speaker is connected to IC Speaker Output + //TV Audio is connected to IC HP_R Output + if (gpCurDrvAudOutDev->vidOutType == DRVSOUND_VOUT_LCD) { + DBG_IND("video: device=LCD\r\n"); + aud_switchCodec(AUDIO_CODECSEL_DEFAULT); + DBG_IND("audio: codec=DEFAULT device=LCD\r\n"); + aud_setOutput(AUDIO_OUTPUT_SPK); //or AUDIO_OUTPUT_MONO//AUDIO_OUTPUT_SPK + aud_setFeature(AUDIO_FEATURE_SPK_PWR_ALWAYSON, TRUE); + aud_setFeature(AUDIO_FEATURE_INTERFACE_ALWAYS_ACTIVE, FALSE); + aud_setFeature(AUDIO_FEATURE_DISCONNECT_HDMI, TRUE); + aud_setFeature(AUDIO_FEATURE_PLAY2ALLCODEC, FALSE); + } else if (gpCurDrvAudOutDev->vidOutType == DRVSOUND_VOUT_TV) { + DBG_IND("video: device=TV\r\n"); + DBG_IND("audio: codec=DEFAULT device=LINE\r\n"); + aud_switchCodec(AUDIO_CODECSEL_DEFAULT); + aud_setOutput(AUDIO_OUTPUT_LINE); //or AUDIO_OUTPUT_HP + aud_setFeature(AUDIO_FEATURE_LINE_PWR_ALWAYSON, TRUE); + aud_setFeature(AUDIO_FEATURE_INTERFACE_ALWAYS_ACTIVE, FALSE); + aud_setFeature(AUDIO_FEATURE_DISCONNECT_HDMI, TRUE); + aud_setFeature(AUDIO_FEATURE_PLAY2ALLCODEC, FALSE); + } else if (gpCurDrvAudOutDev->vidOutType == DRVSOUND_VOUT_HDMI) { + DBG_IND("video: device=HDMI\r\n"); + DBG_IND("audio => codec=HDMI device=NONE\r\n"); + aud_switchCodec(AUDIO_CODECSEL_HDMI); + aud_setOutput(AUDIO_OUTPUT_NONE); + aud_setFeature(AUDIO_FEATURE_LINE_PWR_ALWAYSON, FALSE); + aud_setFeature(AUDIO_FEATURE_INTERFACE_ALWAYS_ACTIVE, TRUE); + aud_setFeature(AUDIO_FEATURE_DISCONNECT_HDMI, FALSE); + aud_setFeature(AUDIO_FEATURE_PLAY2ALLCODEC, FALSE); + // «áÄò aud_setSamplingRate() ³]©wªº sampling rate ¶·µ¥¦P HDMI display object ºÝ³]©wªº sampling rate + // ¤£µM»Ý­n¥Î aud_setResampleInfo() ±Ò°Ê audio resample + } else if (gpCurDrvAudOutDev->vidOutType == DRVSOUND_VOUT_LCDTV) { + DBG_IND("video: device=LCD & TV\r\n"); + DBG_IND("audio: codec=DEFAULT device=SPK\r\n"); + aud_switchCodec(AUDIO_CODECSEL_DEFAULT); + aud_setOutput(AUDIO_OUTPUT_LINE); + aud_setFeature(AUDIO_FEATURE_LINE_PWR_ALWAYSON, TRUE); + aud_setFeature(AUDIO_FEATURE_INTERFACE_ALWAYS_ACTIVE, FALSE); + aud_setFeature(AUDIO_FEATURE_DISCONNECT_HDMI, TRUE); + aud_setFeature(AUDIO_FEATURE_PLAY2ALLCODEC, FALSE); + } else if (gpCurDrvAudOutDev->vidOutType == DRVSOUND_VOUT_LCDHDMI) { + DBG_IND("video: device=LCD & HDMI\r\n"); + DBG_IND("audio: codec=DEFAULT device=SPK\r\n"); + aud_switchCodec(AUDIO_CODECSEL_DEFAULT); + aud_setOutput(AUDIO_OUTPUT_LINE); + aud_setFeature(AUDIO_FEATURE_LINE_PWR_ALWAYSON, FALSE); + aud_setFeature(AUDIO_FEATURE_INTERFACE_ALWAYS_ACTIVE, TRUE); + aud_setFeature(AUDIO_FEATURE_DISCONNECT_HDMI, FALSE); + aud_setFeature(AUDIO_FEATURE_PLAY2ALLCODEC, TRUE); + // «áÄò aud_setSamplingRate() ³]©wªº sampling rate ¶·µ¥¦P HDMI display object ºÝ³]©wªº sampling rate + // ¤£µM»Ý­n¥Î aud_setResampleInfo() ±Ò°Ê audio resample + } + + //[Config audio Channel] + //TODO ==> GxSound: + // project can assign witch channel is for MONO sound play + // project can assign if expend MONO sound play as STEREO + if (AUDIO_CH_STEREO == gpCurDrvAudOutDev->audChannel) { + pAudPlayObj->setChannel(AUDIO_CH_STEREO); + if (AUDTS_CH_RX == pAudPlayObj->AudTSCH) { + pAudPlayObj->setFeature(AUDTS_FEATURE_RECORD_PCM_EXPAND, FALSE); + } else { + pAudPlayObj->setFeature(AUDTS_FEATURE_PLAYBACK_PCM_EXPAND, FALSE); + } + } else { + pAudPlayObj->setChannel(gpCurDrvAudOutDev->audChannel); + if (AUDTS_CH_RX == pAudPlayObj->AudTSCH) { + pAudPlayObj->setFeature(AUDTS_FEATURE_RECORD_PCM_EXPAND, gpCurDrvAudOutDev->monoExpand); + } else { + pAudPlayObj->setFeature(AUDTS_FEATURE_PLAYBACK_PCM_EXPAND, gpCurDrvAudOutDev->monoExpand); + } + } + + DBG_IND(":idx=%d\r\n", outDevIdx); + return retV; +} +UINT32 DrvSound_GetVol(void) +{ + return gCurDrvSndVol; +} +ER DrvSound_SetCodec(PAUDIO_CODEC_FUNC codecFunc, AUDIO_CODECSEL audCodecSel) +{ + ER retV = E_OK; + + //if (0 == aud_getLockStatus()) + { + retV = aud_open(); + if (E_OK != retV) { + DBG_ERR("aud_open fail =%d\r\n", retV); + return retV; + } + } + aud_setExtCodec(codecFunc); + aud_switchCodec(audCodecSel); + gDrvSndCodecFunc = codecFunc; + gDrvSndCodecSel = audCodecSel; + aud_close(); + DBG_IND("CodecFunc=0x%x,codecSel=%d\r\n", gDrvSndCodecFunc, gDrvSndCodecSel); + return retV; +} +ER DrvSound_SetTotalVolLvl(AUDIO_VOL_LEVEL volLvl) +{ + ER retV = E_OK; + + //if (0 == aud_getLockStatus()) + { + retV = aud_open(); + if (E_OK != retV) { + DBG_ERR("aud_open fail =%d\r\n", retV); + return retV; + } + } + gDrvSndTotalVolLvl = volLvl; + aud_setTotalVolLevel(volLvl); + aud_close(); + DBG_IND("Cur=%d,total=%d\r\n", gCurDrvSndVol, gDrvSndTotalVolLvl); + return retV; +} +// vol: 0 ~ 100 +ER DrvSound_SetVol(UINT32 vol) +{ + ER retV = E_OK; + AUDIO_VOL_LEVEL maxVolLvl = 0; + UINT32 tmpVol = 0; + UINT32 openAud = 0; + + DbgMsg_DrvSoundIO(("+%s:vol=%d\r\n", __func__, vol)); + + //if (0 == aud_getLockStatus()) + { + retV = aud_open(); + if (E_OK == retV) { + openAud = TRUE; + } else { + return retV; + } + } + gCurDrvSndVol = vol; + if (vol == 0) { + aud_setVolume(AUDIO_VOL_MUTE); + } else { + maxVolLvl = aud_getTotalVolLevel(); + tmpVol = (vol * maxVolLvl) / 100; + tmpVol = (tmpVol < maxVolLvl) ? (tmpVol + 1) : tmpVol; + DbgMsg_DrvSoundIO(("%s:Cal=%d,max=%d,set=%d\r\n", __func__, gCurDrvSndVol, maxVolLvl, tmpVol)); + if (maxVolLvl == AUDIO_VOL_LEVEL8) { + if (tmpVol >= AUDIO_VOL_LEVEL8) { + tmpVol = AUDIO_VOL_7; + } + } else { + if (tmpVol >= AUDIO_VOL_LEVEL64) { + tmpVol = AUDIO_VOL_63; + } + } + aud_setVolume(tmpVol); + } + if (openAud == TRUE) { + aud_close(); + } + DbgMsg_DrvSoundIO(("-%s:finalVol=%d,max=%d,set=%d,opened=%d\r\n", __func__, gCurDrvSndVol, maxVolLvl, tmpVol, openAud)); + return retV; +} + +ER DrvSound_SetSR(UINT32 audSR, PAUDTS_OBJ pAudPlayObj) +{ + ER retV = E_OK; + DbgMsg_DrvSoundIO(("+%s:sr=%d, audObj=0x%x\r\n", __func__, audSR, pAudPlayObj)); + + if (0 == pAudPlayObj) { + DBG_ERR("No AudObj\r\n"); + return E_PAR; + } + if (DRVSOUND_SR_8000 >= audSR) { + pAudPlayObj->setSamplingRate(AUDIO_SR_8000); + } else if (DRVSOUND_SR_11025 >= audSR) { + pAudPlayObj->setSamplingRate(AUDIO_SR_11025); + } else if (DRVSOUND_SR_12000 >= audSR) { + pAudPlayObj->setSamplingRate(AUDIO_SR_12000); + } else if (DRVSOUND_SR_16000 >= audSR) { + pAudPlayObj->setSamplingRate(AUDIO_SR_16000); + } else if (DRVSOUND_SR_22050 >= audSR) { + pAudPlayObj->setSamplingRate(AUDIO_SR_22050); + } else if (DRVSOUND_SR_24000 >= audSR) { + pAudPlayObj->setSamplingRate(AUDIO_SR_24000); + } else if (DRVSOUND_SR_32000 >= audSR) { + pAudPlayObj->setSamplingRate(AUDIO_SR_32000); + } else if (DRVSOUND_SR_44100 >= audSR) { + pAudPlayObj->setSamplingRate(AUDIO_SR_44100); + } else { + pAudPlayObj->setSamplingRate(AUDIO_SR_48000); + } + DbgMsg_DrvSoundIO(("-%s:sr=%d\r\n", __func__, audSR)); + return retV; +} +ER DrvSound_SetCh(PDXSOUND_AUD_CH pDxSndAudCh, PAUDTS_OBJ pAudObj) +{ + AUDIO_CH audCh = pDxSndAudCh->audch; + UINT32 monoExpand = pDxSndAudCh->monoExpand; + ER retV = E_OK; + DbgMsg_DrvSoundIO(("+%s:ch=%d,isMono=%d\r\n", __func__, audCh, monoExpand)); + + if (0 == pAudObj) { + DBG_ERR("pAudPlayObj NULL\r\n"); + return E_PAR; + } else if (FALSE == pAudObj->isOpened()) { + DBG_ERR("pAudPlayObj NOT Opened\r\n"); + return E_OACV; + } + //aud_setChannel(audCh); + pAudObj->setChannel(audCh); + if (AUDIO_CH_STEREO == audCh) { + if (AUDTS_CH_RX == pAudObj->AudTSCH) { + pAudObj->setFeature(AUDTS_FEATURE_RECORD_PCM_EXPAND, FALSE); + } else { + pAudObj->setFeature(AUDTS_FEATURE_PLAYBACK_PCM_EXPAND, FALSE); + } + + } else { + if (AUDTS_CH_RX == pAudObj->AudTSCH) { + pAudObj->setFeature(AUDTS_FEATURE_RECORD_PCM_EXPAND, monoExpand); + } else { + pAudObj->setFeature(AUDTS_FEATURE_PLAYBACK_PCM_EXPAND, monoExpand); + } + + } + DbgMsg_DrvSoundIO(("-%s:ch=%d,isMono=%d\r\n", __func__, audCh, monoExpand)); + return retV; +} + +//#NT#2013/03/06#Lily Kao -end + +/** + Detect Audio is plugging in or unplugged + + Detect Audio is plugging in or unplugged. + Return TRUE if Audio is plugging in, FALSE if Audio is unplugged. + + @param void + @return BOOL: TRUE -> Audio is plugging in, FALSE -> Audio is unplugged +*/ +/* +BOOL GPIOMap_DetAudio(void) +{ + return FALSE; +} +*/ + +/** + Detect which kind of Audio Output Device is plugging in or unplugged + No Sample code for detecting now + @param void + @return AUDIO_OUTPUT + AUDIO_OUTPUT_SPK, ///< Speaker + AUDIO_OUTPUT_HP, ///< Headphone + AUDIO_OUTPUT_LINE, ///< Line Out + AUDIO_OUTPUT_MONO ///< Mono Out +*/ +AUDIO_OUTPUT GPIOMap_DetAudioOutDevice(void) +{ + return AUDIO_OUTPUT_LINE; + /* + #if (AIN_DET_CTRL == AIN_DET_DUMMY) + return AUDIO_OUTPUT_SPK; + #endif + #if ((AIN_DET_CTRL == AIN_DET_BY_VIO) && (USE_VIO == ENABLE)) + return (vio_getpin(VIO_AIN_DET) != 0) ? AUDIO_OUTPUT_LINE : AUDIO_OUTPUT_SPK; + #endif + #if (AIN_DET_CTRL == AIN_DET_BY_GPIO) + return (gpio_getPin(GPIO_AIN_PLUG) == 0) ? AUDIO_OUTPUT_SPK : AUDIO_OUTPUT_LINE; + #endif + */ +} +//XXXXXXXXXXXXXXX 2009/06/12 Lily Kao -begin +/* +void GPIOMap_DetSetAudioOutDevice(void) +{ + AUDIO_OUTPUT audiOut = GPIOMap_DetAudioOutDevice(); + + GxSoud_SetAudioOutDevice(audiOut); + return; +} +*/ +//XXXXXXXXXXXXXXX 2009/06/12 Lily Kao -end + +/** + Turn on External Amplifier + + If bEn == TRUE, Turn on External Amplifier + If bEn == FALSE, Turn off External Amplifier(mute). + + @param BOOL bEn: TRUE -> turn on, FALSE -> turn off + @return void +*/ +#if 0 +void GPIOMap_TurnOnExtrAmp(BOOL bEn) +{ + DBG_IND("++GPIOMap_TurnOnExtrAmp:%x\r\n", bEn); + if (bEn == TRUE) { + //gpio_setPin(xxx); + } else { + //gpio_clearPin(xxx); + } + DBG_IND("--GPIOMap_TurnOnExtrAmp:%x\r\n", bEn); +} +#endif + +ER DrvSound_GetExtCodecFP(PAUDIO_CODEC_FUNC pAudCodecFunc) +{ + ER retV = E_OK; + +#if defined(_AudCodecExt_WM8978_) + audExtCodec_getFP(pAudCodecFunc); +#elif defined(_AudCodecExt_EMU_) + audExtCodecEMU_getFP(pAudCodecFunc); +#else + DBG_ERR("Not support exernal codec\r\n"); + retV = E_SYS; +#endif + + return retV; +} + +#if defined( _AudCodecExt_None_)//no external codec, use embeded codec +void DrvSound_SetAudioDevInitData(AUDIO_DEVICE_OBJ *pAudioDevice, AUDIO_SETTING *pAudioSetting) +{ + DBG_IND("++DrvSound_SetAudioDevInitData:Dev=0x%x, Set=0x%x\r\n", pAudioDevice, pAudioSetting); + if (pAudioDevice) { + //pAudioDevice->pEventHandler = NULL; + + pAudioDevice->uiGPIOColdReset = 0; + + //pAudioDevice->uiI2SCtrl = AUDIO_I2SCTRL_NONE; + pAudioDevice->uiI2SCtrl = AUDIO_I2SCTRL_GPIO_I2C; + + pAudioDevice->uiChannel = 0; + + //pAudioDevice->uiGPIOData = 0; + pAudioDevice->uiGPIOData = P_GPIO_0; + + //pAudioDevice->uiGPIOClk = 0; + pAudioDevice->uiGPIOClk = P_GPIO_2; + +#if 1 //FPGA_HDMI + pAudioDevice->uiI2SCtrl = AUDIO_I2SCTRL_NONE; + pAudioDevice->uiChannel = 0; + pAudioDevice->uiGPIOData = 0; + pAudioDevice->uiGPIOClk = 0; +#endif + + pAudioDevice->uiGPIOCS = 0; + pAudioDevice->uiADCZero = 0; + } + if (pAudioSetting) { + pAudioSetting->Clock.bClkExt = FALSE; // Must be + pAudioSetting->Clock.Clk = AUDIO_CLK_12288; // Clock = Sampling rate * 256 + pAudioSetting->I2S.bMaster = TRUE; // Must be + pAudioSetting->I2S.I2SFmt = AUDIO_I2SFMT_STANDARD; // Must be + pAudioSetting->I2S.ClkRatio = AUDIO_I2SCLKR_256FS_32BIT; // Must be + pAudioSetting->Fmt = AUDIO_FMT_I2S; // Must be + pAudioSetting->SamplingRate = AUDIO_SR_48000; // Sampling rate = Clock / 256 + pAudioSetting->Channel = AUDIO_CH_STEREO;;//AUDIO_CH_RIGHT; // Audio channel + pAudioSetting->RecSrc = AUDIO_RECSRC_MIC; // Must be + pAudioSetting->Output = GPIOMap_DetAudioOutDevice(); //AUDIO_OUTPUT_SPK; + pAudioSetting->bEmbedded = TRUE; // Must be, if you want to use the audio I/O pin + } + DBG_IND("--DrvSound_DefaultAUdioSettingData\r\n"); +} +#elif defined(_AudCodecExt_WM8978_)//init for WM8978 +void DrvSound_SetAudioDevInitData(AUDIO_DEVICE_OBJ *pAudioDevice, AUDIO_SETTING *pAudioSetting) +{ + AUDIO_CODEC_FUNC AudCodecFunc; + DBG_IND("++DrvSound_SetAudioDevInitData:Dev=0x%x, Set=0x%x\r\n", pAudioDevice, pAudioSetting); + if (pAudioDevice) { + //pAudioDevice->pEventHandler = NULL; + pAudioDevice->uiGPIOColdReset = 0; + pAudioDevice->uiI2SCtrl = AUDIO_I2SCTRL_GPIO_I2C; + pAudioDevice->uiChannel = 0; + pAudioDevice->uiGPIOData = P_GPIO_17;//P_GPIO_28; + pAudioDevice->uiGPIOClk = P_GPIO_18;//P_GPIO_29; + pAudioDevice->uiGPIOCS = 0; + pAudioDevice->uiADCZero = 0; + } + if (pAudioSetting) { + pAudioSetting->Clock.bClkExt = external_setting.Clock.bClkExt; // Must be + pAudioSetting->I2S.bMaster = external_setting.I2S.bMaster; // Must be + pAudioSetting->I2S.I2SFmt = external_setting.I2S.I2SFmt; // Must be + pAudioSetting->I2S.ClkRatio = external_setting.I2S.ClkRatio; // Must be + pAudioSetting->Fmt = external_setting.Fmt; // Must be + pAudioSetting->Clock.Clk = external_setting.Clock.Clk; // Clock = Sampling rate * 256 + pAudioSetting->SamplingRate = external_setting.SamplingRate; // Sampling rate = Clock / 256 + pAudioSetting->Channel = external_setting.Channel; // Audio channel + pAudioSetting->RecSrc = external_setting.RecSrc; // Must be + pAudioSetting->Output = external_setting.Output; // Output source + pAudioSetting->bEmbedded = external_setting.bEmbedded; // Must be. (Don't care in audio lib) + } + DrvSound_GetExtCodecFP(&AudCodecFunc); + aud_setExtCodec(&AudCodecFunc); + DBG_IND("--DrvSound_DefaultAUdioSettingData\r\n"); +} +#elif defined(_AudCodecExt_EMU_)//init for emu +void DrvSound_SetAudioDevInitData(AUDIO_DEVICE_OBJ *pAudioDevice, AUDIO_SETTING *pAudioSetting) +{ + AUDIO_CODEC_FUNC AudCodecFunc; + DBG_IND("++DrvSound_SetAudioDevInitData:Dev=0x%x, Set=0x%x\r\n", pAudioDevice, pAudioSetting); + if (pAudioDevice) { + //pAudioDevice->pEventHandler = NULL; + pAudioDevice->uiGPIOColdReset = 0; + pAudioDevice->uiI2SCtrl = AUDIO_I2SCTRL_GPIO_I2C; + pAudioDevice->uiChannel = 0; + pAudioDevice->uiGPIOData = P_GPIO_17;//P_GPIO_28; + pAudioDevice->uiGPIOClk = P_GPIO_18;//P_GPIO_29; + pAudioDevice->uiGPIOCS = 0; + pAudioDevice->uiADCZero = 0; + } + if (pAudioSetting) { + pAudioSetting->Clock.bClkExt = external_setting.Clock.bClkExt; // Must be + pAudioSetting->I2S.bMaster = external_setting.I2S.bMaster; // Must be + pAudioSetting->I2S.I2SFmt = external_setting.I2S.I2SFmt; // Must be + pAudioSetting->I2S.ClkRatio = external_setting.I2S.ClkRatio; // Must be + pAudioSetting->Fmt = external_setting.Fmt; // Must be + pAudioSetting->Clock.Clk = external_setting.Clock.Clk; // Clock = Sampling rate * 256 + pAudioSetting->SamplingRate = external_setting.SamplingRate; // Sampling rate = Clock / 256 + pAudioSetting->Channel = external_setting.Channel; // Audio channel + pAudioSetting->RecSrc = external_setting.RecSrc; // Must be + pAudioSetting->Output = external_setting.Output; // Output source + pAudioSetting->bEmbedded = external_setting.bEmbedded; // Must be. (Don't care in audio lib) + } + DrvSound_GetExtCodecFP(&AudCodecFunc); + aud_setExtCodec(&AudCodecFunc); + DBG_IND("--DrvSound_DefaultAUdioSettingData\r\n"); +} +#else +void DrvSound_SetAudioDevInitData(AUDIO_DEVICE_OBJ *pAudioDevice, AUDIO_SETTING *pAudioSetting) +{ + DBG_FATAL("AUDIO SETTING ERROR!\r\n"); +} +#endif + + +void DrvSound_SetAudioFeature(void) +{ + AUDIO_DEFSET default_set = DRVSOUND_DEFAULT_SET; + DBG_IND("++\r\n"); + +#if 1 + aud_setDefaultSettings(default_set); + #if defined(_MODEL_P2PCAM1_EVB_) || defined(_MODEL_P2PCAM2_EVB_) + aud_setFeature(AUDIO_FEATURE_PDVCMBIAS_ALWAYSON, TRUE); + #endif + gDrvSndConfigALC = eac_getAdConfig(EAC_CONFIG_AD_ALC_EN); +#else + // + // Note: These default audio recoding setting is good for reference board. + // For audio recording quaility fine-tuning request, please help to connect Novatek Engineer. + // Enable ALC/Noise Gate function + aud_setFeature(AUDIO_FEATURE_ALC, TRUE);//HDMI test + aud_setFeature(AUDIO_FEATURE_NG_WITH_MICBOOST, FALSE); + aud_setParameter(AUDIO_PARAMETER_NOISETHD_WITH_BOOST, EAC_NG_THRESHOLD_N58P5_DB); + aud_setParameter(AUDIO_PARAMETER_ALC_MAXGAIN, EAC_ALC_MAXGAIN_P21P0_DB); + aud_setFeature(AUDIO_FEATURE_MICBOOST, TRUE); + aud_setParameter(AUDIO_PARAMETER_NOISEGAIN, 0x1); + aud_setParameter(AUDIO_PARAMETER_NOISEGATE_TIME_RESOLUTION, EAC_ALC_TRESO_BASIS_45000US); + aud_setParameter(AUDIO_PARAMETER_ALC_TIME_RESOLUTION, EAC_ALC_TRESO_BASIS_5000US); + aud_setParameter(AUDIO_PARAMETER_ALC_ATTACK_TIME, 0x4); + aud_setParameter(AUDIO_PARAMETER_ALC_DECAY_TIME, 0x5); + aud_setParameter(AUDIO_PARAMETER_ALCNG_ATTACK_TIME, 0x6); + aud_setParameter(AUDIO_PARAMETER_ALCNG_DECAY_TIME, 0x3); +#endif + aud_setTotalVolLevel(gDrvSndTotalAudVolLvl); + aud_setVolume(gCurDrvSndVol); + aud_setGain(gCurDrvSndGain); + + DBG_IND("--\r\n"); +} + +static void DrvSound_SwitchAudioSetting(UINT32 setting) +{ + ER retV = E_OK; + + DBG_IND("++\r\n"); + + retV = aud_open(); + if (E_OK != retV) { + DBG_ERR("aud_open fail =%d\r\n", retV); + return; + } + + switch (setting) { + default: { + aud_setDefaultSettings(DRVSOUND_DEFAULT_SET); + #if defined(_MODEL_P2PCAM1_EVB_) || defined(_MODEL_P2PCAM2_EVB_) + aud_setFeature(AUDIO_FEATURE_PDVCMBIAS_ALWAYSON, TRUE); + #endif + gDrvSndConfigALC = eac_getAdConfig(EAC_CONFIG_AD_ALC_EN); + } + break; + } + + aud_close(); + + DBG_IND("--\r\n"); +} + +//#NT#2013/06/14#Calvin Chang#Get HDMI sample rate -begin +/* +UINT32 DrvSound_GetHDMIAudSR(void) +{ + UINT32 audsr; + HDMI_AUDIOFMT hdmisr; + + hdmisr = hdmitx_getConfig(HDMI_CONFIG_ID_AUDIO); + + switch (hdmisr) { + case HDMI_AUDIO32KHZ: + audsr = 32000; + break; + case HDMI_AUDIO44_1KHZ: + audsr = 44100; + break; + case HDMI_AUDIO48KHZ: + audsr = 48000; + break; + default: + DBG_ERR("hdmi sample is %d\r\n", hdmisr); + audsr = 0; + break; + } + + return audsr; + +} +*/ +//#NT#2013/06/14#Calvin Chang -end + +ER DrvSound_SetTotalGainLvl(AUDIO_RECG_LEVEL gainLvl) +{ + ER retV = E_OK; + + //if (0 == aud_getLockStatus()) + { + retV = aud_open(); + if (E_OK != retV) { + DBG_ERR("aud_open fail =%d\r\n", retV); + return retV; + } + } + gDrvSndTotalGainLvl = gainLvl; + aud_setTotalRecordGainLevel(gainLvl); + aud_close(); + DBG_IND("Cur=%d,total=%d\r\n", gCurDrvSndGain, gDrvSndTotalGainLvl); + return retV; +} +// vol: 0 ~ 100 +ER DrvSound_SetAudGain(UINT32 vol) +{ + //AUDIO_DEVICE_OBJ AudioDevObj; + BOOL bAudioALCEn = TRUE; + UINT32 uAudGain = AUDIO_GAIN_MUTE; + UINT32 uAudMaxGain = (UINT32)aud_getTotalGainLevel(); + UINT32 ustep = 0; + UINT32 upercgain = 0; + + gCurDrvSndGain = vol; + + // Map the percentage of volume to Audio Gain + switch (vol) { + case 0: { //0% (Mute) + bAudioALCEn = FALSE; + uAudGain = AUDIO_GAIN_MUTE; + } + break; + + default: { + ustep = (100 / (UINT32)uAudMaxGain); // AUDIO_GAIN_7 is maximum value + + upercgain = ustep; + + while (upercgain < vol) { + upercgain += ustep; + uAudGain++; + } + } + break; + } + + if (aud_getLockStatus()) { + if (gDrvSndConfigALC) { + aud_setFeature(AUDIO_FEATURE_ALC, bAudioALCEn); + } + aud_setGain(uAudGain); + } else { + if (E_OK == aud_open()) { + if (gDrvSndConfigALC) { + aud_setFeature(AUDIO_FEATURE_ALC, bAudioALCEn); + } + aud_setGain(uAudGain); + aud_close(); + } else { + DBG_ERR("aud_open fail %d\r\n"); + return E_PAR; + } + } + + DbgMsg_DrvSoundIO(("-%s:finalGain=%d,max=%d,set=%d\r\n", __func__, gCurDrvSndGain, uAudMaxGain, uAudGain)); + + return E_OK; + +} + +ER DrvSound_SetSR_Resample(PDXSOUND_AUD_RESAMPLE_INFO pAudResampleInfo, PAUDTS_OBJ pAudObj) +{ + ER retV = E_OK; + AUDIO_RESAMPLE_INFO ResampleInfo = {0}; + BOOL bResampleEnable = FALSE; + AUDIO_SR uiTargetAudRate; + HDMI_AUDIOFMT uiHDMIAudRate; + UINT32 audSR = pAudResampleInfo->audSR; + UINT32 uiWorkBufAddr = pAudResampleInfo->uiWorkBufAddr; + UINT32 uiWorkBufSize = pAudResampleInfo->uiWorkBufSize; + + DbgMsg_DrvSoundIO(("+%s:sr=%d\r\n", __func__, audSR)); + //DbgCode_DrvSound(if (aud_getLockStatus() == NO_TASK_LOCKED) DBG_ERR("%s: AudDrv not open\r\n",__func__);) + + // Set Audio + if (DRVSOUND_SR_8000 >= audSR) { + pAudObj->setSamplingRate(AUDIO_SR_8000); + } else if (DRVSOUND_SR_11025 >= audSR) { + pAudObj->setSamplingRate(AUDIO_SR_11025); + } else if (DRVSOUND_SR_12000 >= audSR) { + pAudObj->setSamplingRate(AUDIO_SR_12000); + } else if (DRVSOUND_SR_16000 >= audSR) { + pAudObj->setSamplingRate(AUDIO_SR_16000); + } else if (DRVSOUND_SR_22050 >= audSR) { + pAudObj->setSamplingRate(AUDIO_SR_22050); + } else if (DRVSOUND_SR_24000 >= audSR) { + pAudObj->setSamplingRate(AUDIO_SR_24000); + } else if (DRVSOUND_SR_32000 >= audSR) { + pAudObj->setSamplingRate(AUDIO_SR_32000); + } else if (DRVSOUND_SR_44100 >= audSR) { + pAudObj->setSamplingRate(AUDIO_SR_44100); + } else { + pAudObj->setSamplingRate(AUDIO_SR_48000); + } + DbgMsg_DrvSoundIO(("-%s:sr=%d\r\n", __func__, audSR)); + + // Set HDMI & Resample + switch (audSR) { + case DRVSOUND_SR_8000: { + bResampleEnable = TRUE; + uiTargetAudRate = AUDIO_SR_32000; + uiHDMIAudRate = HDMI_AUDIO32KHZ; + break; + } + + case DRVSOUND_SR_11025: { + bResampleEnable = TRUE; + uiTargetAudRate = AUDIO_SR_44100; + uiHDMIAudRate = HDMI_AUDIO44_1KHZ; + break; + } + + case DRVSOUND_SR_12000: { + bResampleEnable = TRUE; + uiTargetAudRate = AUDIO_SR_32000; + uiHDMIAudRate = HDMI_AUDIO32KHZ; + break; + } + + case DRVSOUND_SR_16000: { + bResampleEnable = TRUE; + uiTargetAudRate = AUDIO_SR_32000; + uiHDMIAudRate = HDMI_AUDIO32KHZ; + break; + } + + case DRVSOUND_SR_22050: { + bResampleEnable = TRUE; + uiTargetAudRate = AUDIO_SR_44100; + uiHDMIAudRate = HDMI_AUDIO44_1KHZ; + break; + } + + case DRVSOUND_SR_24000: { + bResampleEnable = TRUE; + uiTargetAudRate = AUDIO_SR_48000; + uiHDMIAudRate = HDMI_AUDIO48KHZ; + break; + } + + case DRVSOUND_SR_32000: { + bResampleEnable = FALSE; + uiTargetAudRate = AUDIO_SR_32000; + uiHDMIAudRate = HDMI_AUDIO32KHZ; + break; + } + + case DRVSOUND_SR_44100: { + bResampleEnable = FALSE; + uiTargetAudRate = AUDIO_SR_44100; + uiHDMIAudRate = HDMI_AUDIO44_1KHZ; + break; + } + + default: + case DRVSOUND_SR_48000: { + bResampleEnable = FALSE; + uiTargetAudRate = AUDIO_SR_48000; + uiHDMIAudRate = HDMI_AUDIO48KHZ; + break; + } + } + + if (uiWorkBufSize < (uiTargetAudRate * 4 * 4)) { + DBG_ERR("%s Buffer size is not enough!\r\n", __func__); + return E_SYS; + } + + // Set HDMI audio rate + //if(hdmitx_open()) + { + //hdmitx_setConfig(HDMI_CONFIG_ID_AUDIO, uiHDMIAudRate); + } + + // Set Resample + ResampleInfo.bResample = bResampleEnable; + ResampleInfo.AudioTargetSR = uiTargetAudRate; + ResampleInfo.uiDstBufAddr = uiWorkBufAddr; + ResampleInfo.uiDstBufSize = uiWorkBufSize; + + //aud_setResampleInfo(&ResampleInfo); + if (FALSE == pAudObj->setResampleInfo(&ResampleInfo)) { + DBG_IND("aud resample false\r\n"); + } + + return retV; +} + +ER DrvSound_SwitchExtCodec(BOOL isExt) +{ + ER retV = E_OK; + +#ifndef _AudCodecExt_None_ + AUDIO_CODEC_FUNC codec_func = {0}; + + if (isExt != gDrvSndCodecExt) { + if (isExt) { + //switch to external codec + DrvSound_GetExtCodecFP(&codec_func); + aud_switchCodecDynamic(&codec_func, &external_setting); + DrvSound_SetAudioFeature(); + } else { + //switch to embedded codec + aud_switchCodecDynamic(NULL, &embedded_setting); + DrvSound_SetAudioFeature(); + } + } +#else + if (isExt) { + DBG_ERR("Not support external codec\r\n"); + } +#endif + + gDrvSndCodecExt = isExt; + + DBG_IND("gDrvSndCodecExt = %d\r\n", gDrvSndCodecExt); + + return retV; +} + +//======================================================== +UINT32 DrvSound_Init(void *pInitParam); +UINT32 DrvSound_Open(void); +UINT32 DrvSound_Close(void);; +UINT32 DrvSound_Getcaps(UINT32 CapID, UINT32 Param1); +UINT32 DrvSound_Setcfgs(UINT32 CfgID, UINT32 Param1); +UINT32 DrvSound_Command(CHAR *pcCmdStr); +UINT32 DrvSound_Control(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); +UINT32 DrvSound_State(UINT32 StateID, UINT32 Value); + +DX_OBJECT gDevSnd = { + DXFLAG_SIGN, + DX_CLASS_AUDIO_EXT, + DXSOUND_VER, + "DrvExt Sound", + 0, 0, 0, 0, + DrvSound_Getcaps, + DrvSound_Setcfgs, + DrvSound_Init, + DrvSound_Open, + DrvSound_Close, + DrvSound_State, + DrvSound_Control, + DrvSound_Command, + 0, +}; + +UINT32 DrvSound_Init(void *pInitParam) +{ + ER retV = aud_open(); + DBG_IND("+-:0x%x\r\n", pInitParam); + + DrvSound_SetAudioDevInitData(NULL, (AUDIO_SETTING *)pInitParam); + aud_init((AUDIO_SETTING *)pInitParam); + if (retV != E_OK) { + DBG_ERR("aud_open fail = %d\r\n", retV); + return retV; + } + DrvSound_SetAudioFeature(); + aud_close(); + return DX_OK; +} + +UINT32 DrvSound_Open(void) +{ + DBG_IND("+-\r\n"); + return DX_OK; +} + +UINT32 DrvSound_Close(void) +{ + DBG_IND("+-\r\n"); + return DX_OK; +} +UINT32 DrvSound_Getcaps(UINT32 CapID, UINT32 Param1) +{ + UINT32 retV = 0; + DBG_IND(":CapID=%d,Param1=%d+\r\n", CapID, Param1); + switch (CapID) { + case DXSOUND_CAP_VOLUME: + retV = DrvSound_GetVol(); + break; + /* case DXSOUND_CAP_GET_HDMI_SAMPLERATE: + retV = DrvSound_GetHDMIAudSR(); + break; + */ + case DXSOUND_CAP_GET_AUDOUTDEV: + retV = (UINT32)(GPIOMap_DetAudioOutDevice() == AUDIO_OUTPUT_LINE); + break; + case DXSOUND_CAP_SAMPLERATE: + case DXSOUND_CAP_CHANNEL: + case DXSOUND_CAP_GAIN: + default: + break; + } + DBG_IND(":CapID=%d,Param1=%d,v=%d-\r\n", CapID, Param1, retV); + return retV; +} +UINT32 DrvSound_Setcfgs(UINT32 CfgID, UINT32 Param1) +{ + DBG_IND("+-\r\n"); + return DX_OK; +} +UINT32 DrvSound_Command(CHAR *pcCmdStr) +{ + DBG_IND("+-\r\n"); + switch (*pcCmdStr) { + case 'd': + /*if (!strncmp(pcCmdStr, "disp tv dump", 12)) + { + ... + return TRUE; + }*/ + break; +#if (USE_VIO == ENABLE) + case 'v': + if (!strncmp(pcCmdStr, "vdet", 4)) { + char ts[10]; + UINT32 v1; + sscanf_s(pcCmdStr, "%s %lu", ts, sizeof(ts), &v1); //fix for CID 44013 + DBG_IND("v1 = %d\r\n", v1); + vio_setpin(VIO_AIN_DET, v1); + return TRUE; + } + break; +#endif + } + return FALSE; +} + +UINT32 DrvSound_Control(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) +{ + UINT32 retV = DX_OK; + DBG_IND(":CtrlID=%d,P1=0x%x,P2=0x%x+\r\n", CtrlID, Param1, Param2); + switch (CtrlID) { + case DXSOUND_CAP_SET_DEVINITDATA: + DrvSound_SetAudioDevInitData((AUDIO_DEVICE_OBJ *)Param1, (AUDIO_SETTING *)Param2); + //if (0 == aud_getLockStatus()) + { + retV = aud_open(); + if (E_OK != retV) { + DBG_ERR("aud_open fail =%d\r\n", retV); + return retV; + } + } + //aud_init((AUDIO_SETTING *)Param2); + aud_setDeviceObject((AUDIO_DEVICE_OBJ *)Param1); + aud_close(); + break; + case DXSOUND_CAP_SET_CODEC: + DrvSound_SetCodec((PAUDIO_CODEC_FUNC)Param1, (AUDIO_CODECSEL)Param2); + break; + case DXSOUND_CAP_SET_TOTAL_VOLUME_LEVEL: + DrvSound_SetTotalVolLvl((AUDIO_VOL_LEVEL)Param1); + break; + case DXSOUND_CAP_VOLUME: + retV = (UINT32)DrvSound_SetVol(Param1); + break; + case DXSOUND_CAP_SAMPLERATE: + retV = (UINT32)DrvSound_SetSR(Param1, (PAUDTS_OBJ)Param2); + break; + case DXSOUND_CAP_CHANNEL: + retV = (UINT32)DrvSound_SetCh((PDXSOUND_AUD_CH)Param1, (PAUDTS_OBJ)Param2); + break; + case DXSOUND_CAP_GAIN: + retV = (UINT32)DrvSound_SetAudGain(Param1); + break; + case DXSOUND_CAP_RESAMPLE: + DrvSound_SetSR_Resample((PDXSOUND_AUD_RESAMPLE_INFO)Param1, (PAUDTS_OBJ)Param2); + break; + case DXSOUND_CAP_SET_OUTDEV: + DrvSound_SetOutDevConfig(Param1, (PAUDTS_OBJ)Param2); + break; + case DXSOUND_CAP_SET_TOTAL_GAIN_LEVEL: + DrvSound_SetTotalGainLvl((AUDIO_RECG_LEVEL)Param1); + break; + case DXSOUND_CAP_SWITCH_EXT_CODEC: + DrvSound_SwitchExtCodec((BOOL)Param1); + break; + case DXSOUND_CAP_SWITCH_AUD_SETTING: + DrvSound_SwitchAudioSetting(Param1); + default: + break; + } + DBG_IND(":CtrlID=%d,P1=%d,P2=%d-\r\n", CtrlID, Param1, Param2); + return retV; +} + +UINT32 DrvSound_State(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_IND("+-\r\n"); + return DX_OK; +} + +//============= + +//XXXXXXXXXXXXXXX 2009/06/16 Lily Kao -end + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_Card.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_Card.c new file mode 100755 index 000000000..7e6b839fc --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_Card.c @@ -0,0 +1,439 @@ +/** + Copyright Novatek Microelectronics Corp. 2005. All rights reserved. + + @file KeyScanSD.c + @ingroup mIPRJAPKeyIO + + @brief Detect SD card status + Detect SD card insert/remove, lock/unlock + + @note Nothing. + + @date 2005/12/15 +*/ + +/** \addtogroup mIPRJAPKeyIO */ +//@{ + +#include "kwrap/type.h" +#include "DxCfg.h" +#include "IOCfg.h" + +#include "DxStorage.h" +#include "DxCommon.h" +#include "DxApi.h" + +#include "sdio.h" +#if 0 +#include "SdmmcDesc.h" +#include "StrgDef.h" +#include "Debug.h" +#endif +#include "Utility/SwTimer.h" +#include "pll.h" + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 1 // 0=OFF, 1=ERROR, 2=TRACE +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +void DrvCARD_EnableCardPower(BOOL bEn); +BOOL DrvCARD_DetStrgCard(void); +BOOL DrvCARD_DetStrgCard_TRUE(void);//for eMMC +BOOL DrvCARD_DetStrgCardWP(void); +BOOL DrvCARD_DetStrgCardWP_FALSE(void);//for eMMC + +//public func +UINT32 DrvCARDGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvCARDGetcaps3(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvCARDInit(void *pInitParam); // Set Init Parameters +UINT32 DrvCARDInit3(void *pInitParam); // Set Init Parameters +UINT32 DrvCARDOpen(void); // Common Constructor +UINT32 DrvCARDClose(void); // Common Destructor +UINT32 DrvCARDState(UINT32 StateID, UINT32 Value); // General Properties +UINT32 DrvCARDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +UINT32 DrvCARDCommand(CHAR *pcCmdStr); //General Command Console + +#if !defined(_CARD1_NONE_) +//dx object +DX_OBJECT gDevCARD1 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_CARD1, + STORAGE_VER, + "Storage_Card1", + 0, 0, 0, 0, + DrvCARDGetcaps, + 0, + DrvCARDInit, + DrvCARDOpen, + DrvCARDClose, + DrvCARDState, + DrvCARDControl, + DrvCARDCommand, + 0, +}; +#endif + +#if !defined(_CARD3_NONE_) +//for eMMC test on FPGA +DX_OBJECT gDevCARD3 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_CARD3, + STORAGE_VER, + "Storage_Card3", + 0, 0, 0, 0, + DrvCARDGetcaps3, + 0, + DrvCARDInit3, + DrvCARDOpen, + DrvCARDClose, + DrvCARDState, + DrvCARDControl, + DrvCARDCommand, + 0, +}; +#endif + + +#if !defined(_CARD1_NONE_) +UINT32 DrvCARDGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID) { + case STORAGE_CAPS_BASE: + DBG_IND("get card plug caps\r\n"); + v = STORAGE_BF_DETPLUG | STORAGE_BF_DETWP; + break; + case STORAGE_CAPS_HANDLE: + v = (UINT32)sdio_getStorageObject(STRG_OBJ_FAT1); + break; + default: + break; + } + return v; +} +#endif + +#if !defined(_CARD3_NONE_) +UINT32 DrvCARDGetcaps3(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID) { + case STORAGE_CAPS_BASE: + DBG_IND("get card plug caps\r\n"); + v = STORAGE_BF_DETPLUG | STORAGE_BF_DETWP; + break; + case STORAGE_CAPS_HANDLE: + CHKPNT; + v = (UINT32)sdio3_getStorageObject(STRG_OBJ_FAT1); + break; + default: + break; + } + return v; +} +#endif + +#if !defined(_CARD1_NONE_) +UINT32 DrvCARDInit(void *pInitParam) // Set Init Parameters +{ + PSTORAGE_OBJ pStrg; + DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete + + DBG_FUNC_BEGIN("\r\n"); + + pStrg = sdio_getStorageObject(STRG_OBJ_FAT1); + sdio_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCard); + sdio_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCardWP); + + + /* + // Enable High Speed mode + //sdio_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, (UINT32)(SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS|SDIO_BUS_SPEED_MODE_SDR12|SDIO_BUS_SPEED_MODE_SDR25|SDIO_BUS_SPEED_MODE_SDR50)); + sdio_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, (UINT32)(SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS|SDIO_BUS_SPEED_MODE_SDR12|SDIO_BUS_SPEED_MODE_SDR25|SDIO_BUS_SPEED_MODE_DDR50)); + */ + + //#NT#2017/10/24#Nestor Yang -begin + //#NT# Adjust SDIO driving, requested by SA1 + /* + // Enable setting driving sink of clock pin + sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, (UINT32)TRUE); + + // Default speed driving -> 5.0 mA (Shirley, 2017/09/22) + sdio_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 150); + //sdio_setConfig(SDIO_CONFIG_ID_DS_MAX_CLK, 48000000); //default for DS + + // High speed driving -> 10.0 mA (Shirley, 2017/09/22) + sdio_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 150); + */ + sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE); // for clock. + sdio_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_CMDDATA_EN, TRUE); // for cmd and data. + + // Default speed driving + sdio_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 200); + sdio_setConfig(SDIO_CONFIG_ID_DS_CMD_DRIVING, 150); + sdio_setConfig(SDIO_CONFIG_ID_DS_DATA_DRIVING, 150); + + // High speed driving + sdio_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 200); + sdio_setConfig(SDIO_CONFIG_ID_HS_CMD_DRIVING, 150); + sdio_setConfig(SDIO_CONFIG_ID_HS_DATA_DRIVING, 150); + //#NT#2017/10/24#Nestor Yang -end + + //sdio_setConfig(SDIO_CONFIG_ID_HS_MAX_CLK, 48000000); //default for HS + /* + // Set clock source + sdio_setConfig(SDIO_CONFIG_ID_SRCLK, PLL_CLKSEL_SDIO_48); + // Set maximum bus width to 8 bits + sdio_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_8_BITS); + */ + //sdio_setCallBack(SDIO_CALLBACK_POWER_CONTROL, (SDIO_CALLBACK_HDL)DrvCARD_EnableCardPower); //(to improve card capability) + + //if(STRG_OBJ_FAT1) + { + pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size); + } + + return DX_OK; +} +#endif + +#if !defined(_CARD3_NONE_) +UINT32 DrvCARDInit3(void *pInitParam) // Set Init Parameters +{ + PSTORAGE_OBJ pStrg; + DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete + + DBG_FUNC_BEGIN("\r\n"); + CHKPNT; + pStrg = sdio3_getStorageObject(STRG_OBJ_FAT1); + if (pStrg == NULL) { + DBG_ERR("Get SDIO3 storage object failed\r\n"); + return DX_NULL_POINTER; + } + + pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size); + + sdio3_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCard_TRUE); + sdio3_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)DrvCARD_DetStrgCardWP_FALSE); + + // Support default speed + high speed + sdio3_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS); + + // Default speed driving -> 5.0 mA + sdio3_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 50); + // High speed driving -> 10.0 mA + sdio3_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 100); + + // Adjust driving/sink according to operating mode + sdio3_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE); + + sdio3_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_4_BITS); + + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_OEMID, (UINT32)"NOVATEK"); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_VOL_LABLE, (UINT32)"SD_VOL"); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_RAND_VOL_ID_EN, TRUE); + + return DX_OK; +} +#endif + +#if !(defined(_CARD1_NONE_) && defined(_CARD3_NONE_)) +UINT32 DrvCARDOpen(void) // Common Constructor +{ + DrvCARD_EnableCardPower(TRUE); + + return DX_OK; +} + +UINT32 DrvCARDClose(void) // Common Destructor +{ + DrvCARD_EnableCardPower(FALSE); + + return DX_OK; +} + +UINT32 DrvCARDState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + DBG_IND("get %08x\r\n", StateID); + switch (StateID) { + case STORAGE_STATE_INSERT: + rvalue = DrvCARD_DetStrgCard(); + break; + case STORAGE_STATE_LOCK: { + BOOL bLock = FALSE; + if (DrvCARD_DetStrgCard()) { + bLock = DrvCARD_DetStrgCardWP(); + } + rvalue = bLock; + } + break; + break; + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("set %08x\r\n", StateID); + switch (StateID) { + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + } + return DX_OK; +} + +UINT32 DrvCARDControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + DBG_IND("ctrl %08x\r\n", CtrlID); + + switch (CtrlID) { + case STORAGE_CTRL_POWER: + DrvCARD_EnableCardPower(Param1); + break; + default: + DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID); + break; + } + return DX_OK; +} + +UINT32 DrvCARDCommand(CHAR *pcCmdStr) //General Command Console +{ + return FALSE; +} + +//////////////////////////////////////////////////////////////////////////////// +// GPIO related + +#define KEYSCAN_CD_GPIO_INT GPIO_INT_00 +#define KEYSCAN_CARDDET_INT DISABLE +#define KEYSCAN_SDWRPTDET_GPIO DISABLE + +void DrvCARD_EnableCardPower(BOOL bEn) +{ + gpio_setDir(GPIO_CARD_POWER, GPIO_DIR_OUTPUT); + if (bEn) { + DBG_IND("[SD] - card power enable\r\n"); + gpio_clearPin(GPIO_CARD_POWER); + SwTimer_DelayMs(20); + } else { + + DBG_IND("[SD] - card power disable\r\n"); + gpio_setPin(GPIO_CARD_POWER); + SwTimer_DelayMs(350); + } +} + +#if (KEYSCAN_CARDDET_INT == ENABLE) +static volatile UINT32 uiStrgCardIntCnt = 0; + +/** + ISR of SD card detection + + ISR of SD card detection + + @param void + @return void +*/ +static void KeyScan_DetStrgCardIsr(UINT32 uiEvent) +{ + uiStrgCardIntCnt++; + + // Debounce + if (uiStrgCardIntCnt > 1) { + uiStrgCardIntCnt = 0; + } +} +#endif + +void DrvCARD_SetInsert(UINT32 status) +{ +#if (KEYSCAN_CARDDET_INT == ENABLE) + if (status) { + gpio_setIntTypePol(KEYSCAN_CD_GPIO_INT, GPIO_INTTYPE_LEVEL, GPIO_INTPOL_POSHIGH); + } else { + gpio_setIntTypePol(KEYSCAN_CD_GPIO_INT, GPIO_INTTYPE_LEVEL, GPIO_INTPOL_NEGLOW); + } +#endif +} + +void DrvCARD_DetRestart(void) +{ +#if (KEYSCAN_CARDDET_INT == ENABLE) + gpio_setIntIsr(KEYSCAN_CD_GPIO_INT, KeyScan_DetStrgCardIsr); + gpio_enableInt(KEYSCAN_CD_GPIO_INT); +#endif +} + +/** + Detect Storage card is inserted or not + + Detect Storage card is inserted or not. + Return TRUE if storage card is inserted, FALSE if storage card is removed. + + @param void + @return BOOL: TRUE -> Storage card inserted, FALSE -> Storage card removed +*/ +BOOL DrvCARD_DetStrgCard(void) +{ +#if 1 + return (gpio_getPin(GPIO_CARD_DETECT) == 0 ? TRUE : FALSE); +#else + return TRUE; +#endif +} + +/** + Detect Storage card is write protected or not + + Detect Storage card is write protected or not. + Return TRUE if storage card is write protected, FALSE if storage card is not write protected. + + @param void + @return BOOL: TRUE -> Storage card is write protected, FALSE -> Storage card is not write protected +*/ +BOOL DrvCARD_DetStrgCardWP(void) +{ +#if 0 + return (gpio_getPin(GPIO_CARD_WP) == 1 ? TRUE : FALSE); +#else + return FALSE; +#endif +} + +/** + Always return card inserted (TRUE) for eMMC + + @param void + @return BOOL: TRUE -> Storage card inserted, FALSE -> Storage card removed +*/ +BOOL DrvCARD_DetStrgCard_TRUE(void) +{ + return TRUE; +} + +/** + Always return no write protected (FALSE) for eMMC + + @param void + @return BOOL: TRUE -> Storage card is write protected, FALSE -> Storage card is not write protected +*/ +BOOL DrvCARD_DetStrgCardWP_FALSE(void) +{ + return FALSE; +} + +#endif +//@} diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_EmbMem.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_EmbMem.c new file mode 100755 index 000000000..f71e190cd --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxStorage_EmbMem.c @@ -0,0 +1,569 @@ +#include "kwrap/type.h" +#include "DxCfg.h" +#include "IOCfg.h" + +#include "DxStorage.h" +#include "DxCommon.h" +#include "DxApi.h" +#include "DrvExt.h" + +#if 0 +#include "Debug.h" +#endif +#include "sdio.h" +#include "pad.h" +#if 0 +#include "StrgDef.h" +#endif +#include +#include "emb_partition_info.h" + +#if (!defined(_EMBMEM_NONE_)) && (!defined(_EMBMEM_UITRON_OFF_)) + +#if defined(_EMBMEM_NONE_) +#define EMB_GETSTRGOBJ(x) 0 //Always NULL +#elif defined(_EMBMEM_NAND_) || defined(_EMBMEM_SPI_NAND_) +#include "nand.h" +#define EMB_GETSTRGOBJ(x) nand_getStorageObject(x) +#elif defined(_EMBMEM_SPI_NOR_) +#include "nand.h" +//#include "RamDisk/RamDisk.h" +#define EMB_GETSTRGOBJ(x) 0//spiflash_getStorageObject(x) +#elif defined(_EMBMEM_EMMC_) +#include "sdio.h" +#define EMB_GETSTRGOBJ(x) sdio3_getStorageObject(x) +static BOOL xSdioDet(void) +{ + return TRUE; +} +static BOOL xSdioWp(void) +{ + return FALSE; +}; +#endif + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +//public func +UINT32 DrvEmbMemGetcaps0(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps1(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps2(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps3(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps4(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps5(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps6(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps7(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemGetcaps8(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DrvEmbMemInit(void *pInitParam); // Set Init Parameters +UINT32 DrvEmbMemOpen(void); // Common Constructor +UINT32 DrvEmbMemClose(void); // Common Destructor +UINT32 DrvEmbMemState(UINT32 StateID, UINT32 Value); // General Properties +UINT32 DrvEmbMemControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +UINT32 DrvEmbMemCommand(CHAR *pcCmdStr); //General Command Console + +//User define SPI-NOR table sample code +#if 0 +static SPI_FLASH_INFO user_define_spi_flash_support_tbl[] = { + // XTX PN25F32B (4MB) + { + //1st ID : id[0] 2nd ID : id[1] 3rd ID : id[2] + //manufacture ID memory type memory capacity + 0x0B, 0x40, 0x16, + //total size (unit: byte) sector size (unit: byte) block size (unit: byte) + 0x400000, 0x10000, 0x10000, + + //sectr count (unit: sector) support EWSR command support AAI command support SECTOR_ERASE command (0x20) + 0x800000 / 0x10000, FALSE, FALSE, TRUE, + + //CHIP erase time (unit: ms) Block erase time (unit: ms) Sector erase time (unit: ms) page program time (unit: ms) + 200000, 4000, 1600, 5, + + //Wide bus (dual/quad) supported by this flash + SPI_FLASH_BUSWIDTH_DUAL | SPI_FLASH_BUSWIDTH_QUAD_TYPE5 + }, + + // XTX PN25F64B (8MB) + { + //1st ID : id[0] 2nd ID : id[1] 3rd ID : id[2] + //manufacture ID memory type memory capacity + 0x0B, 0x40, 0x17, + //total size (unit: byte) sector size (unit: byte) block size (unit: byte) + 0x800000, 0x10000, 0x10000, + + //sectr count (unit: sector) support EWSR command support AAI command support SECTOR_ERASE command (0x20) + 0x800000 / 0x10000, FALSE, FALSE, TRUE, + + //CHIP erase time (unit: ms) Block erase time (unit: ms) Sector erase time (unit: ms) page program time (unit: ms) + 200000, 4000, 1600, 5, + SPI_FLASH_BUSWIDTH_DUAL | SPI_FLASH_BUSWIDTH_QUAD_TYPE5 + }, + + +}; + +static BOOL pmc_identifySpi(UINT32 uiMfgID, UINT32 uiTypeID, UINT32 uiCapacity, PSPIFLASH_IDENTIFY pIdentify) +{ + UINT32 uiNorTblID; + BOOL user_table_found = FALSE; + + for (uiNorTblID = 0; uiNorTblID < (sizeof(user_define_spi_flash_support_tbl) / sizeof(SPI_FLASH_INFO)); uiNorTblID++) { + if (uiMfgID == user_define_spi_flash_support_tbl[uiNorTblID].uiMfgID && \ + uiTypeID == user_define_spi_flash_support_tbl[uiNorTblID].uiMemType && \ + uiCapacity == user_define_spi_flash_support_tbl[uiNorTblID].uiMemCapacity) { + DBG_DUMP("emu user define spi-nor tbl Maker ID found @[%02d][0x%02x] DeviceID[0x%02x] cap[0x%02x]\r\n", uiNorTblID, user_define_spi_flash_support_tbl[uiNorTblID].uiMfgID, user_define_spi_flash_support_tbl[uiNorTblID].uiMemType, user_define_spi_flash_support_tbl[uiNorTblID].uiMemCapacity); + // For SPI Nor flash only + pIdentify->uiTotalSize = user_define_spi_flash_support_tbl[uiNorTblID].uiTotalSize; + pIdentify->uiBlockSize = user_define_spi_flash_support_tbl[uiNorTblID].uiBlockSize; + pIdentify->uiSectorSize = user_define_spi_flash_support_tbl[uiNorTblID].uiSectorSize; + + pIdentify->uiSectorCnt = user_define_spi_flash_support_tbl[uiNorTblID].uiSectorCnt; + pIdentify->bSupportEWSR = user_define_spi_flash_support_tbl[uiNorTblID].bSupportEWSR; + pIdentify->bSupportAAI = user_define_spi_flash_support_tbl[uiNorTblID].bSupportAAI; + pIdentify->bSupportSecErase = user_define_spi_flash_support_tbl[uiNorTblID].bSupportSecErase; + pIdentify->uiChipEraseTime = user_define_spi_flash_support_tbl[uiNorTblID].uiChipEraseTime; + pIdentify->uiBlockEraseTime = user_define_spi_flash_support_tbl[uiNorTblID].uiBlockEraseTime; + pIdentify->uiSectorEraseTime= user_define_spi_flash_support_tbl[uiNorTblID].uiSectorEraseTime; + pIdentify->uiPageProgramTime= user_define_spi_flash_support_tbl[uiNorTblID].uiPageProgramTime; + + pIdentify->flashWidth = user_define_spi_flash_support_tbl[uiNorTblID].flashWidth; + user_table_found = TRUE; + break; + } + } + return user_table_found; +} +#endif + +//dx object +DX_OBJECT gDevEmbMem0 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM0, + STORAGE_VER, + "LOADER", + 0, 0, 0, 0, + DrvEmbMemGetcaps0, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem1 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM1, + STORAGE_VER, + "MODELEXT", + 0, 0, 0, 0, + DrvEmbMemGetcaps1, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem2 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM2, + STORAGE_VER, + "UITRON", + 0, 0, 0, 0, + DrvEmbMemGetcaps2, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem3 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM3, + STORAGE_VER, + "UBOOT", + 0, 0, 0, 0, + DrvEmbMemGetcaps3, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem4 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM4, + STORAGE_VER, + "LINUX", + 0, 0, 0, 0, + DrvEmbMemGetcaps4, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem5 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM5, + STORAGE_VER, + "DSP1", + 0, 0, 0, 0, + DrvEmbMemGetcaps5, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem6 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM6, + STORAGE_VER, + "DSP2", + 0, 0, 0, 0, + DrvEmbMemGetcaps6, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem7 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM7, + STORAGE_VER, + "PSTORE", + 0, 0, 0, 0, + DrvEmbMemGetcaps7, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +DX_OBJECT gDevEmbMem8 = { + DXFLAG_SIGN, + DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM8, + STORAGE_VER, + "FAT", + 0, 0, 0, 0, + DrvEmbMemGetcaps8, + 0, + DrvEmbMemInit, + DrvEmbMemOpen, + DrvEmbMemClose, + DrvEmbMemState, + DrvEmbMemControl, + DrvEmbMemCommand, + 0, +}; + +#if !defined(_EMBMEM_EMMC_) +static UINT32 xDrvEmbMemGetUsedSize(EMB_PARTITION *pPat, UINT32 nPat) +{ + UINT32 i; + UINT32 uiOffset = 0; + for (i = 0; i < nPat; i++) { + if (pPat->EmbType != EMBTYPE_UNKNOWN) { + if ((pPat->PartitionOffset != 0) && (pPat->PartitionOffset < uiOffset)) { + DBG_ERR("Partition[%d] overlaps previous one.\r\n", i); + return 0; + } + + if ((i==0) || (i!=0 && pPat->PartitionOffset!=0)) + uiOffset = pPat->PartitionOffset + pPat->PartitionSize; + } + + pPat++; + } + return uiOffset; +} +#endif + +static UINT32 xDrvEmbMemGetcaps(UINT32 DxType, UINT32 CapID, UINT32 Param1) +{ + UINT32 v = 0; + if (CapID == STORAGE_CAPS_HANDLE) { + const UINT32 Map[] = { + STRG_OBJ_FW_RSV1, + STRG_OBJ_FW_RSV2, + STRG_OBJ_FW_RSV3, + STRG_OBJ_FW_RSV4, + STRG_OBJ_FW_RSV5, + STRG_OBJ_FW_RSV6, + STRG_OBJ_FW_RSV7, + STRG_OBJ_PSTORE1, + STRG_OBJ_FAT1 + }; + if (DxType >= sizeof(Map) / sizeof(Map[0])) { + DBG_ERR("out of id: %d\r\n", DxType); + return 0; + } + + v = (UINT32)EMB_GETSTRGOBJ(Map[DxType]); + //speical case handle +#if defined(_EMBMEM_SPI_NOR_) + if (DxType == DX_TYPE_EMBMEM8) { //FAT change to ramdisk + //v = (UINT32)ramdsk_getStorageObject(); + } +#endif + } + return v; +} + +UINT32 DrvEmbMemGetcaps0(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM0, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps1(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM1, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps2(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM2, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps3(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM3, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps4(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM4, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps5(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM5, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps6(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM6, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps7(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM7, CapID, Param1); +} +UINT32 DrvEmbMemGetcaps8(UINT32 CapID, UINT32 Param1) +{ + return xDrvEmbMemGetcaps(DX_TYPE_EMBMEM8, CapID, Param1); +} + +UINT32 DrvEmbMemInit(void *pInitParam) // Set Init Parameters +{ + DXSTRG_INIT *g_pInit = (DXSTRG_INIT *)pInitParam; //fat and pstore not complete + + if (!g_pInit) { + return DX_PARAM_ERROR; + } + + DBG_FUNC_BEGIN("\r\n"); +#if defined(_EMBMEM_EMMC_) + static BOOL bEmmcInitOnce = FALSE; + if (!bEmmcInitOnce) { + sdio3_setCallBack(SDIO_CALLBACK_CARD_DETECT, (SDIO_CALLBACK_HDL)xSdioDet); + sdio3_setCallBack(SDIO_CALLBACK_WRITE_PROTECT, (SDIO_CALLBACK_HDL)xSdioWp); + + // Support default speed + high speed + sdio3_setConfig(SDIO_CONFIG_ID_BUS_SPEED_MODE, SDIO_BUS_SPEED_MODE_DS | SDIO_BUS_SPEED_MODE_HS); + // Default speed driving -> 5.0 mA + sdio3_setConfig(SDIO_CONFIG_ID_DS_DRIVING, 50); + // High speed driving -> 10.0 mA + sdio3_setConfig(SDIO_CONFIG_ID_HS_DRIVING, 100); + // Adjust driving/sink according to operating mode + sdio3_setConfig(SDIO_CONFIG_ID_DRIVING_SINK_EN, TRUE); + + sdio3_setConfig(SDIO_CONFIG_ID_BUS_WIDTH, SD_HOST_BUS_4_BITS); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_OEMID, (UINT32)"NOVATEK"); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_VOL_LABLE, (UINT32)"SD_VOL"); + sdio3_setConfig(SDIO_CONFIG_ID_FORMAD_RAND_VOL_ID_EN, TRUE); + bEmmcInitOnce = TRUE; + } +#elif defined(_EMBMEM_SPI_NAND_) + static BOOL bSpiNandInitOnce = FALSE; + if (!bSpiNandInitOnce) { + nand_setConfig(NAND_CONFIG_ID_FREQ, 96000000); + nand_setConfig(NAND_CONFIG_ID_NAND_TYPE, NANDCTRL_SPI_NAND_TYPE); + bSpiNandInitOnce = TRUE; + } +#elif defined(_EMBMEM_SPI_NOR_) + static BOOL bSpiNandInitOnce = FALSE; + if (!bSpiNandInitOnce) { + nand_setConfig(NAND_CONFIG_ID_NAND_TYPE, NANDCTRL_SPI_NOR_TYPE); + bSpiNandInitOnce = TRUE; + } +#endif + + { + DXSTRG_PARTITION *p = &(g_pInit->prt); + DX_HANDLE DxNandDev = Dx_GetObject(p->uiDxClassType); + STORAGE_OBJ *pStrg = (STORAGE_OBJ *)Dx_Getcaps(DxNandDev, STORAGE_CAPS_HANDLE, 0); + UINT32 blksize = 0; + if (!pStrg) { + DBG_ERR("DrvEmbMemInit: STORAGE_OBJ is null. uiDxClassType=%x\n", p->uiDxClassType); + return E_SYS; + } + pStrg->Lock(); + + + + if (p->uiDxClassType == (DX_CLASS_STORAGE_EXT | DX_TYPE_EMBMEM0)) { + //User define SPI-NOR table sample code + #if 0 + if(pStrg->ExtIOCtrl(STRG_EXT_CMD_SPI_IDENTIFY_CB, (UINT32)pmc_identifySpi, 0) == E_OK) { + DBG_IND("^GSet user define SPI-NOR table success\r\n"); + } else { + DBG_ERR("^RSet user define SPI-NOR table fail\r\n"); + } + #endif + pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size); + pStrg->SetParam(STRG_SET_PARTITION_SECTORS, p->uiPhyAddr, p->uiPhySize); + pStrg->GetParam(STRG_GET_BEST_ACCESS_SIZE, (UINT32)&blksize, 0); //get block size + if (p->uiPhyAddr != 0) { + DBG_ERR("loader area have to be at phyical address 0.\r\n"); + return E_PAR; + } + if (blksize != _EMBMEM_BLK_SIZE_) { + DBG_FATAL("EMBMEM_BLK_SIZE in ModelConfig set wrong, must be 0x%0X vs 0x%0X. Set it right and rebuild ModelExt and Project\r\n", blksize, _EMBMEM_BLK_SIZE_); + return E_PAR; + } + + MODELEXT_HEADER *header; + EMB_PARTITION *pEmbPat = (EMB_PARTITION *)Dx_GetModelExtCfg(MODELEXT_TYPE_EMB_PARTITION, &header); + + if (!pEmbPat || !header) { + DBG_ERR("MODELEXT_TYPE_EMB_PARTITION is null\n"); + return E_SYS; + } + +#if !defined(_EMBMEM_EMMC_) //EMMC not support STRG_GET_DEVICE_PHY_SIZE + UINT32 PhySize; + UINT32 UsedSize = xDrvEmbMemGetUsedSize(pEmbPat, header->number); + pStrg->GetParam(STRG_GET_DEVICE_PHY_SIZE, (UINT32)&PhySize, 0); + + if (UsedSize == 0) { + return E_PAR; + } + + if (UsedSize > PhySize) { + DBG_ERR("UsedSize (%08X) > PhySize (%08X)\r\n", UsedSize, PhySize); + return E_PAR; + } +#endif + } else { + pStrg->SetParam(STRG_SET_MEMORY_REGION, g_pInit->buf.addr, g_pInit->buf.size); + pStrg->SetParam(STRG_SET_PARTITION_RSV_SECTORS, p->uiResvSize, 0); + pStrg->SetParam(STRG_SET_PARTITION_SECTORS, p->uiPhyAddr, p->uiPhySize); + } + + pStrg->Unlock(); + } + + return DX_OK; +} + +UINT32 DrvEmbMemOpen(void) // Common Constructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DrvEmbMemClose(void) // Common Destructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DrvEmbMemState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + DBG_IND("get %08x\r\n", StateID); + switch (StateID) { + case STORAGE_STATE_INSERT: + rvalue = TRUE; + break; + case STORAGE_STATE_LOCK: + rvalue = FALSE; + break; + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("set %08x\r\n", StateID); + switch (StateID) { + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + } + return DX_OK; +} + +UINT32 DrvEmbMemControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + DBG_IND("ctrl %08x\r\n", CtrlID); + + switch (CtrlID) { + default: + DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID); + break; + } + return DX_OK; +} + +UINT32 DrvEmbMemCommand(CHAR *pcCmdStr) //General Command Console +{ + switch (*pcCmdStr) { + case 'd': + /*if (!strncmp(pcCmdStr, "Nand dump", 9)) + { + return TRUE; + }*/ + break; + } + return FALSE; +} + +#endif diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c new file mode 100755 index 000000000..096ddd14b --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxUsb.c @@ -0,0 +1,190 @@ +/** + Copyright Novatek Microelectronics Corp. 2013. All rights reserved. + + @file DxUSB.c + @ingroup mIDxUSB + + @brief Detect USB connection status. + + @date 2013/04/30 +*/ + +#include "UsbDevDef.h" +#include +#include "DxUSB.h" +#include "DxCommon.h" +#include "DxApi.h" + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxUSB +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// +//public func +UINT32 DetUSBGetcaps(UINT32 CapID, UINT32 Param1); // Get Capability Flag (Base on interface version) +UINT32 DetUSBSetcfgs(UINT32 CfgID, UINT32 Param1); // Set Config Setting +UINT32 DetUSBInit(void *pInitParam); // Set Init Parameters +UINT32 DetUSBOpen(void); // Common Constructor +UINT32 DetUSBClose(void); // Common Destructor +UINT32 DetUSBState(UINT32 StateID, UINT32 Value); // General Properties +UINT32 DetUSBControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2); // General Methods +UINT32 DetUSBCommand(CHAR *pcCmdStr); //General Command Console + +//dx object +DX_OBJECT gDevUSB = { + DXFLAG_SIGN, + DX_CLASS_USB_EXT, + DETUSB_VER, + "DETECT_USB", + 0, 0, 0, 0, + DetUSBGetcaps, + DetUSBSetcfgs, + DetUSBInit, + DetUSBOpen, + DetUSBClose, + DetUSBState, + DetUSBControl, + DetUSBCommand, + 0, +}; + +static BOOL DxUSB_GetIsUSBPlug(void) +{ + return (usb2dev_state_change()); +} + +static UINT32 DxUSB_UpdateConnectType(void) +{ + USB_CHARGER_STS RetUSB; + UINT32 uiUSBCurrType; + if (!DxUSB_GetIsUSBPlug()) { + uiUSBCurrType = USB_CONNECT_NONE; + } else { + RetUSB = usb2dev_check_charger(0); + switch (RetUSB) { + case USB_CHARGER_STS_NONE: + DBG_DUMP("CONNECT to PC\r\n"); + uiUSBCurrType = USB_CONNECT_PC; + break; + case USB_CHARGER_STS_CHARGING_DOWNSTREAM_PORT: + DBG_DUMP("CONNECT to Charging PC\r\n"); + uiUSBCurrType = USB_CONNECT_CHARGING_PC; + break; + case USB_CHARGER_STS_CHARGER: + DBG_DUMP("CONNECT to CHARGER\r\n"); + uiUSBCurrType = USB_CONNECT_CHARGER; + break; + default: + DBG_ERR("CONNECTION UNKNOWN!\r\n"); + uiUSBCurrType = USB_CONNECT_UNKNOWN; + break; + } + } + return uiUSBCurrType; +} + + + +UINT32 DetUSBGetcaps(UINT32 CapID, UINT32 Param1) // Get Capability Flag (Base on interface version) +{ + UINT32 v = 0; + switch (CapID) { + case DETUSB_CAPS_BASE: + DBG_IND("get USB caps\r\n"); + v = DETUSB_BF_DETPLUG | DETUSB_BF_CONNTYPE; + break; + case DETUSB_CAPS_PLUG: + DBG_IND("get USB plug\r\n"); + v = DxUSB_GetIsUSBPlug(); + break; + case DETUSB_CAPS_CONN_TYPE: + DBG_IND("get USB connection type\r\n"); + v = DxUSB_UpdateConnectType(); + break; + default: + break; + } + return v; +} +UINT32 DetUSBSetcfgs(UINT32 CfgID, UINT32 Param1) // Set Config Setting +{ + switch (CfgID) { + case DETUSB_CFG_STANDARD_CHARGER: + DBG_IND("set standard charger %08x\r\n", Param1); + usb2dev_set_config(USB_CONFIG_ID_STANDARD_CHARGER, Param1); + break; + + default: + break; + } + return DX_OK; +} +UINT32 DetUSBInit(void *pInitParam) // Set Init Parameters +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DetUSBOpen(void) // Common Constructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DetUSBClose(void) // Common Destructor +{ + DBG_FUNC_BEGIN("\r\n"); + return DX_OK; +} + +UINT32 DetUSBState(UINT32 StateID, UINT32 Value) // General Properties +{ + DBG_FUNC_BEGIN("\r\n"); + + if (StateID & DXGET) { + UINT32 rvalue = 0; + StateID &= ~DXGET; + DBG_IND("get %08x\r\n", StateID); + switch (StateID) { + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + return rvalue; + } else if (StateID & DXSET) { + StateID &= ~DXSET; + DBG_IND("set %08x\r\n", StateID); + switch (StateID) { + default: + DBG_ERR("state=0x%02X not support!\r\n", StateID); + break; + } + } + return DX_OK; +} + +UINT32 DetUSBControl(UINT32 CtrlID, UINT32 Param1, UINT32 Param2) // General Methods +{ + DBG_FUNC_BEGIN("\r\n"); + DBG_IND("ctrl %08x\r\n", CtrlID); + + switch (CtrlID) { + default: + DBG_ERR("ctrlid=0x%02X not support!\r\n", CtrlID); + break; + } + return DX_OK; +} + +UINT32 DetUSBCommand(CHAR *pcCmdStr) //General Command Console +{ + return FALSE; +} + + + + +//============================================ + + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxWiFi.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxWiFi.c new file mode 100755 index 000000000..0d2064f88 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/DxWiFi.c @@ -0,0 +1,21 @@ +#include "DxCfg.h" +#include "IOCfg.h" +#include "Debug.h" +#include "DxWiFi.h" + +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxWiFi +#define __DBGLVL__ 1 // 0=OFF, 1=ERROR, 2=TRACE +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// +void DrvWiFi_PowerOn(void) +{ + +} + +void DrvWiFi_PowerOff(void) +{ + +} + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c new file mode 100755 index 000000000..80bce0167 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.c @@ -0,0 +1,176 @@ +/** + Copyright Novatek Microelectronics Corp. 2005. All rights reserved. + + @file IOCfg.c + @ingroup mIPRJAPCommonIO + + @brief IO config module + This file is the IO config module + + @note Nothing. + + @date 2005/12/24 +*/ + +/** \addtogroup mIPRJAPCommonIO */ +//@{ + +#include "kwrap/type.h" +#include "DrvExt.h" +#include "IOCfg.h" +#include "IOInit.h" +/////////////////////////////////////////////////////////////////////////////// +#define __MODULE__ DxDrv +#define __DBGLVL__ 2 // 0=FATAL, 1=ERR, 2=WRN, 3=UNIT, 4=FUNC, 5=IND, 6=MSG, 7=VALUE, 8=USER +#define __DBGFLT__ "*" //*=All, [mark]=CustomClass +#include +/////////////////////////////////////////////////////////////////////////////// + +#if (USE_VIO == ENABLE) +UINT32 Virtual_IO[VIO_MAX_ID] = {0}; +UINT32 vio_getpin(UINT32 id) +{ + if (id >= VIO_MAX_ID) { + return 0; + } + return Virtual_IO[id]; +} +void vio_setpin(UINT32 id, UINT32 v) +{ + if (id >= VIO_MAX_ID) { + return; + } + Virtual_IO[id] = v; +} +#endif + +#define GPIO_SET_NONE 0xffffff +#define GPIO_SET_OUTPUT_LOW 0x0 +#define GPIO_SET_OUTPUT_HI 0x1 + +/** + Do GPIO initialization + + Initialize input/output pins, and pin status + + @param void + @return void +*/ +void IO_InitGPIO(void) +{ +#if 0 + UINT32 iSValue; + + MODELEXT_HEADER *header; + GPIO_INIT_OBJ *uiGPIOMapInitTab; + + uiGPIOMapInitTab = (GPIO_INIT_OBJ *)Dx_GetModelExtCfg(MODELEXT_TYPE_GPIO_INFO, &header); + if (!uiGPIOMapInitTab || !header) { + DBG_FATAL("Modelext: iocfg is null\n"); + return; + } + + UINT32 totalGpioInitCount = header->number; + + DBG_IND("GPIO START\r\n"); + //-------------------------------------------------------------------- + // Open GPIO driver + //-------------------------------------------------------------------- + gpio_open(); + for (iSValue = 0 ; iSValue < totalGpioInitCount ; iSValue++) { + if (uiGPIOMapInitTab[iSValue].GpioDir == GPIO_DIR_INPUT) { + gpio_setDir(uiGPIOMapInitTab[iSValue].GpioPin, GPIO_DIR_INPUT); + pad_set_pull_updown(uiGPIOMapInitTab[iSValue].PadPin, uiGPIOMapInitTab[iSValue].PadDir); + } else { + gpio_setDir(uiGPIOMapInitTab[iSValue].GpioPin, GPIO_DIR_OUTPUT); + if (uiGPIOMapInitTab[iSValue].PadDir == GPIO_SET_OUTPUT_HI) { + gpio_setPin(uiGPIOMapInitTab[iSValue].GpioPin); + } else { + gpio_clearPin(uiGPIOMapInitTab[iSValue].GpioPin); + } + } + } + + //-------------------------------------------------------------------- + // Use Non-Used PWM to be Delay Timer + //-------------------------------------------------------------------- +#if defined(PWMID_TIMER) + Delay_setPwmChannels(PWMID_TIMER); +#endif + + DBG_IND("GPIO END\r\n"); +#endif +} + +/** + Initialize voltage detection + + Initialize voltage detection for battery and flash + + @param void + @return void +*/ + +void IO_InitADC(void) +{ +#if 1 + if (adc_open(ADC_CH_VOLDET_BATTERY) != E_OK) { + DBG_ERR("Can't open ADC channel for battery voltage detection\r\n"); + return; + } + + //650 Range is 250K Hz ~ 2M Hz + adc_setConfig(ADC_CONFIG_ID_OCLK_FREQ, 250000); //250K Hz + + //battery voltage detection + adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_SAMPLE_FREQ, 10000); //10K Hz, sample once about 100 us for CONTINUOUS mode + adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_SAMPLE_MODE, (VOLDET_ADC_MODE) ? ADC_CH_SAMPLEMODE_CONTINUOUS : ADC_CH_SAMPLEMODE_ONESHOT); + adc_setChConfig(ADC_CH_VOLDET_BATTERY, ADC_CH_CONFIG_ID_INTEN, FALSE); +#endif +#if (ADC_KEY == ENABLE) + if (adc_open(ADC_CH_VOLDET_KEY1) != E_OK) { + DBG_ERR("Can't open ADC channel for battery voltage detection\r\n"); + return; + } + adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_SAMPLE_FREQ, 10000); //10K Hz, sample once about 100 us for CONTINUOUS mode + adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_SAMPLE_MODE, (VOLDET_ADC_MODE) ? ADC_CH_SAMPLEMODE_CONTINUOUS : ADC_CH_SAMPLEMODE_ONESHOT); + adc_setChConfig(ADC_CH_VOLDET_KEY1, ADC_CH_CONFIG_ID_INTEN, FALSE); +#endif + + // Enable adc control logic + adc_setEnable(TRUE); + //??? + //this delay is from 650, but it is not necessary for current IC + //Delay_DelayMs(15); //wait ADC stable //for pwr on speed up +} + +void Dx_InitIO(void) // Config IO for external device +{ + + //IO_InitIntDir(); //initial interrupt destination + + //IO_InitPinmux(); //initial PINMUX config + //IO_InitGPIO(); //initial GPIO pin status + IO_InitADC(); //initial ADC pin status +#if 0//defined(_MCU_ENABLE_) + //Open for DxPower operating + Dx_Open(Dx_GetObject(DX_CLASS_POWER_EXT)); + MCUCtrl_Open(); +#endif + gpio_setDir(GPIO_IR_LED_PWR, GPIO_DIR_OUTPUT); + gpio_clearPin(GPIO_IR_LED_PWR); + + gpio_setDir(GPIO_IRCUT_MEN1, GPIO_DIR_OUTPUT); + gpio_clearPin(GPIO_IRCUT_MEN1); + + gpio_setDir(GPIO_IRCUT_MEN2, GPIO_DIR_OUTPUT); + gpio_clearPin(GPIO_IRCUT_MEN2); + +} + +void Dx_UninitIO(void) // Config IO for external device +{ +} + + + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h new file mode 100755 index 000000000..9848fd964 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/IOCfg.h @@ -0,0 +1,415 @@ +/** + Copyright Novatek Microelectronics Corp. 2012. All rights reserved. + + @file IOCfg.h + @ingroup mIPRJAPCommonIO + + @brief Header file of IO config + This file is the header file of IO config + + @note Nothing. + @date 2012/09/04 +*/ + +/** \addtogroup mIPRJAPCommonIO */ +//@{ + +#ifndef _IOCFG_H +#define _IOCFG_H + +#include "kwrap/type.h" +#include "IOInit.h" +#if 0 +#include "pad.h" +#include "top.h" +#include "gpio.h" +#include "adc.h" + +#include "pwm.h" + +#include "gpio_info.h" +#endif +#include "gpio_info.h" +#include "gpio.h" +#include "adc.h" +#define USE_VIO DISABLE + +#if (USE_VIO == ENABLE) +#define VIO_TV_DET 1 +#define VIO_HDMI_DET 2 +#define VIO_LCD2_DET 3 +#define VIO_SENSOR2_DET 4 +#define VIO_SENSOR1_DET 5 +#define VIO_AIN_DET 6 +#define VIO_MAX_ID 16 +extern UINT32 vio_getpin(UINT32 id); +extern void vio_setpin(UINT32 id, UINT32 v); +#endif + +//-------------------------------------------------------------------- +// ADC common +//-------------------------------------------------------------------- + +#define GPIO_KEY ENABLE +#define ADC_KEY DISABLE + +#define VOLDET_ADC_CONT_MODE ENABLE //!< ENABLE for continuous, DISABLE for one-shot + +#if (VOLDET_ADC_CONT_MODE == ENABLE) +#define VOLDET_ADC_MODE TRUE +#else +#define VOLDET_ADC_MODE FALSE +#endif + +//-------------------------------------------------------------------- +// PWM common +//-------------------------------------------------------------------- + + + +//-------------------------------------------------------------------- +// Display device +//-------------------------------------------------------------------- +// LCD communicate +#define LCD_COMM_DUMMY 0 +#define LCD_COMM_BY_GPIO 1 +#define LCD_COMM_BY_SIF 2 +#define LCD_COMM_CTRL LCD_COMM_BY_GPIO + +#if (LCD_COMM_CTRL == LCD_COMM_BY_GPIO) +#define GPIO_LCD_SIF_SEN P_GPIO_7//S_GPIO_4 //FPGA +#define GPIO_LCD_SIF_SCK P_GPIO_8//S_GPIO_5 //FPGA +#define GPIO_LCD_SIF_SDA P_GPIO_9//S_GPIO_6 //FPGA +#endif +#if (LCD_COMM_CTRL == LCD_COMM_BY_SIF) +#define SIF_LCD_CH SIF_CH2 +#define PAD_LCD_SIF_SEN PAD_PIN_PGPIO7 +#define PAD_LCD_SIF_SCK PAD_PIN_PGPIO8 +#define PAD_LCD_SIF_SDA PAD_PIN_PGPIO9 +#define DIR_LCD_SIF_SEN PAD_PULLUP +#define DIR_LCD_SIF_SCK PAD_PULLUP +#define DIR_LCD_SIF_SDA PAD_PULLUP +#endif +//#define GPIO_LCD_SLEEP 87 //FPGA not support +#define GPIO_LCD_RESET L_GPIO_1 + +// LCD backlight +#define LCD_BACKLIGHT_DUMMY 0 +#define LCD_BACKLIGHT_BY_GPIO 1 +#define LCD_BACKLIGHT_BY_PWM 2 +#define LCD_BACKLIGHT_BY_PWRIC 3 +#define LCD_BACKLIGHT_CTRL LCD_BACKLIGHT_BY_GPIO //FPGA +#if (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) +#define GPIO_PWM_LCD_BLG_PCTL x +#define PWMID_LCD_BLG_PCTL PWMID_x +#elif (LCD_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO) +#define GPIO_LCD_BLG_PCTL S_GPIO_3 +#define PAD_LCD_BLG_PCTL PAD_PIN_SGPIO3 +#endif + +// LCD2 communicate +#define LCD2_COMM_CTRL LCD_COMM_BY_GPIO //FPGA +#if (LCD2_COMM_CTRL == LCD_COMM_BY_GPIO) +#define GPIO_LCD2_SIF_SEN P_GPIO_23 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2 +#define GPIO_LCD2_SIF_SCK P_GPIO_25 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2 +#define GPIO_LCD2_SIF_SDA P_GPIO_26 //FPGA --- NOTE! it will conflict with PIN_SIF_CFG_CH2 +#endif +#if (LCD2_COMM_CTRL == LCD_COMM_BY_SIF) +#define SIF_LCD2_CH SIF_CHx +#define PAD_LCD2_SIF_SEN PAD_PIN_PGPIO23 +#define PAD_LCD2_SIF_SCK PAD_PIN_PGPIO25 +#define PAD_LCD2_SIF_SDA PAD_PIN_PGPIO26 +#endif +//#define GPIO_LCD2_SLEEP 87 //FPGA not support +//#define GPIO_LCD2_RESET 88 //FPGA not support + +// LCD2 backlight +#define LCD2_BACKLIGHT_CTRL LCD_BACKLIGHT_DUMMY //FPGA +#if (LCD2_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_PWM) +#define GPIO_PWM_LCD2_BLG_PCTL x +#define PWMID_LCD2_BLG_PCTL PWMID_x +#elif (LCD2_BACKLIGHT_CTRL == LCD_BACKLIGHT_BY_GPIO) +#define GPIO_LCD2_BLG_PCTL x_GPIO_x +#define PAD_LCD2_BLG_PCTL PAD_PIN_xGPIOx +#endif + +// TV +#define TV_DET_DUMMY 0 +#define TV_DET_BY_VIO 1 +#define TV_DET_BY_GPIO 2 +#define TV_DET_BY_ADC 3 +#define TV_DET_CTRL TV_DET_BY_VIO //FPGA +#if (TV_DET_CTRL == TV_DET_BY_GPIO) +#define GPIO_TV_PLUG C_GPIO_x +#define PAD_TV_PLUG PAD_PIN_CGPIOx +#endif +#if (TV_DET_CTRL == TV_DET_BY_ADC) +#define ADC_CH_TV_PLUG ADC_CHANNEL_x +#endif + +// HDMI +#define HDMI_DET_DUMMY 0 +#define HDMI_DET_BY_VIO 1 +#define HDMI_DET_BY_GPIO 2 +#define HDMI_DET_BY_ADC 3 +#define HDMI_DET_BY_HOTPLUG 4 +#define HDMI_DET_CTRL HDMI_DET_BY_VIO //EVB + +// LCD2 +#define LCD2_DET_DUMMY 0 +#define LCD2_DET_BY_VIO 1 +#define LCD2_DET_BY_GPIO 2 +#define LCD2_DET_BY_ADC 3 +#define LCD2_DET_CTRL LCD2_DET_BY_VIO //EVB + +// AIN +#define AIN_DET_DUMMY 0 +#define AIN_DET_BY_VIO 1 +#define AIN_DET_BY_GPIO 2 +#define AIN_DET_CTRL AIN_DET_BY_VIO //EVB +#if (AIN_DET_CTRL == AIN_DET_BY_GPIO) +#define GPIO_AIN_PLUG C_GPIO_x +#define PAD_AIN_PLUG PAD_PIN_CGPIOx +#endif + +//-------------------------------------------------------------------- +// Storage device +//-------------------------------------------------------------------- +// CARD +// card power +#define GPIO_CARD_POWER P_GPIO_7 +#define PAD_CARD_POWER PAD_PIN_PGPIO7 +// SD card detect +#define GPIO_CARD_DETECT C_GPIO_9 +#define PAD_CARD_DETECT PAD_PIN_CGPIO9 +// SD card write protect +#define GPIO_CARD_WP 0//P_GPIO_11 +#define PAD_CARD_WP 0//PAD_PIN_PGPIO11 + +extern BOOL SDIOCardUser_CheckCardInserted(void); +extern BOOL SDIOCardUser_CheckCardWP(void); +#if defined(_EMBMEM_EMMC_) +extern BOOL SDIO2CardUser_CheckCardInserted(void); +extern BOOL SDIO2CardUser_CheckCardWP(void); +#endif + +//-------------------------------------------------------------------- +// Audio device +//-------------------------------------------------------------------- +//Audio +extern BOOL GPIOMap_DetAudio(void); + + +//-------------------------------------------------------------------- +// Input device +//-------------------------------------------------------------------- +// Key defined (650 FPGA KEYPAD) +// +// +//--------------------------// //--------------------------// +// SW3 SW1 SW4 SW2 // // kzi kzo ks1 ks2 // +// // // // +// SW7 // // ku // +// // // // +// SW5 SW6 SW8 // // kl ke kr // +// // // // +// SW10 // // kd // +// // // // +// SW12 SW11 SW9 // // km kmd kmp // +// // // // +//--------------------------// //--------------------------// +// +// SW1~SW12 = MC22~MC31,DCPIO4,5 = C_GPIO_22~31,DCPIO4,5 (Roy) +// Low (Roy) +// +#define GPIO_KEY_ZOOMOUT P_GPIO_20 // Key Zoom Out (kzo) +#define PAD_KEY_ZOOMOUT PAD_PIN_CGPIO20 +#define GPIO_KEY_SHUTTER2 C_GPIO_19 // Key Shutter2 (ks2) +#define PAD_KEY_SHUTTER2 PAD_PIN_CGPIO19 +#define GPIO_KEY_ZOOMIN P_GPIO_22 // Key Zoom In (kzi) +#define PAD_KEY_ZOOMIN PAD_PIN_CGPIO22 +#define GPIO_KEY_SHUTTER1 P_GPIO_23 // Key Shutter1 (ks1) +#define PAD_KEY_SHUTTER1 PAD_PIN_PGPIO23 +#define GPIO_KEY_LEFT C_GPIO_18 // Key Left (kl) +#define PAD_KEY_LEFT PAD_PIN_CGPIO18 +#define GPIO_KEY_ENTER P_GPIO_4 // Key OK (ke) +#define PAD_KEY_ENTER PAD_PIN_PGPIO4 +#define GPIO_KEY_UP C_GPIO_22 // Key Up (ku) +#define PAD_KEY_UP PAD_PIN_CGPIO22 +#define GPIO_KEY_RIGHT C_GPIO_4 // Key Right (kr) +#define PAD_KEY_RIGHT PAD_PIN_CGPIO4 +#define GPIO_KEY_PLAYBACK C_GPIO_17 // Key Playback (kmp) +#define PAD_KEY_PLAYBACK PAD_PIN_CGPIO17 +#define GPIO_KEY_DOWN C_GPIO_20 // Key Down (kd) +#define PAD_KEY_DOWN PAD_PIN_CGPIO20 +#define GPIO_KEY_MODE D_GPIO_4 // Key Mode (kmd) +#define PAD_KEY_MODE PAD_PIN_DGPIO4 +#define GPIO_KEY_MENU C_GPIO_21 // Key Menu (km) +#define PAD_KEY_MENU PAD_PIN_CGPIO21 + +#define GPIO_KEY_TEST S_GPIO_6 +#define PAD_KEY_TEST PAD_PIN_SGPIO6 + +//#define ADC_CH_VOLDET_MS1 ADC_CHANNEL_1 +//#define ADC_CH_VOLDET_MS2 ADC_CHANNEL_0 +#define ADC_CH_VOLDET_KEY1 ADC_CHANNEL_2 + + +//Touch panel controller + +//#define GPIO_TP_BUSY (2 | GPIO_IS_DGPIO) //HW TS_INT =DGPIO-02 +#define GPIO_TP_PENIRQ (7 | GPIO_IS_DGPIO) //HW TS_PENIRQ =DGPIO-12 +#define GPIO_TP_DOUT 0 //P_GPIO_58 //HW TP_DI =SBDAT0/AGPIO-26 (FW output = HW input) +#define GPIO_TP_DIN (1 | GPIO_IS_DGPIO) //HW TS_DO =DGPIO-01 (FW input = HW output) +#define GPIO_TP_DCLK 0//P_GPIO_57 //HW TS_CLK =SBCK0/AGPIO-25 +//#define GPIO_TP_CS 28 //HW TS_CS =SBCS1/AGPIO-28 //SIF channel 1 +#define GPIO_TP_CS 0//P_GPIO_56 //HW TS_CS =SBCS0/AGPIO-27 //SIF channel 0 +//#define PAD_TP_BUSY PAD_PIN_DGPIO2 +#define PAD_TP_PENIRQ PAD_PIN_DGPIO7 +#define PAD_TP_DOUT PAD_PIN_PGPIO58 +#define PAD_TP_DIN PAD_PIN_DGPIO1 +#define PAD_TP_DCLK PAD_PIN_PGPIO57 +//#define PAD_TP_CS PAD_PIN_SBCS1 //SIF channel 1 +#define PAD_TP_CS PAD_PIN_PGPIO56 //SIF channel 0 + + +//G-Sensor +/* +#define GPIO_GS_INT1 (3 | GPIO_IS_DGPIO) +#define GPIO_GS_INT2 (4 | GPIO_IS_DGPIO) +#define PAD_GS_INT1 PAD_PIN_DGPIO3 +#define PAD_GS_INT2 PAD_PIN_DGPIO4 +*/ +extern UINT32 GPIOMap_DetKey(void); +extern UINT32 GPIOMap_DetModeDial(void); +extern BOOL GPIOMap_DetShutter1(void); +extern BOOL GPIOMap_DetMacro(void); +extern BOOL GPIOMap_DetPoweroff(void); + +//-------------------------------------------------------------------- +// Output device +//-------------------------------------------------------------------- +// LED +#define LED_RED_DUMMY 0 +#define LED_RED_BY_GPIO 1 +#define LED_RED_BY_MCU 3 +#define LED_RED_CTRL LED_RED_DUMMY +#define GPIO_RED_LED P_GPIO_9 //FPGA +#define PAD_RED_LED PAD_PIN_PGPIO9 + +#define LED_GREEN_DUMMY 0 +#define LED_GREEN_BY_GPIO 1 +#define LED_GREEN_BY_MCU 3 +#define LED_GREEN_CTRL LED_RED_DUMMY +#define GPIO_GREEN_LED P_GPIO_10 //FPGA +#define PAD_GREEN_LED PAD_PIN_PGPIO10 + +#define LED_FOCUS_DUMMY 0 +#define LED_FOCUS_BY_GPIO 1 +#define LED_FOCUS_BY_PWM 2 //use PWM to control LED brightness +#define LED_FOCUS_BY_MCU 3 + +#define LED_FOCUS_CTRL LED_FOCUS_BY_GPIO +#define GPIO_FOCUS_LED x_GPIO_x //FPGA +#define PAD_FOCUS_LED PAD_PIN_xGPIOx +#define PWMID_FOCUS_LED PWMID_x //FPGA + +#if defined(_MCU_ENABLE_) +#undef LED_RED_CTRL +#define LED_RED_CTRL LED_RED_BY_MCU + +#undef LED_GREEN_CTRL +#define LED_GREEN_CTRL LED_GREEN_BY_MCU + +#undef LED_FOCUS_CTRL +#define LED_FOCUS_CTRL LED_FOCUS_BY_MCU +#endif + +#define GPIO_IR_LED_PWR P_GPIO_3 //ir led pwr +#define PAD_IR_LED_PWR PAD_PIN_PGPIO3 + +#define GPIO_IRCUT_MEN1 D_GPIO_6 // M_EN1 IRCUT 1 +#define PAD_IRCUT_MEN1 PAD_PIN_DGPIO6 +#define GPIO_IRCUT_MEN2 D_GPIO_5 // M_EN2 IRCUT 2 +#define PAD_IRCUT_MEN2 PAD_PIN_DGPIO5 +//----------charge ic ---------------- +#define GPIO_CHARGEIC_EN C_GPIO_4 +#define GPIO_CHARGEIC_INT C_GPIO_7 +#define GPIO_CHARGEIC_STATE P_GPIO_12 +#define GPIO_CHARGEIC_ADC_SWITCH L_GPIO_0 + +#define GPIO_ACC P_GPIO_5 +#define GPIO_PA P_GPIO_0 +#define GPIO_PARKING P_GPIO_6 + + +//-------------------------------------------------------------------- +// Power device +//-------------------------------------------------------------------- +//Battery +#define ADC_CH_VOLDET_BATTERY ADC_CHANNEL_0 +extern char *VolDet_GetStatusString(void); + + + +//-------------------------------------------------------------------- +// Sensor device +//-------------------------------------------------------------------- +// CCD +/* +typedef enum +{ + CCD_PWR_STATUS_OFF = 0, + CCD_PWR_STATUS_ON, + CCD_PWR_STATUS_SLEEP, + CCD_PWR_STATUS_MAXIDX +}CCD_PWR_STATUS; +*/ +/* +#define GPIO_CCDTG_VH L_GPIO_20 +#define GPIO_CCDTG_VL L_GPIO_19 +//#define GPIO_CCDTG_VH_2 50 +#define GPIO_CCDTG_RST C_GPIO_22 +//#define GPIO_CCDTG_HDRV_EN 88 +#define SIF_SENSOR_TG SIF_CH2 +#define SIF_SENSOR_AFE SIF_CH3 +*/ +extern void GPIOMap_TurnOnCCDPower(void); +extern void GPIOMap_TurnOffCCDPower(void); +extern UINT8 GPIOMap_IsCCDPowerOn(void); +extern void GPIOMap_SleepCCDPower(void); +extern void GPIOMap_WakeUpCCDPower(void); + +//-------------------------------------------------------------------- +// Storbe device +//-------------------------------------------------------------------- +// STROBE +/* +#define GPIO_FLASH_CHARGE C_GPIO_21 +#define PAD_FL_CHARGE PAD_PIN_CGPIO21 +#define GPIO_FLASH_RDY P_GPIO_12 +#define PAD_FL_RDY PAD_PIN_PGPIO12 +#define GPIO_FLASH_TRIGGER D_GPIO_7 +#define PAD_FL_TRIGGER PAD_PIN_DGPIO7 +*/ + +//-------------------------------------------------------------------- +// Lens device +//-------------------------------------------------------------------- +// BCS 2.7 ~ 12 mm lens + SANYO LV8044 motor IC +#define GPIO_LENS_RESET 0 // output + +#define GPIO_LENS_ZOOM_INTR 0 // input +#define PAD_LENS_ZOOM_INTR 0 + +#define GPIO_LENS_FOCUS_INTR 0 // input +#define PAD_LENS_FOCUS_INTR 0 + +#define GPIO_LENS_IR_CTRL0 P_GPIO_6 // output +#define GPIO_LENS_IR_CTRL1 P_GPIO_6 // output +#define PAD_LENS_IR_CTRL0 PAD_PIN_PGPIO6 +#define PAD_LENS_IR_CTRL1 PAD_PIN_PGPIO7 + +#endif + +//@} diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/Source.mk b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/Source.mk new file mode 100755 index 000000000..adcc3c34c --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/Source.mk @@ -0,0 +1,27 @@ +DTS_SENSOR = ./SrcCode/Dx/$(MODEL)/sensor.dts +DTS_APP = ./SrcCode/Dx/$(MODEL)/application.dts +DX_SRC = \ + ./SrcCode/Dx/$(MODEL)/DxCfg.c \ + ./SrcCode/Dx/$(MODEL)/DxStorage_Card.c \ + ./SrcCode/Dx/$(MODEL)/DxStorage_EmbMem.c \ + ./SrcCode/Dx/$(MODEL)/DxDisplay_LCD.c \ + ./SrcCode/Dx/$(MODEL)/DxPower_DC.c \ + ./SrcCode/Dx/$(MODEL)/DxPower_Battery.c \ + ./SrcCode/Dx/$(MODEL)/DxInput_Key.c \ + ./SrcCode/Dx/$(MODEL)/IOCfg.c \ + ./SrcCode/Dx/$(MODEL)/DxUsb.c \ + ./SrcCode/Dx/$(MODEL)/DxHunting.c \ + +# ./SrcCode/Dx/$(MODEL)/DxCamera_Sensor.c \ +# ./SrcCode/Dx/$(MODEL)/DxCfg.c +# ./SrcCode/Dx/$(MODEL)/DxCmd.c +# ./SrcCode/Dx/$(MODEL)/DxDisplay_LCD.c +# ./SrcCode/Dx/$(MODEL)/DxOutput_LED.c +# ./SrcCode/Dx/$(MODEL)/DxPower_Battery.c +# ./SrcCode/Dx/$(MODEL)/DxSound_Audio.c +# ./SrcCode/Dx/$(MODEL)/DxStorage_Card.c +# ./SrcCode/Dx/$(MODEL)/DxStorage_EmbMem.c +# ./SrcCode/Dx/$(MODEL)/DxWiFi.c +# ./SrcCode/Dx/$(MODEL)/DxCmd.c + + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/application.dts b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/application.dts new file mode 100755 index 000000000..01c808c03 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/application.dts @@ -0,0 +1,10 @@ +/* + * Novatek Ltd. NA51055 BSP part of dts + * + * Cortex-A9 + * + */ + +/dts-v1/; +#include "isp.dtsi" /* sensor */ + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi new file mode 100755 index 000000000..48bd38ba9 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/isp.dtsi @@ -0,0 +1,32 @@ +/ { + isp { + sensor@0 { + ae_path = "/isp/ae/os05b10_ae_0"; + awb_path = "/isp/awb/os05b10_awb_0"; + iq_path = "/isp/iq/os05b10_iq_0"; + #iq_cap_path = "/isp/iq/os05b10_iq_0_cap"; + #iq_shading_path = "/isp/iq/os05b10_iq_shading_0"; + }; + sensor@1 { + ae_path = "/isp/ae/os05a10_ae_0"; + awb_path = "/isp/awb/os05a10_awb_0"; + iq_path = "/isp/iq/os05a10_iq_0"; + #iq_cap_path = "/isp/iq/os05a10_iq_0_cap"; + }; + /* label for ae, awb, iq table */ + ae: ae { + }; + awb: awb { + }; + iq: iq { + }; + }; +}; + +/* Note: put include files in the tail since label should be declared first. */ +#include "os05b10_ae_0.dtsi" +#include "os05b10_awb_0.dtsi" +#include "os05b10_iq_0.dtsi" +#include "os05b10_iq_0_cap.dtsi" +#include "os05b10_iq_0_vid.dtsi" + diff --git a/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/sensor.dts b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/sensor.dts new file mode 100755 index 000000000..27d774419 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/Dx/565_HUNTING_EVB_LINUX_4G_S550/sensor.dts @@ -0,0 +1,78 @@ +/* + * Novatek Ltd. NA51055 BSP part of dts + * + * Cortex-A9 + * + */ + +/dts-v1/; + +/ { + sensor_ssenif { + ssenif@0 { + if_type = <0x05>; /* HD_COMMON_VIDEO_IN_MIPI_CSI */ + sensor_pinmux = <0x220>; + serial_if_pinmux = <0xf01>; /*PIN_MIPI_LVDS_CFG_CLK2 | PIN_MIPI_LVDS_CFG_DAT0 | PIN_MIPI_LVDS_CFG_DAT1 | PIN_MIPI_LVDS_CFG_DAT2 | PIN_MIPI_LVDS_CFG_DAT3*/ + cmd_if_pinmux = <0x01>; /*PIN_I2C_CFG_CH1*/ + clk_lane_sel = <0x00>; /* HD_VIDEOCAP_SEN_CLANE_SEL_CSI0_USE_C0 */ + sen_2_serial_pin_map = <0x00000000 0x00000001 0x00000002 0x00000003 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + senout_pxlfmt = <0x410c0000>; /* HD_VIDEO_PXLFMT_RAW12 */ + capout_pxlfmt = <0x410c0000>; /* HD_VIDEO_PXLFMT_RAW12 */ + data_lane = <0x04>; + shdr_map = <0x00 0x00>; + }; + ssenif@1 { + if_type = <0x05>; /* HD_COMMON_VIDEO_IN_MIPI_CSI */ + sensor_pinmux = <0x20>; + serial_if_pinmux = <0xC02>; + cmd_if_pinmux = <0x01>; + clk_lane_sel = <0x14>; /* HD_VIDEOCAP_SEN_CLANE_SEL_CSI1_USE_C1 */ + sen_2_serial_pin_map = <0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000001 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + senout_pxlfmt = <0x410c0000>; /* HD_VIDEO_PXLFMT_RAW12 */ + capout_pxlfmt = <0x410c0000>; /* HD_VIDEO_PXLFMT_RAW12 */ + data_lane = <0x02>; + shdr_map = <0x00 0x00>; + }; + }; + sensor { + /* label for sensor_cfg */ + sen_cfg: sen_cfg { + }; + }; +}; + +#define STRINGIFY2(X) #X +#define STRINGIFY(X) STRINGIFY2(X) +// Macros for concatenating tokens +#define CAT(X,Y) CAT2(X,Y) +#define CAT2(X,Y) X##Y +#define CAT_2 CAT +#define CAT_3(X,Y,Z) CAT(X,CAT(Y,Z)) +#define INCLUDE_FILE(HEAD,TAIL) STRINGIFY( CAT_3(HEAD,TAIL,.dtsi) ) + +#if defined(__FREERTOS) +/* Note: put include files in the tail since label should be declared first. */ +#include +/** +#if defined(_sen_imx290_) +#include INCLUDE_FILE(imx290_cfg,_SEN_SUFFIX_) +#endif +#if defined(_sen_os02k10_) +#include INCLUDE_FILE(os02k10_cfg,_SEN_SUFFIX_) +#endif +#if defined(_sen_os05a10_) +#include INCLUDE_FILE(os05a10_cfg,_SEN_SUFFIX_) +#endif +#if defined(_sen_os05b10_) +#include INCLUDE_FILE(os05b10_cfg,_SEN_SUFFIX_) +#endif +#if defined(_sen_imx335_) +#include INCLUDE_FILE(imx335_cfg,_SEN_SUFFIX_) +#endif +#if defined(_sen_gc5603_) +#include INCLUDE_FILE(gc5603_cfg,_SEN_SUFFIX_) +#endif +*/ +#include "os05b10_cfg_565.dtsi" +#endif + diff --git a/rtos/code/application/source/cardv/SrcCode/PrjCfg_HUNTING_S550.h b/rtos/code/application/source/cardv/SrcCode/PrjCfg_HUNTING_S550.h new file mode 100755 index 000000000..98627ad56 --- /dev/null +++ b/rtos/code/application/source/cardv/SrcCode/PrjCfg_HUNTING_S550.h @@ -0,0 +1,1076 @@ +#ifndef _PRJCFG_DVCAM_H_ +#define _PRJCFG_DVCAM_H_ +#include "kwrap/type.h" + +//============================================================================== +// MODE and Major Feature (Maintain these in \Kernel, \System, \Mode folder) +//============================================================================== +#define PLAY_MODE ENABLE +#define PHOTO_MODE ENABLE +#define MOVIE_MODE ENABLE +#define USB_MODE ENABLE +#define SLEEP_MODE DISABLE +#define ENG_MODE DISABLE +#define MAIN_MODE ENABLE +#define IPCAM_MODE DISABLE +#define UPDFW_MODE ENABLE +#define VOICE_MODE DISABLE + +#define IPCAM_FUNC DISABLE +#define STAMP_FUNC DISABLE +#define UI_FUNC ENABLE +#if (!defined(_NVT_SDIO_WIFI_NONE_)|| !defined(_NVT_USB_WIFI_NONE_)) +#define WIFI_FUNC ENABLE +#else +#define WIFI_FUNC ENABLE +#endif +//============================================================================== +// Ethcam related setting +//============================================================================== +#if (defined(_NVT_ETHREARCAM_TX_) || defined(_NVT_ETHREARCAM_RX_)) +#if defined(_NVT_ETHREARCAM_CAPS_COUNT_2_) +#define ETH_REARCAM_CAPS_COUNT 2 +#define ETH_REARCAM_CLONE_FOR_DISPLAY DISABLE +#else +#define ETH_REARCAM_CAPS_COUNT 1 +#define ETH_REARCAM_CLONE_FOR_DISPLAY ENABLE +#endif +#endif + +//============================================================================== +// GENERAL CONFIG +//============================================================================== +//.............................................................................. +#if defined(_FW_PARTIAL_LOAD_ON_) +#else +#endif + +//.............................................................................. +// FW version and name +#define FW_UPDATE_NAME "A:\\FW98565Z.bin" +#define FW_VERSION_RELEASE DISABLE //DISABLE +#define FW_VERSION_NUM "REGULAR_0402_001" + +//.............................................................................. +/** + The definition of EmbMem is the storage without any card detection, + which means the end-user cannot take that storage out. The EmbMem can also + be a combination of partition such as partition 0 is spi-uITRON, + partition 1 is ram-FAT these depend on what you designed on DxStorage_Mem.c + Normally, in SPI case, we design the ram-disk as internal FAT + +*/ +// share info memory on fdt +#define SHMEM_PATH "/nvt_memory_cfg/shmem" + +// Internal Storage Mapping to Storage Object +#define STRG_OBJ_FW_FDT STRG_OBJ_FW_RSV1 +#define STRG_OBJ_FW_APP STRG_OBJ_FW_RSV2 +#define STRG_OBJ_FW_UBOOT STRG_OBJ_FW_RSV3 +#define STRG_OBJ_FW_RTOS STRG_OBJ_FW_RSV4 +#define STRG_OBJ_FW_LINUX STRG_OBJ_FW_RSV5 +#define STRG_OBJ_FW_ROOTFS STRG_OBJ_FW_RSV6 +#define STRG_OBJ_FW_ALL STRG_OBJ_FW_RSV7 +#define STRG_OBJ_FW_SYS STRG_OBJ_FW_RSV7 +#define STRG_OBJ_FW_FAT STRG_OBJ_FAT1 +#define STRG_OBJ_FW_PST STRG_OBJ_PSTORE1 +// Internal Storage Mapping to DxStorage +#define USER_DX_TYPE_EMBMEM_LOADER DX_TYPE_EMBMEM0 //STRG_OBJ_FW_RSV1 +#define USER_DX_TYPE_EMBMEM_MODELEXT DX_TYPE_EMBMEM1 //STRG_OBJ_FW_RSV2 +#define USER_DX_TYPE_EMBMEM_UITRON DX_TYPE_EMBMEM2 //STRG_OBJ_FW_RSV3 +#define USER_DX_TYPE_EMBMEM_UBOOT DX_TYPE_EMBMEM3 //STRG_OBJ_FW_RSV4 +#define USER_DX_TYPE_EMBMEM_LINUX DX_TYPE_EMBMEM4 //STRG_OBJ_FW_RSV5 +#define USER_DX_TYPE_EMBMEM_ECOS DX_TYPE_EMBMEM4 //STRG_OBJ_FW_RSV5 +#define USER_DX_TYPE_EMBMEM_DSP DX_TYPE_EMBMEM5 //STRG_OBJ_FW_RSV6 +#define USER_DX_TYPE_EMBMEM_DSP2 DX_TYPE_EMBMEM6 //STRG_OBJ_FW_RSV7 +#define USER_DX_TYPE_EMBMEM_PSTORE DX_TYPE_EMBMEM7 //STRG_OBJ_PSTORE +#define USER_DX_TYPE_EMBMEM_FAT DX_TYPE_EMBMEM8 //STRG_OBJ_FAT1 + +//============================================================================== +// SYSTEM FUNCTIONS +//============================================================================== +//.............................................................................. +// Boot +#define POWERON_PERF ENABLE //enable performance benchmark +#define POWERON_TRACE DISABLE //stop and wait for user enter cmd: "dsc boot" +#define POWERON_BOOT_REPORT ENABLE +#define POWERON_FAST_BOOT DISABLE +#define POWERON_FAST_BOOT_MSG ENABLE//DISABLE // disable boot msg for fast boot, but hard to debug +#define POWERON_FAST_CPU2_BOOT DISABLE +#define POWERON_FAST_RECORD DISABLE +#define POWERON_FAST_WIFI DISABLE //NOTE: need to enable POWERON_FAST_CPU2_BOOT too +#define POWERON_WAIT_FS_READY DISABLE +#define WAITPHOTO_FUNCTION DISABLE +#define POWERONLOGO_FUNCTION ENABLE +#define POWEROFFLOGO_FUNCTION ENABLE +#if ((POWERON_FAST_BOOT == DISABLE) || (POWERON_FAST_RECORD == DISABLE)) +#define POWERONSOUND_FUNCTION ENABLE +#else +#define POWERONSOUND_FUNCTION DISABLE +#endif +#define POWEROFFSOUND_FUNCTION DISABLE +#define _LOGO_ _LOGO_NOVATEK_ +#if (defined(_LCDTYPE_ILI9341_IF8B_) || \ + defined(_LCDTYPE_TG078UW006A0_DSI_)|| \ + defined(_LCDTYPE_UT35067A0_ILI9488_DSI_)) +#define LOGO_DISP_LAYER LAYER_VDO1 // VDO2 logo has no rotation +#else +#define LOGO_DISP_LAYER LAYER_VDO2 +#endif +#define LENSERROFF_FUNCTION DISABLE + +//#if (POWERON_PERF == ENABLE) +//#define TM_BOOT_ARRAY(n) static TIMEMARK tmbuf[(n)] = {0} +//#define TM_BOOT_INIT(n) TM_Init(tmbuf, n) +//#define TM_BOOT_BEGIN(a,b) TM_Begin(a,b) +//#define TM_BOOT_END(a,b) TM_End(a,b) +//#else +#define TM_BOOT_ARRAY(n) +#define TM_BOOT_INIT(n) +#define TM_BOOT_BEGIN(a,b) +#define TM_BOOT_END(a,b) +//#endif + +//#NT#2016/07/12#Niven Cho -begin +//#NT#LINUX_LOAD_BY_UBOOT +//#NT#2016/07/12#Niven Cho -end + +//.............................................................................. +// External Card Config (for SDIO device) +#if !defined(_CARD1_NONE_) +#define CARD1_FUNC DISABLE +#else +#define CARD1_FUNC DISABLE +#endif + +#if !defined(_CARD3_NONE_) +#define CARD3_FUNC DISABLE +#else +#define CARD3_FUNC DISABLE +#endif + +//.............................................................................. +// Storage Config +#define FWS_FUNC DISABLE //enable it, if require load fw for start DSP or update fw for eCos + +#define PST_FUNC DISABLE //enable it, if require write pstore + +#define FS_FUNC ENABLE //enable it, if require write file + +//#NT#2016/12/14#Niven Cho -begin +//#NT#EMMC_AS_PSTORE +// only for (_CPU2_TYPE_==_CPU2_LINUX_ && _INTERSTORAGE_ == _INTERSTORAGE_EMMC_) +#define PST_DEV_ID 4 //used for gxstrg to mount linux emmc-pstore partition +#define PST_FS_DRIVE "E:\\" +//#NT#2016/12/14#Niven Cho -end + + +#if defined(_DSP1_FREERTOS_) +#if (FWS_FUNC != DISABLE) + #warning Not enable FWS_FUNC for DSP? + #warning Please enable your "FWS_FUNC" config in header "PrjCfg_XXXX.h" + #error (see above) +#endif +#endif + +//.............................................................................. +// Input Config +#define INPUT_FUNC ENABLE +//key +#define POWERKEY_FUNCTION ENABLE //Auto Detect +#define NORMALKEY_FUNCTION ENABLE //Auto Detect +#define STATUSKEY_FUNCTION DISABLE //Auto Detect +#define MODEKEY_FUNCTION DISABLE //Auto Detect + +//.............................................................................. +// Output Config +#define OUTPUT_FUNC DISABLE +//LED +#define LED_FUNCTION DISABLE //Auto Detect + +//.............................................................................. +// Power-Saving Config +#define PWR_FUNC ENABLE +//battery level +#define PWRLEVEL_FUNCTION DISABLE //Auto Detect +//auto power-off when battery level = empty +#define EMPTYPWROFF_FUNCTION DISABLE +//auto sleep +#define AUTOSLEEP_FUNCTION ENABLE //Auto Detect +//auto power-off +#define AUTOPWROFF_FUNCTION ENABLE //Auto Detect + +//.............................................................................. +// Date-Time Config +#define DEF_YEAR 2021 +#define DEF_MONTH 1 +#define DEF_DAY 1 +#define MIN_YEAR 2000 +#define MAX_YEAR 2050 + + +//.............................................................................. +// Sensor Config (for 1,2,4 devices) + + +//#define SENSOR_CAPS_COUNT 2 +//#define SENSOR_CAPS_MASK (SENSOR_1 | SENSOR_2) +#define SENSOR_CAPS_COUNT 1 +#define SENSOR_CAPS_MASK (SENSOR_1) + + +#define SENSOR_MAP_1 SENSOR_ID_1 +#define SENSOR_MAP_2 SENSOR_ID_2 + + +#define SENSOR_GP_FUNC DISABLE + +// Sensor group +#define SENSOR_GP_1 SENSOR_MULTI_ID_NONE /*ex: SENSOR_MULTI_ID_1|SENSOR_MULTI_ID_2*/ +#define SENSOR_GP_2 SENSOR_MULTI_ID_NONE /*ex: SENSOR_MULTI_ID_3|SENSOR_MULTI_ID_4*/ +// Sensor sub group + +#define SENSOR_SUBGP_1 SENSOR_MULTI_ID_NONE +#define SENSOR_SUBGP_2 SENSOR_MULTI_ID_NONE + + + +// Sensor Insert Mask +//#define SENSOR_INSERT_MASK (SENSOR_1) // support insert sensor +//#define SENSOR_INSERT_MASK (SENSOR_2) // support insert sensor +#define SENSOR_INSERT_MASK (0) // if NOT support insert sensor, please choose this + +#define SENSOR_DEFAULT_ATTACH_MASK (SENSOR_CAPS_MASK & ~(SENSOR_INSERT_MASK)) // hw default attach sensors + +#define SENSOR_INSERT_FUNCTION ((SENSOR_CAPS_MASK == SENSOR_DEFAULT_ATTACH_MASK)?(DISABLE):(DISABLE)) //Auto Detect (Dynamic attach) + +#define SENSOR_DEFAULT_DISPLAY_MASK (SENSOR_1) + +#define SENSOR_SIEPATGEN DISABLE + +//.............................................................................. +// Flashlight Config + +#define FLASHLIGHT_FUNCTION DISABLE //DISABLE + + +//.............................................................................. +// Lens Config +#define LENS_FUNCTION DISABLE +#define LENS_FOCAL_LENGTH 2880 // unit:um + + +//.............................................................................. +// Display Config (for LCD, LCD2, TV and HDMI device) + +#define LCD2_FUNC_USERSTATUS DISABLE //use LCD2 as status display. (not for video display) + +//NOTE: LCD1 output from DOUT1 only +#if defined(_Disp_VIRTUAL_LCD1_OFF_) +#define LCD1_FUNC DISABLE +#define LCD1_MASK 0x00 +#else +#define LCD1_FUNC ENABLE +#define LCD1_MASK 0x01 +#endif +//NOTE: TV output from DOUT1 or DOUT2 +#if defined(_TV_OFF_) +#define TV_FUNC DISABLE +#define TV_MASK 0x00 +#else +#define TV_FUNC DISABLE +#define TV_MASK 0x02 +#endif +//NOTE: HDMI output from DOUT1 or DOUT2 +#if defined(_HDMI_OFF_) +#define HDMI_FUNC DISABLE +#define HDMI_MASK 0x00 +#else +#define HDMI_FUNC DISABLE +#define HDMI_MASK 0x04 +#endif + +#if((LCD1_FUNC == DISABLE) || (TV_FUNC == DISABLE) || (HDMI_FUNC == DISABLE)) +#define DISPLAY_FUNC ENABLE +#define DISPLAY2_FUNC DISABLE +#define DISPLAY_CAPS_COUNT 1 //1: only single display, 2: allow single display or dual display +#define DISPLAY_CAPS_MASK (LCD1_MASK|TV_MASK)//|HDMI_MASK|LCD2_MASK +#define DUALDISP_FUNC ((DISPLAY_CAPS_COUNT == 2)?DISABLE:DISABLE) + +#define DISPLAY_DEFAULT_ATTACH_MASK DISPLAY_1 // hw default attach display + +#if defined(_Disp_VIRTUAL_LCD1_OFF_) +#define DISPLAY_DEFAULT_ATTACH_DEVICE TV_MASK //LCD1_MASK or HDMI_MASK or TV_MASK +#else +#define DISPLAY_DEFAULT_ATTACH_DEVICE LCD1_MASK //LCD1_MASK or HDMI_MASK or TV_MASK +#endif +#define DISPLAY2_DEFAULT_ATTACH_DEVICE 0 //LCD2_MASK or TV_MASK or HDMI_MASK + +//LCD related +#define LCD_AUTORESET_FUNCTION DISABLE //Auto Reset - LCD register +#define LCD_AUTOBACKLIGHT_FUNCTION DISABLE //Auto Adjust Backlight - with AE LV +#define LCD_ROTATE_FUNCTION DISABLE //Auto Detect - LCD rotate (enable to support LCD body mirror or flip) +//TV related +#define TV_INSERT_FUNCTION TV_FUNC //Auto Detect - TV cable insert +//HDMI related +#define HDMI_INSERT_FUNCTION HDMI_FUNC //Auto Detect - HDMI cable insert +//LCD2 related +#define LCD2_INSERT_FUNCTION LCD2_FUNC //Auto Detect - LCD2 cable insert +#else +#define DISPLAY_FUNC DISABLE +#define DISPLAY2_FUNC DISABLE +#define DISPLAY_CAPS_COUNT 0 +#define DISPLAY_CAPS_MASK 0 +#define DUALDISP_FUNC 0 + +#define DISPLAY_DEFAULT_ATTACH_MASK 0 // hw default attach display + +#define DISPLAY2_DEFAULT_ATTACH_DEVICE 0 //LCD2_MASK or TV_MASK or HDMI_MASK + +//LCD related +#define LCD_AUTORESET_FUNCTION DISABLE //Auto Reset - LCD register +#define LCD_AUTOBACKLIGHT_FUNCTION DISABLE //Auto Adjust Backlight - with AE LV +#define LCD_ROTATE_FUNCTION DISABLE //Auto Detect - LCD rotate (enable to support LCD body mirror or flip) +//TV related +#define TV_INSERT_FUNCTION TV_FUNC //Auto Detect - TV cable insert +//HDMI related +#define HDMI_INSERT_FUNCTION HDMI_FUNC //Auto Detect - HDMI cable insert +//LCD2 related +#define LCD2_INSERT_FUNCTION LCD2_FUNC //Auto Detect - LCD2 cable insert +#endif + +#define DRAM_SIZE_64MB_DISP_OFF DISABLE + +#if (DRAM_SIZE_64MB_DISP_OFF==ENABLE) +#undef POWERONLOGO_FUNCTION +#define POWERONLOGO_FUNCTION DISABLE +#undef POWEROFFLOGO_FUNCTION +#define POWEROFFLOGO_FUNCTION DISABLE +#endif +// Display Config (for UI window, FD window) + +// OSD size and format +#if (DRAM_SIZE_64MB_DISP_OFF==ENABLE) +#define DISPLAY_OSD_W 80//320//640 +#define DISPLAY_OSD_H 60//240 +#else +#define DISPLAY_OSD_W 320//640 +#define DISPLAY_OSD_H 240 +#endif +#define DISPLAY_OSD_FMT PXLFMT_INDEX8 // 256 colors +//#define DISPLAY_OSD_FMT PXLFMT_RGBA5658_PK // 16bpp-colors + +//UI tool layout size setting +#if (DRAM_SIZE_64MB_DISP_OFF==ENABLE) +#define TOOL_LAYOUT_W 80//320//640 +#define TOOL_LAYOUT_H 60//240//480 +#else +#define TOOL_LAYOUT_W 320//640 +#define TOOL_LAYOUT_H 240//480 +#endif +#define OSD_USE_DOUBLE_BUFFER DISABLE //use double buffer +#if (defined(_Disp_IF8B_LCD1_ILI9341_)) +#define OSD_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#elif defined(_disp_ifdsi_lcd1_ut35067a0_ili9488_) +#define OSD_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#else +#define OSD_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#endif + +#define OSD2_FUNC DISABLE +#define OSD2_USE_DOUBLE_BUFFER DISABLE //use double buffer +#define VDO_BM_FUNC DISABLE + + +// Display Config (for UI background, App quickview, photo frame, ...) + +// VDO size and format +#if (DRAM_SIZE_64MB_DISP_OFF==ENABLE) +#define DISPLAY_VDO_W 80//640 +#define DISPLAY_VDO_H 60//480 +#else +#define DISPLAY_VDO_W 640 +#define DISPLAY_VDO_H 480 +#endif +#define DISPLAY_VDO_FMT DISP_PXLFMT_YUV422_PK + +#define VDO_USE_DOUBLE_BUFFER DISABLE //use double buffer +#define VDO2_USE_DOUBLE_BUFFER DISABLE +#define VDO_USE_PHOTO_SOURCE DISABLE //display photo video streaming +#if (defined(_Disp_IF8B_LCD1_ILI9341_)) +#define VDO_ROTATE_DIR HD_VIDEO_DIR_ROTATE_90 +#define VDO_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#elif defined(_disp_ifdsi_lcd1_ut35067a0_ili9488_) +#define VDO_ROTATE_DIR HD_VIDEO_DIR_ROTATE_270 +#define VDO_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#else +#define VDO_ROTATE_DIR HD_VIDEO_DIR_ROTATE_90 +#define VDO_USE_ROTATE_BUFFER ENABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) +#endif + +#define VDO_USE_COPY_BUFFER DISABLE //use copy buffer to avoid black between UI mode + +#define VDO2_USE_ROTATE_BUFFER DISABLE //use rotate buffer (enable to support LCD with stripe-type subpixel) + +#if (DISPLAY2_FUNC == DISABLE) +//#define VDOOUT_MASK (DISPLAY_1) // app's video will output to which display +//#define VDOOUT_MASK (DISPLAY_2) // app's video will output to which display +#define VDOOUT_MASK (DISPLAY_1|DISPLAY_2) // app's video will output to which display +#else +#define VDOOUT_MASK (DISPLAY_1) // app's video will output to which display +#endif + +#define LCD_PREVIEW_VDO_FMT GX_IMAGE_PIXEL_FMT_YUV420_PACKED +#define LCD2_PREVIEW_VDO_FMT GX_IMAGE_PIXEL_FMT_YUV420_PACKED +#define TV_PREVIEW_VDO_FMT GX_IMAGE_PIXEL_FMT_YUV420_PACKED +#define HDMI_PREVIEW_VDO_FMT GX_IMAGE_PIXEL_FMT_YUV420_PACKED + +// Display Config (for DispSrv; Photo App, Movie App and Play App) +// VDO1 size and format (for LCD device) +//LCD1: +#if defined(_Disp_VIRTUAL_LCD1_OFF_) +#define LCDMODE DISABLE +#elif defined(_Disp_IF8B_LCD1_AUCN01_) +#define LCDMODE DISP_LCDMODE_RGBD320 //DISP_LCDMODE_YUV640 +#elif defined(_Disp_IF8B_LCD1_PW35P00_HX8238D_) || \ + defined(_Disp_IF8B_LCD1_ILI9341_) +#define LCDMODE 0//DISP_LCDMODE_RGB_SERIAL +#else +#error "Unknown _LCD_" +#endif + +#define LCD2MODE DISABLE + +// VDO1 size and format (for TV device) +//TV: DISP_TVMODE_PAL mode +#define TVMODE DISP_TVMODE_NTSC + +// VDO1 size and format (for HDMI device) +//HDMI: DISP_HDMIMODE_1920X1080I60 mode +//#define HDMIMODE DISP_HDMIMODE_1920X1080I60 +#define HDMIMODE DISP_HDMIMODE_MAX + + +#define DUALCAM_PIP_BEHIND_FLIP DISABLE //Flip 2nd cam image in PIP view. Need extra 1/2 VDO buffer + + + +//.............................................................................. +// Audio Config +#define AUDIO_FUNC ENABLE +//.............................................................................. +// External Audio Config (for LineOut device) + +//LINE related + +//.............................................................................. +// External Storage Config +#define SDINSERT_FUNCTION ENABLE //Auto Detect +#define SDHOTPLUG_FUNCTION ENABLE +//.............................................................................. +// FILEDB Config +#define USE_FILEDB DISABLE //DISABLE +#define FILEDB_CARDV_ROOT "Novatek" // the max length should not exceeds 16 +// DCF Config +#define USE_DCF ENABLE +#define DCF_SUPPORT_FORMAT (DCF_FILE_TYPE_JPG|DCF_FILE_TYPE_AVI|DCF_FILE_TYPE_MOV|DCF_FILE_TYPE_MP4) +//.............................................................................. +// EXIF Config +#define USE_EXIF DISABLE +// End string must be '\0', total char must be 31 +#define EXIF_MAKER_NAME "SY" +// End string must be '\0', total char must be 31 +#define EXIF_MODEL_NAME "S550-R" +// End string must be '\0', total char must be 31 +#define EXIF_IMAGE_DESCROPTOIN "S550 CAMERA" + +#define EXIF_SOFTWARE_VERSION FW_VERSION_NUM // <= 20 char (TagSoftVerLen) + +//.............................................................................. +// Movie Maker/Model name Config +// End string must be '\0', total char must plus 1 +#define MOVAPP_COMP_MANU_STRING "NOVATEK" +// End string must be '\0', total char must plus 1 +#define MOVAPP_COMP_NAME_STRING "DEMO1" +//.............................................................................. +// Usb Config + +#define USBINSERT_FUNCTION ENABLE //Auto Detect + +#define USB_VID 0x0603 +#define USB_PID_PCCAM 0x8612 // not support pc cam +#define USB_PID_WRITE 0x8614 +#define USB_PID_PRINT 0x8613 +#define USB_PID_MSDC 0x8611 + +#define USB_PRODUCT_REVISION '1', '.', '0', '0' +#define USB_VENDER_DESC_STRING 'N', 0x00,'O', 0x00,'V', 0x00,'A', 0x00,'T', 0x00,'E', 0x00,'K', 0x00, 0x20, 0x00,0x00, 0x00 // NULL +#define USB_VENDER_DESC_STRING_LEN 0x09 +#define USB_PRODUCT_DESC_STRING 'D', 0x00,'E', 0x00,'M', 0x00,'O', 0x00,'1', 0x00, 0x20, 0x00, 0x00, 0x00 // NULL +#define USB_PRODUCT_DESC_STRING_LEN 0x07 +#define USB_PRODUCT_STRING 'N','v','t','-','D','S','C' +#define USB_SIDC_DESC_STRING 'D', 0x00,'E', 0x00,'M', 0x00,'O', 0x00,'1', 0x00, 0x20, 0x00, 0x00, 0x00 // NULL +#define USB_SIDC_DESC_STRING_LEN 0x07 +#define USB_MTP_FRIENDNAME_STRING 'D','E','M','O','1',0x00 //maximum length is 253 bytes +#define USB_MTP_FRIENDNAME_STRING_LEN 0x06 //maximum length is 253 bytes +#define USB_VENDER_STRING 'N','O','V','A','T','E','K' +#define USB_VENDER_SIDC_DESC_STRING 'N', 0x00,'O', 0x00,'V', 0x00,'A', 0x00,'T', 0x00,'E', 0x00,'K', 0x00, 0x20, 0x00,0x00, 0x00 // NULL +#define USB_VENDER_SIDC_DESC_STRING_LEN 0x09 +#define USB_SERIAL_NUM_STRING '5', '1', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '1', '0', '0' + +//.............................................................................. +// Other Config + +#define GSENSOR_FUNCTION DISABLE //G-sensor +#define GPS_FUNCTION DISABLE + +#define SHOW_ADC_ON_SCREEN DISABLE +#define CALIBRATION_FUNC DISABLE // Enable/Disable Calibration +#define WATERLOGO_FUNCTION ENABLE // Enable/Disable waterlogo function +#define MOVIE_MULTISTAMP_FUNC DISABLE +#define MOVIE_MULTIWATERLOGO_FUNC DISABLE + +// Important Notice: +// If enable MULTILINGUAL_FUNCTION, remember to update font table and make sure the font height is not exceed the buffer size!! +#define MULTILINGUAL_FUNCTION DISABLE // Enable/Disable Multi-Lingual movie stamp function + +#define TIMELAPSE_LPR_FUNCTION DISABLE // Enable/Disable Timelapse Low Power Record function + +//--------------------------------------------------------------------------- +// For Video Debug Info +//--------------------------------------------------------------------------- +#define _MOVIE_IQLOG_ DISABLE // Enable/Disable Video IQLOG, Spark Chou + +//============================================================================== +// PLAYBACK FUNCTIONS +//============================================================================== +#define SLIDESHOW_MUSIC_OPTION DISABLE //longer no maintain +// copy card to card function +#define COPYCARD2CARD_FUNCTION DISABLE + +//============================================================================== +// PHOTO FUNCTIONS +//============================================================================== + +#define ASSIST_BEAM_FUNC DISABLE +#define GDC_FUNC DISABLE +#define AF_BEAM_EV_THRESHOLD 540 +#define _FD_FUNC_ DISABLE +#define _TSR_FUNC_ DISABLE +#define MAX_FDNUM 10 +#define PIP_VIEW_FUNC DISABLE // PipView (DISABLE: display 2 sensor by PipView, DISABLE: display user selected sensor) +#define PIP_VIEW_FASTSWITCH DISABLE // display single sensor method (DISABLE: always display by Pipview, DISABLE: display by direct path) +#define PIP_VIEW_LR DISABLE //(DISABLE: display 2 sensor by PipView in left, right view, side by side, DISABLE: normal pipview) + +#define SBS_VIEW_FUNC DISABLE // SbsView (DISABLE: display 2 sensor by SbsView, DISABLE: display user selected sensor) +#define SHDR_FUNC DISABLE // DISABLE +#define WDR_FUNC ENABLE +#define DEFOG_FUNC DISABLE // DISABLE + +#if !defined(_Gyro_None_) +#define RSC_FUNC DISABLE +#else +#define RSC_FUNC DISABLE +#endif +//.............................................................................. +#define _SCREENNAIL_SIZE_ _SCREENNAIL_SIZE_VGA_ +#define _QUICKVIEW_SIZE_ _QUICKVIEW_SIZE_SUIT_FOR_DISP + +//.............................................................................. +// Photo Frame Pstore Version Config +#define PF_PSTORE_VER 0x00000105 + +//============================================================================== +// MOVIE FUNCTIONS +//============================================================================== +#if !defined(_Gyro_None_) +#define MOVIE_RSC DISABLE +#else +#define MOVIE_RSC DISABLE +#endif +#define MOVIE_PIM_CAPTURE DISABLE // picture in movie method 1 (capture full resolution image) +#define MOVIE_GDC_FUNC DISABLE +#define MOVIE_SMEAR_R_FUNC DISABLE +#define MOVIE_ENSURE_SD_CLASS4 DISABLE +#define MOVIE_ENSURE_SD_32KCLUSTER DISABLE +#define MOVIE_MULTI_RECORD_FUNC DISABLE +#define MOVIE_REC_YUVMERGE DISABLE // slowly timelapse record mode, frame period >= 1S +#define MOVIE_AUTOREC_ACPLUG DISABLE +#define MOVIE_NET_USE_STREAM_1 DISABLE +#define MOVIE_UVAC_FUNC DISABLE +#define MOVIE_DSP_FUNC DISABLE + +#define MOVIE_MAPPING_MULTIREC DISABLE +#define MOVIE_DIRECT_FUNC DISABLE // direct mode function +#define MOVIE_YUV_COMPRESS DISABLE + +#define MOVIE_DIS DISABLE +#define MOVIE_FD_FUNC_ DISABLE +#define MOVIE_FD_DRAW_VIDEO DISABLE +#define MOVIE_BC_FUNC DISABLE +#define MOVIE_TD_FUNC DISABLE // Depend on MOVIE_BC_FUNC +#define MOVIE_TD_DRAW_VIDEO DISABLE +#define MOVIE_TWD_FUNC DISABLE // Depend on MOVIE_BC_FUNC +#define MOVIE_TWD_DRAW_VIDEO DISABLE +#define MOVIE_TZD_FUNC DISABLE // Depend on MOVIE_BC_FUNC +#define MOVIE_TZD_DRAW_VIDEO DISABLE +#define MOVIE_ODT_FUNC DISABLE +#define MOVIE_ODT_DRAW_VIDEO DISABLE + +#define UCTRL_APP_MOVIE_FEATURE_SETGET DISABLE +#define MEDIA_VASTREAM DISABLE +#define IR_CUT_FUNC DISABLE +#define LOGFILE_FUNC DISABLE +#define _ADAS_FUNC_ DISABLE +//.............................................................................. +// ADAS subsetting (The following sub-functions are available only if _ADAS_FUNC_ = DISABLE +#define _AUTOVP_FUNC_ DISABLE +#define _SNG_FUNC_ DISABLE +#define _DRAW_LDFCINFO_ON_OSD_ DISABLE +#define _DRAW_SNG_ROI_ DISABLE +#define _DRAW_LDWSINFO_ON_VIDEO_ DISABLE // This function is only valid if data path is D2D!! + +#define MOVIE_TSR_FUNC_ DISABLE +#define MOVIE_TSR_DRAW_VIDEO DISABLE +#define TSR_MODEL_IN_PSTORE DISABLE + +#define CROP_SOURCE_W 3840 +#define CROP_SOURCE_H 2160 + + +//============================================================================== +// MOVIE PLAY FUNCTIONS +//============================================================================== +#define MOVIE_PLAY_VIEW_FUNC DISABLE // MoviePlayView + + +//============================================================================== +// USBCAM FUNCTIONS +//============================================================================== +#define UVAC_MODE_2_PATH DISABLE +#if (UVAC_MODE_2_PATH==DISABLE) +#undef MOVIE_MULTI_RECORD_FUNC +#define MOVIE_MULTI_RECORD_FUNC DISABLE +#endif +//============================================================================== +// USBCHARGE FUNCTIONS +//============================================================================== +#define USB_CHARGE_FUNCTION DISABLE +#define USB_CHARGE_VERIFY DISABLE + +//============================================================================== +// USBDISK FUNCTIONS +//============================================================================== + +//============================================================================== +// MSDCVENDOR_NVT, is required for PC tools to transmit commands and data via USB / NET +//============================================================================== +#define MSDCVENDOR_NVT ENABLE //via USB, depend on USBINSERT_FUNCTION and _USB3_INT_CORE1_ +#define MSDCVENDOR_UPDFW DISABLE //enable it will cause disalbing MSDC and MTP/PTP/UAVC Mode, MSDCVENDOR_NVT must enable +#define MSDCVENDOR_IDENTITY_FILE "A:\\MSDCNVT" +#if (defined(_MODEL_DVCAM1_EVB_) || defined(_MODEL_DVCAM2_EVB_)) +#define MSDCVENDOR_NVT_EXAM DISABLE //only for novatek internal use +#else +#define MSDCVENDOR_NVT_EXAM DISABLE //for customer, disable it to reduce memory +#endif +//============================================================================== +// USBPRINT FUNCTIONS +//============================================================================== + +//============================================================================== +// USBPRINT FUNCTIONS +//============================================================================== + +//============================================================================== +// UI FUNCTIONS +//============================================================================== +//.............................................................................. +// UI Resource Storage Config +#define _LANG_STORE_ _INSIDECODE_ +#define _JPG_STORE_ _INSIDECODE_ +#define SPECIAL_KEY_RESET_FUNC DISABLE +#define EXTRA_MENU DISABLE + +//============================================================================== +// IPCam FUNCTION +//============================================================================== +//.............................................................................. + +///////FD param +#define IPCAM_FD_FUNC DISABLE +#define MAX_FDNUM 10 //set face detection max face number +//////MD param +#define IPCAM_MD_FUNC DISABLE +//////VQA param +#define IPCAM_VQA_FUNC DISABLE + +/////AUDIO param +#define IPCAM_AUDIO_IN_FUNC DISABLE +#define IPCAM_AUDIO_OUT_FUNC DISABLE +#define IPCAM_AEC_FUNC DISABLE +#define AUDIO_FUNC_AAC DISABLE + + +//============================================================================== +// NET FUNCTIONS +//============================================================================== +#if (!defined(_NVT_SDIO_WIFI_NONE_) || !defined(_NVT_USB_WIFI_NONE_)) +#define _NETWORK_DEVICE_ +#define _NETWORK_ON_WIFI_ +#endif +#if !defined(_NVT_USB_4G_NONE_) +#define _NETWORK_DEVICE_ +#define _NETWORK_ON_4G_ +#endif +#if !defined(_NVT_ETHERNET_NONE_) +#define _NETWORK_DEVICE_ +#define _NETWORK_ON_ETH_ +#endif + +#define MAC_APPEN_SSID DISABLE//ENABLE +#define ACL_TIME 15000 //minmum 15 sec +#define WIFI_APP_MANUFACTURER "NVT" +#define WIFI_APP_MODLE "CarDV_WiFi" +#define ONVIF_PROFILE_S DISABLE //Enable it to cause NO CARD DETECTED. +#define ECOS_POWER_OFF_FLOW DISABLE + +//#NT#2016/10/21#YongChang Qui -begin +//#NT#wifi modules on EVB can't be powered off by default +#define WIFI_POWER_OFF_FLOW DISABLE //Enabled only if ECOS_POWER_OFF_FLOW == DISABLE and DrvWiFi_PowerOff() actually powers off wifi module +//#NT#2016/10/21#YongChang Qui -end + +#define HFS_FUNC ENABLE + +#define HTTP_LIVEVIEW_FUNC DISABLE +#if (WIFI_FUNC==DISABLE) +#define WIFI_AP_FUNC DISABLE +#else +#define WIFI_AP_FUNC ENABLE +#endif +#define WIFI_FTP_FUNC DISABLE + +#define HTTP_MJPG_W_4 640 +#define HTTP_MJPG_H_3 480 + +#define HTTP_MJPG_W_16 640 +#define HTTP_MJPG_H_9 360 + +#define AUTO_WIFI DISABLE + +#define HTTP_LIVEVIEW 1 +#define RTSP_LIVEVIEW 2 +#define MOVIE_LIVEVIEW RTSP_LIVEVIEW + +#if(WIFI_AP_FUNC==DISABLE) +#undef HTTP_LIVEVIEW_FUNC +#define HTTP_LIVEVIEW_FUNC DISABLE +#define MOVIE_MULTI_RECORD_FUNC DISABLE + + +#undef HTTP_MJPG_W_4 +#undef HTTP_MJPG_H_3 +#undef HTTP_MJPG_W_16 +#undef HTTP_MJPG_H_9 +#define HTTP_MJPG_W_4 640 +#define HTTP_MJPG_H_3 480 +#define HTTP_MJPG_W_16 640 +#define HTTP_MJPG_H_9 360 + +#undef HFS_FUNC +#define HFS_FUNC DISABLE +#endif + +#define WIFI_APP_MANUFACTURER "NVT" +#define WIFI_APP_MODLE "CarDV_WiFi" +#define WIFI_APP_DOWNLOAD_URL "http://115.29.201.46:8020/download/filedesc.xml" + + +#if defined(_CPU2_LINUX_) +#define UCTRL_FUNC DISABLE +#else +#define UCTRL_FUNC DISABLE +#endif +#define ONVIF_FUNC DISABLE //CarDV-Linux is no using of ONVIF + + +#define WIFI_FINALCAM_APP_STYLE DISABLE +#define WIFI_BG_COLOR 14 + +#define WIFI_STA_RECONNECT_MAX_COUNT 5 +#define WIFI_STA_RECONNECT_INTERVAL 300 + +#define YOUKU_SDK DISABLE +#define IOT_P2P_FUNC DISABLE +#define NETWORK_4G_MODULE DISABLE + +#if (YOUKU_SDK == DISABLE) +#define WIFI_MOVIE_FOLDER "MOVIE_WIFI" +#define CUT_MOVIE_FOLDER "MOVIE_CUT" +//the following two functions should be exclusive +#define SAVE_DUAL_STREAM_FUNC DISABLE +#define CUT_MOVIE_FUNC DISABLE +#endif + +#define MOVIE_OT_FUNC DISABLE +#define MOVIE_OT_DRAW_VIDEO DISABLE + + + +#define CURL_FUNC DISABLE + +#define _DDD_FUNC_ DISABLE +#define MOVIE_DDD_FUNC DISABLE +#define MOVIE_DDD_FD_FUNC DISABLE +#define MOVIE_DDD_DRAW_VIDEO DISABLE +#define MOVIE_DDD_SAVE_LOG DISABLE +#define DDD_MODEL_IN_PSTORE DISABLE + +#define MOVIE_FTG_FUNC DISABLE +#define MOVIE_FTG_DRAW_VIDEO DISABLE + +//#NT#2017/04/28#KCHong -begin +//#NT# CNN Object detection +#define _OD_FUNC_ DISABLE +//#NT#2017/04/28#KCHong -end + +#define USERLOG_FUNC DISABLE + + +// fileSize align function +#define FILESIZE_ALIGN_FUNC DISABLE +#define PHOTO_FILESIZE_ALIGN_VALUE 2*1024*1024 // 2MB +#define FS_ALIGN_RESERVED_SIZE (2 * MOVIE_FILESIZE_ALIGN_VALUE) + +#define FS_SWITCH_STRG_FUNC DISABLE + +// mount sd-2 as "B:\\" +// To mount sd-2 as "B:\\" please do the following steps +// 1. set .int_id_dst[CC_CORE_MIPS1].Bit.bInt_ID_SDIO2 to TRUE +// 2. enable FS_DX_TYPE_DRIVE_B as DX_TYPE_CARD2 +// 3. enable FS_MULTI_STRG_FUNC +// 4. NETWORK = NETWORK_NONE (Both uITRON and eCos) +#define FS_MULTI_STRG_FUNC DISABLE +//MULTI_DRIVE +#if defined(_EMBMEM_EMMC_) && (FS_MULTI_STRG_FUNC==DISABLE) +#define FS_DX_TYPE_DRIVE_A USER_DX_TYPE_EMBMEM_FAT +#else +#define FS_DX_TYPE_DRIVE_A DX_TYPE_CARD1 +#endif +#define FS_DX_TYPE_DRIVE_B USER_DX_TYPE_EMBMEM_FAT //FS_MULTI_STRG_FUNC must enable for FS_DX_TYPE_DRIVE_B + +#define _3DNROUT_FUNC DISABLE + +#define RTC_FUNC DISABLE + +#define DISPLAY_FAST_SWITCH DISABLE //fast swicth display device +#define DISPLAY_OSD2_FMT DISP_PXLFMT_INDEX8 // 256 colors +#define SPK_MASK 0x01 +#define LOUT_MASK 0x02 +#define LINE_INSERT_FUNCTION DISABLE //Auto Detect - LINE cable insert (audio out) +#define USE_DPOF DISABLE +#define BT_FUNC DISABLE +#define ECOS_DBG_MSG_FORCE_UART1_DIRECT DISABLE +#define USOCKET_CLIENT DISABLE +#define MOVIE_DISDSP_FUNC DISABLE +#define WIFI_UI_VER_1_0 0 +#define WIFI_UI_VER_2_0 1 +#define WIFI_UI_FLOW_VER WIFI_UI_VER_1_0 +#define LOG_DBGINFO_IN_GPS_SECTION DISABLE +#define MOVIE_TD_SAVE_LOG DISABLE +#define MOVIE_SCD_FUNC DISABLE +#define UVC_MULTIMEDIA_FUNC DISABLE +#if (UVC_MULTIMEDIA_FUNC == ENABLE) +#undef MOVIE_UVAC_FUNC +#define MOVIE_UVAC_FUNC ENABLE // it needs to enable MOVIE_UVAC_FUNC if UVC_MULTIMEDIA_FUNC was enabled +#endif +#define FORCE_UNPLUG_RTSP DISABLE +#define IQTOOL_FUNC DISABLE +#define GXGFX_ADVANCED_STRING_FUNC DISABLE +#define SMALL_CLONE_MOVIE DISABLE +#define CUSTOM_NAMING_RULE DISABLE +#define LINUX_CVHOST_FUNC DISABLE +#define AUDIO_PLAY_TEST DISABLE +#define FTG_SNAPSHOT_FUN DISABLE +#define FTG_MAX_SNAPSHOT_NUM 5 +#define FTG_OVERRALL_MAX_BUF_SIZE 250*1024 +#define FTG_FACE_MAX_BUF_SIZE 100*1024 +#define FTG_MAX_SNAPSHOT_SIZE 1024*1024*25 +#define FTG_MAX_FACE_PIC_NUM 3 +#define RTSP_AUDIO_ENABLE DISABLE +#define AUDIO_CMD_UCTRL_ENABLE DISABLE +#define FACE_GRADE_TEST DISABLE +#define IPCAM_UVC_FUNC DISABLE +#define BOOT_RESET_MENU_INFO ENABLE +#define VIDEOSPRITEIPC DISABLE +#define IPCAM_FD_FUNC DISABLE +//#define IPCAM_DIS_FUNC DISABLE +#define IPCAM_DIS_MV_FUNC DISABLE //Digital Image Stabilzier: calculate motion vector +#define IPCAM_DIS_COMP_FUNC DISABLE //DIS compensation: if set IPCAM_DIS_COMP_FUNC = enable, it should set IPCAM_DIS_MV_FUNC = TRUE, too +#define HOT_PLUG_REMAIN_SIZE 0 +#define _CVHOST_EX_ DISABLE +#define _CVHOST_EX_ENDSP_ DISABLE +#define _NVTCV_EX_ DISABLE +#define _NVTCV_EX_ENDSP_ DISABLE +#define MOVIE_MAX_CHANNEL 16 +#define LINUX_MSDC DISABLE //DISABLE +#define STEREO_FUNC DISABLE +#define THUMB_STAMP_FUNC DISABLE +#define STAMP_PRIVATE_POOL ENABLE +#define VIDEOSPRITE_STAMP_FUNC ENABLE +#define VDOENC_MULTI_TEMPORARY_LAYER DISABLE //Multi Temporary Layer +#define YUV_TV_RANGE DISABLE //YUV color space in tv range +#define VIDEO_FUNC_MJPG DISABLE +#define VIDEO_FUNC_H264 DISABLE +#define VIDEO_FUNC_H265 DISABLE +#define STOP_REC_BK DISABLE +#define NMEDIAPLAY_FUNC DISABLE // switch SMediaPlay and NMediaPlay flow, use NMediaPlay when DISABLE to be set. +#define MOVIE_AI_DEMO DISABLE +#define HUNTING_CAMERA_MODEL ENABLE +#define HUNTING_CAMERA_BOOT_LINUX ENABLE +#define HUNTING_CAMERA_SYS_PARTITION_NAME sys +#define PHOTO_STAMP_ISP_STATUS DISABLE +#define PHOTO_DIRECT_FUNC DISABLE +#define POWERON_FAST_SLICE_ENC ENABLE +#define POWERON_FAST_SLICE_ENC_VER2 ENABLE +#define HUNTING_PHOTO_FAST_AE_60_FPS ENABLE + +#define HUNTING_CAMERA_MCU ENABLE +#define HUNTING_CAMERA_4G ENABLE//DISABLE +#define PHOTO_PREVIEW_SLICE_ENC_FUNC ENABLE +#define PHOTO_PREVIEW_SLICE_ENC_VER2_FUNC ENABLE +#define DZOOM_FUNC ENABLE + +////////////////////////sf st///////////////////////////////////// +#define HUNTING_MCU_I2C DISABLE +#define HUNTING_MCU_UART ENABLE +#define HUNTING_IR_LED_940 ENABLE +#define SF_EXIF_MN_BUF_SIZE 256 +#define SF_BASE_VERSION "7MD4RCwD901" +#define DCF_DIR_NAME "MEDIA" /* 100MEDIA */ +#define DCF_FILE_NAME "SYFW" /* SYFW0001.JPG */ +#define PHOTO_THUMB_PATH "A:\\THUMB\\" +#define MOVIE_THUMB_PATH "A:\\THUMB\\" +#define SF_SEND_LIST_DIR "/mnt/sd/THUMB" +#define SF_THUMB_SEND_LIST PHOTO_THUMB_PATH"send.list" +#define SF_THUMB_SEND_AUTO PHOTO_THUMB_PATH"auto.list" +#define SF_TRIGGER_TIME_TEST DISABLE +#define SF_IQ_TEST DISABLE +#define HW_S530 DISABLE +#define PHOTO_ISP_STAMP DISABLE +#define SF_BASE_VERSION_FEA "R2.3" +#define SF_GPS_SUPPORT 0 +#define SF_SEND_LIST_ITEM_LENGTH 15 +#define SF_4G_REGISTER_NETWORK_COUNT 230 +#define SUBSCRIBE_MAX_NUM 10 +#define SUBSCRIBE_SEND_MAX_NUM 50 +#define SUBSCRIBE_VIDEO_MAX_NUM 10 +#define SUBSCRIBE_VIDEO_SEND_MAX_NUM 50 + +#define SF_4G_USB_NET_DOWNLOAD 1 + +#define SF_TEST_GPRS 0 +#define CUSTOM_TEST_FTPS 0 + +#define SF_TEST_OTA_FTP 0 +#define CUSTOM_TEST_OTA_FTP 0 + +#define FASTBOOT_WAIT_FILESYS_TIMEOUT_MS 5000 +#define FASTBOOT_WAIT_FILENAMING_TIMEOUT_MS 5000 + +#define SF_BATTERY_TEST DISABLE +#define SF_BATTERY_TEST_FILE "A:\\BATTERY.TXT" +#define SF_HW_TEST_FILE "A:\\HW.TXT" +#define SF_HW_TEST DISABLE + +#ifndef ANR_FUNC +#define ANR_FUNC ENABLE +#endif +////////////////////sf end//////////////////////////////// + + +/******************************************************************************************* + * LVGL UI Style config + ******************************************************************************************/ +#if defined(_UI_STYLE_LVGL_) + +#ifdef DISPLAY_OSD_W +#undef DISPLAY_OSD_W +#endif + +#ifdef DISPLAY_OSD_H +#undef DISPLAY_OSD_H +#endif + +#ifdef DISPLAY_OSD_FMT +#undef DISPLAY_OSD_FMT +#endif + +#include "lv_conf.h" + +/******************************************************************************************* + * OSD res is determined by lvgl library (LV_HOR_RES_MAX / LV_VER_RES_MAX in the lv_conf.h) + ******************************************************************************************/ +#define DISPLAY_OSD_W LV_HOR_RES_MAX +#define DISPLAY_OSD_H LV_VER_RES_MAX + + +/******************************************************************************************* + * OSD format is determined by lvgl library (LV_COLOR_DEPTH in the lv_conf.h) + ******************************************************************************************/ +#if LV_COLOR_DEPTH == 8 + #define DISPLAY_OSD_FMT PXLFMT_INDEX8 + #define DISPLAY_HDAL_OSD_FMT HD_VIDEO_PXLFMT_I8 +#elif LV_COLOR_DEPTH == 24 + #define DISPLAY_OSD_FMT PXLFMT_RGBA5658_PK + #define DISPLAY_HDAL_OSD_FMT HD_VIDEO_PXLFMT_ARGB8565 +#elif LV_COLOR_DEPTH == 32 + #define DISPLAY_OSD_FMT PXLFMT_RGBA8888_PK + #define DISPLAY_HDAL_OSD_FMT HD_VIDEO_PXLFMT_ARGB8888 +#else + #error "LV_COLOR_DEPTH in the lv_conf.h is currently not supported" +#endif + +#define OSD_SCREEN_SIZE (DISPLAY_OSD_W*DISPLAY_OSD_H*HD_VIDEO_PXLFMT_BPP(DISPLAY_HDAL_OSD_FMT)/8) + +/******************************************************************************************* + * Movie stamp user config + ******************************************************************************************/ +#define LV_USER_CFG_STAMP_FONT_ID_XXL LV_PLUGIN_FONT_ID_NOTOSANS_BLACK_128_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_XL LV_PLUGIN_FONT_ID_NOTOSANS_BLACK_64_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_LARGE LV_PLUGIN_FONT_ID_ARIALUNI_48_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_MEDIUM LV_PLUGIN_FONT_ID_ARIALUNI_32_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_SMALL LV_PLUGIN_FONT_ID_ARIALUNI_16_1BPP +#define LV_USER_CFG_STAMP_FONT_ID_XS LV_PLUGIN_FONT_ID_NOTOSANS_BLACK_8_1BPP + +#define LV_USER_CFG_STAMP_LETTER_SPACE 0 +#define LV_USER_CFG_STAMP_TEXT_ALIGN LV_ALIGN_CENTER +#define LV_USER_CFG_STAMP_RADIUS 0 +#define LV_USER_CFG_STAMP_BORDER_WIDTH 10 +#define LV_USER_CFG_STAMP_EXT_WIDTH 0 +#define LV_USER_CFG_STAMP_EXT_HEIGHT 0 + +/* please always fill ARGB8888, alpha channel will be discarded if output format is yuv (Photo UIDateImprint) */ +#define LV_USER_CFG_STAMP_COLOR_TEXT 0xFFFFFFFF /* text color */ +#define LV_USER_CFG_STAMP_COLOR_BACKGROUND 0XFF000000 /* background color: black */ +#define LV_USER_CFG_MOVIE_DATESTAMP_COLOR_BACKGROUND 0X00000000 /* background color: none */ +#define LV_USER_CFG_STAMP_COLOR_FRAME 0x00000000 /* frame color */ + +/******************************************************************************************* + * Enable LVGL rotate depend on VDO_USE_ROTATE_BUFFER (LV_USE_GPU_NVT_DMA2D in the lv_conf.h should be enabled) + ******************************************************************************************/ +#if VDO_USE_ROTATE_BUFFER == ENABLE + #if LV_USE_GPU_NVT_DMA2D + #define LV_USER_CFG_USE_ROTATE_BUFFER 1 + #else + #error "LV_USE_GPU_NVT_DMA2D in the lv_conf.h must be enabled when VDO_USE_ROTATE_BUFFER = ENABLE" + #endif +#else + #define LV_USER_CFG_USE_ROTATE_BUFFER 0 +#endif + +#define LV_USER_CFG_USE_TWO_BUFFER 0 + +#endif + + +#endif //_PRJCFG_DVCAM_H_