154 lines
3.4 KiB
C
154 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ALPHA_TLBFLUSH_H
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#define _ALPHA_TLBFLUSH_H
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <asm/compiler.h>
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#include <asm/pgalloc.h>
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#ifndef __EXTERN_INLINE
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#define __EXTERN_INLINE extern inline
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#define __MMU_EXTERN_INLINE
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#endif
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extern void __load_new_mm_context(struct mm_struct *);
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/* Use a few helper functions to hide the ugly broken ASN
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numbers on early Alphas (ev4 and ev45). */
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__EXTERN_INLINE void
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ev4_flush_tlb_current(struct mm_struct *mm)
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{
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__load_new_mm_context(mm);
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tbiap();
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}
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__EXTERN_INLINE void
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ev5_flush_tlb_current(struct mm_struct *mm)
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{
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__load_new_mm_context(mm);
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}
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/* Flush just one page in the current TLB set. We need to be very
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careful about the icache here, there is no way to invalidate a
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specific icache page. */
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__EXTERN_INLINE void
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ev4_flush_tlb_current_page(struct mm_struct * mm,
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struct vm_area_struct *vma,
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unsigned long addr)
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{
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int tbi_flag = 2;
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if (vma->vm_flags & VM_EXEC) {
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__load_new_mm_context(mm);
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tbi_flag = 3;
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}
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tbi(tbi_flag, addr);
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}
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__EXTERN_INLINE void
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ev5_flush_tlb_current_page(struct mm_struct * mm,
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struct vm_area_struct *vma,
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unsigned long addr)
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{
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if (vma->vm_flags & VM_EXEC)
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__load_new_mm_context(mm);
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else
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tbi(2, addr);
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}
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#ifdef CONFIG_ALPHA_GENERIC
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# define flush_tlb_current alpha_mv.mv_flush_tlb_current
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# define flush_tlb_current_page alpha_mv.mv_flush_tlb_current_page
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#else
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# ifdef CONFIG_ALPHA_EV4
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# define flush_tlb_current ev4_flush_tlb_current
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# define flush_tlb_current_page ev4_flush_tlb_current_page
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# else
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# define flush_tlb_current ev5_flush_tlb_current
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# define flush_tlb_current_page ev5_flush_tlb_current_page
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# endif
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#endif
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#ifdef __MMU_EXTERN_INLINE
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#undef __EXTERN_INLINE
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#undef __MMU_EXTERN_INLINE
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#endif
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/* Flush current user mapping. */
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static inline void
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flush_tlb(void)
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{
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flush_tlb_current(current->active_mm);
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}
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/* Flush someone else's user mapping. */
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static inline void
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flush_tlb_other(struct mm_struct *mm)
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{
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unsigned long *mmc = &mm->context[smp_processor_id()];
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/* Check it's not zero first to avoid cacheline ping pong
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when possible. */
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if (*mmc) *mmc = 0;
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}
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#ifndef CONFIG_SMP
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/* Flush everything (kernel mapping may also have changed
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due to vmalloc/vfree). */
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static inline void flush_tlb_all(void)
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{
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tbia();
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}
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/* Flush a specified user mapping. */
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static inline void
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flush_tlb_mm(struct mm_struct *mm)
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{
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if (mm == current->active_mm)
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flush_tlb_current(mm);
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else
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flush_tlb_other(mm);
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}
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/* Page-granular tlb flush. */
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static inline void
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flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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{
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struct mm_struct *mm = vma->vm_mm;
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if (mm == current->active_mm)
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flush_tlb_current_page(mm, vma, addr);
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else
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flush_tlb_other(mm);
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}
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/* Flush a specified range of user mapping. On the Alpha we flush
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the whole user tlb. */
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static inline void
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flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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flush_tlb_mm(vma->vm_mm);
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}
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#else /* CONFIG_SMP */
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extern void flush_tlb_all(void);
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extern void flush_tlb_mm(struct mm_struct *);
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extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
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extern void flush_tlb_range(struct vm_area_struct *, unsigned long,
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unsigned long);
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#endif /* CONFIG_SMP */
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static inline void flush_tlb_kernel_range(unsigned long start,
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unsigned long end)
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{
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flush_tlb_all();
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}
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#endif /* _ALPHA_TLBFLUSH_H */
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