360 lines
		
	
	
		
			8.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			360 lines
		
	
	
		
			8.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2013-2014 Altera Corporation
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|  * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
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|  * Copyright (C) 2004 Microtronix Datacom Ltd.
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License. See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  */
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| 
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| #include <linux/export.h>
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| #include <linux/interrupt.h>
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| #include <linux/clockchips.h>
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| #include <linux/clocksource.h>
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| #include <linux/delay.h>
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| #include <linux/of.h>
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| #include <linux/of_address.h>
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| #include <linux/of_irq.h>
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| #include <linux/io.h>
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| #include <linux/slab.h>
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| 
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| #define ALTR_TIMER_COMPATIBLE		"altr,timer-1.0"
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| 
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| #define ALTERA_TIMER_STATUS_REG	0
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| #define ALTERA_TIMER_CONTROL_REG	4
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| #define ALTERA_TIMER_PERIODL_REG	8
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| #define ALTERA_TIMER_PERIODH_REG	12
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| #define ALTERA_TIMER_SNAPL_REG		16
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| #define ALTERA_TIMER_SNAPH_REG		20
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| 
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| #define ALTERA_TIMER_CONTROL_ITO_MSK	(0x1)
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| #define ALTERA_TIMER_CONTROL_CONT_MSK	(0x2)
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| #define ALTERA_TIMER_CONTROL_START_MSK	(0x4)
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| #define ALTERA_TIMER_CONTROL_STOP_MSK	(0x8)
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| 
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| struct nios2_timer {
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| 	void __iomem *base;
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| 	unsigned long freq;
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| };
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| 
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| struct nios2_clockevent_dev {
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| 	struct nios2_timer timer;
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| 	struct clock_event_device ced;
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| };
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| 
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| struct nios2_clocksource {
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| 	struct nios2_timer timer;
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| 	struct clocksource cs;
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| };
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| 
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| static inline struct nios2_clockevent_dev *
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| 	to_nios2_clkevent(struct clock_event_device *evt)
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| {
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| 	return container_of(evt, struct nios2_clockevent_dev, ced);
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| }
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| 
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| static inline struct nios2_clocksource *
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| 	to_nios2_clksource(struct clocksource *cs)
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| {
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| 	return container_of(cs, struct nios2_clocksource, cs);
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| }
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| 
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| static u16 timer_readw(struct nios2_timer *timer, u32 offs)
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| {
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| 	return readw(timer->base + offs);
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| }
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| 
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| static void timer_writew(struct nios2_timer *timer, u16 val, u32 offs)
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| {
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| 	writew(val, timer->base + offs);
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| }
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| 
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| static inline unsigned long read_timersnapshot(struct nios2_timer *timer)
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| {
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| 	unsigned long count;
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| 
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| 	timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG);
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| 	count = timer_readw(timer, ALTERA_TIMER_SNAPH_REG) << 16 |
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| 		timer_readw(timer, ALTERA_TIMER_SNAPL_REG);
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| 
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| 	return count;
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| }
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| 
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| static u64 nios2_timer_read(struct clocksource *cs)
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| {
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| 	struct nios2_clocksource *nios2_cs = to_nios2_clksource(cs);
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| 	unsigned long flags;
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| 	u32 count;
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| 
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| 	local_irq_save(flags);
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| 	count = read_timersnapshot(&nios2_cs->timer);
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| 	local_irq_restore(flags);
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| 
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| 	/* Counter is counting down */
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| 	return ~count;
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| }
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| 
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| static struct nios2_clocksource nios2_cs = {
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| 	.cs = {
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| 		.name	= "nios2-clksrc",
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| 		.rating	= 250,
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| 		.read	= nios2_timer_read,
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| 		.mask	= CLOCKSOURCE_MASK(32),
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| 		.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
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| 	},
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| };
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| 
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| cycles_t get_cycles(void)
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| {
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| 	/* Only read timer if it has been initialized */
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| 	if (nios2_cs.timer.base)
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| 		return nios2_timer_read(&nios2_cs.cs);
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| 	return 0;
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| }
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| EXPORT_SYMBOL(get_cycles);
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| 
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| static void nios2_timer_start(struct nios2_timer *timer)
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| {
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| 	u16 ctrl;
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| 
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| 	ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
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| 	ctrl |= ALTERA_TIMER_CONTROL_START_MSK;
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| 	timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
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| }
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| 
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| static void nios2_timer_stop(struct nios2_timer *timer)
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| {
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| 	u16 ctrl;
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| 
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| 	ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
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| 	ctrl |= ALTERA_TIMER_CONTROL_STOP_MSK;
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| 	timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
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| }
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| 
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| static void nios2_timer_config(struct nios2_timer *timer, unsigned long period,
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| 			       bool periodic)
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| {
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| 	u16 ctrl;
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| 
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| 	/* The timer's actual period is one cycle greater than the value
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| 	 * stored in the period register. */
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| 	 period--;
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| 
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| 	ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
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| 	/* stop counter */
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| 	timer_writew(timer, ctrl | ALTERA_TIMER_CONTROL_STOP_MSK,
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| 		ALTERA_TIMER_CONTROL_REG);
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| 
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| 	/* write new count */
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| 	timer_writew(timer, period, ALTERA_TIMER_PERIODL_REG);
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| 	timer_writew(timer, period >> 16, ALTERA_TIMER_PERIODH_REG);
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| 
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| 	ctrl |= ALTERA_TIMER_CONTROL_START_MSK | ALTERA_TIMER_CONTROL_ITO_MSK;
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| 	if (periodic)
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| 		ctrl |= ALTERA_TIMER_CONTROL_CONT_MSK;
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| 	else
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| 		ctrl &= ~ALTERA_TIMER_CONTROL_CONT_MSK;
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| 	timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
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| }
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| 
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| static int nios2_timer_set_next_event(unsigned long delta,
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| 	struct clock_event_device *evt)
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| {
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| 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
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| 
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| 	nios2_timer_config(&nios2_ced->timer, delta, false);
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| 
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| 	return 0;
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| }
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| 
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| static int nios2_timer_shutdown(struct clock_event_device *evt)
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| {
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| 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
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| 	struct nios2_timer *timer = &nios2_ced->timer;
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| 
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| 	nios2_timer_stop(timer);
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| 	return 0;
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| }
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| 
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| static int nios2_timer_set_periodic(struct clock_event_device *evt)
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| {
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| 	unsigned long period;
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| 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
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| 	struct nios2_timer *timer = &nios2_ced->timer;
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| 
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| 	period = DIV_ROUND_UP(timer->freq, HZ);
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| 	nios2_timer_config(timer, period, true);
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| 	return 0;
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| }
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| 
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| static int nios2_timer_resume(struct clock_event_device *evt)
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| {
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| 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
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| 	struct nios2_timer *timer = &nios2_ced->timer;
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| 
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| 	nios2_timer_start(timer);
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| 	return 0;
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| }
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| 
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| irqreturn_t timer_interrupt(int irq, void *dev_id)
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| {
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| 	struct clock_event_device *evt = (struct clock_event_device *) dev_id;
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| 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
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| 
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| 	/* Clear the interrupt condition */
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| 	timer_writew(&nios2_ced->timer, 0, ALTERA_TIMER_STATUS_REG);
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| 	evt->event_handler(evt);
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| static int __init nios2_timer_get_base_and_freq(struct device_node *np,
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| 				void __iomem **base, u32 *freq)
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| {
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| 	*base = of_iomap(np, 0);
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| 	if (!*base) {
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| 		pr_crit("Unable to map reg for %s\n", np->name);
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| 		return -ENXIO;
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| 	}
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| 
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| 	if (of_property_read_u32(np, "clock-frequency", freq)) {
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| 		pr_crit("Unable to get %s clock frequency\n", np->name);
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| 		return -EINVAL;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static struct nios2_clockevent_dev nios2_ce = {
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| 	.ced = {
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| 		.name = "nios2-clkevent",
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| 		.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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| 		.rating = 250,
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| 		.shift = 32,
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| 		.set_next_event = nios2_timer_set_next_event,
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| 		.set_state_shutdown = nios2_timer_shutdown,
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| 		.set_state_periodic = nios2_timer_set_periodic,
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| 		.set_state_oneshot = nios2_timer_shutdown,
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| 		.tick_resume = nios2_timer_resume,
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| 	},
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| };
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| 
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| static __init int nios2_clockevent_init(struct device_node *timer)
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| {
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| 	void __iomem *iobase;
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| 	u32 freq;
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| 	int irq, ret;
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| 
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| 	ret = nios2_timer_get_base_and_freq(timer, &iobase, &freq);
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| 	if (ret)
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| 		return ret;
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| 
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| 	irq = irq_of_parse_and_map(timer, 0);
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| 	if (!irq) {
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| 		pr_crit("Unable to parse timer irq\n");
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| 		return -EINVAL;
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| 	}
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| 
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| 	nios2_ce.timer.base = iobase;
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| 	nios2_ce.timer.freq = freq;
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| 
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| 	nios2_ce.ced.cpumask = cpumask_of(0);
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| 	nios2_ce.ced.irq = irq;
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| 
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| 	nios2_timer_stop(&nios2_ce.timer);
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| 	/* clear pending interrupt */
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| 	timer_writew(&nios2_ce.timer, 0, ALTERA_TIMER_STATUS_REG);
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| 
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| 	ret = request_irq(irq, timer_interrupt, IRQF_TIMER, timer->name,
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| 			  &nios2_ce.ced);
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| 	if (ret) {
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| 		pr_crit("Unable to setup timer irq\n");
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| 		return ret;
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| 	}
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| 
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| 	clockevents_config_and_register(&nios2_ce.ced, freq, 1, ULONG_MAX);
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| 
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| 	return 0;
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| }
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| 
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| static __init int nios2_clocksource_init(struct device_node *timer)
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| {
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| 	unsigned int ctrl;
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| 	void __iomem *iobase;
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| 	u32 freq;
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| 	int ret;
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| 
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| 	ret = nios2_timer_get_base_and_freq(timer, &iobase, &freq);
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| 	if (ret)
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| 		return ret;
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| 
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| 	nios2_cs.timer.base = iobase;
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| 	nios2_cs.timer.freq = freq;
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| 
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| 	ret = clocksource_register_hz(&nios2_cs.cs, freq);
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| 	if (ret)
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| 		return ret;
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| 
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| 	timer_writew(&nios2_cs.timer, USHRT_MAX, ALTERA_TIMER_PERIODL_REG);
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| 	timer_writew(&nios2_cs.timer, USHRT_MAX, ALTERA_TIMER_PERIODH_REG);
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| 
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| 	/* interrupt disable + continuous + start */
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| 	ctrl = ALTERA_TIMER_CONTROL_CONT_MSK | ALTERA_TIMER_CONTROL_START_MSK;
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| 	timer_writew(&nios2_cs.timer, ctrl, ALTERA_TIMER_CONTROL_REG);
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| 
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| 	/* Calibrate the delay loop directly */
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| 	lpj_fine = freq / HZ;
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * The first timer instance will use as a clockevent. If there are two or
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|  * more instances, the second one gets used as clocksource and all
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|  * others are unused.
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| */
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| static int __init nios2_time_init(struct device_node *timer)
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| {
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| 	static int num_called;
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| 	int ret;
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| 
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| 	switch (num_called) {
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| 	case 0:
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| 		ret = nios2_clockevent_init(timer);
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| 		break;
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| 	case 1:
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| 		ret = nios2_clocksource_init(timer);
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| 		break;
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| 	default:
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| 		ret = 0;
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| 		break;
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| 	}
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| 
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| 	num_called++;
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| 
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| 	return ret;
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| }
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| 
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| void read_persistent_clock64(struct timespec64 *ts)
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| {
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| 	ts->tv_sec = mktime64(2007, 1, 1, 0, 0, 0);
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| 	ts->tv_nsec = 0;
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| }
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| 
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| void __init time_init(void)
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| {
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| 	struct device_node *np;
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| 	int count = 0;
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| 
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| 	for_each_compatible_node(np, NULL,  ALTR_TIMER_COMPATIBLE)
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| 		count++;
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| 
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| 	if (count < 2)
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| 		panic("%d timer is found, it needs 2 timers in system\n", count);
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| 
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| 	timer_probe();
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| }
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| 
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| TIMER_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);
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