195 lines
7.4 KiB
C
Executable File
195 lines
7.4 KiB
C
Executable File
/*
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Driver Register Cache Word (RCW) operation header file.
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Driver Register Cache Word (RCW) operation header file.
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The macros defined in this header file is used to simply the register
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bit field read and write. By adapting this way of register access,
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it shall provide more error-proof and more readable way to write
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drivers. It also does register access in load/store way which allow
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one to accurately control the number of counts the register read and
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write is proceeded from code writing.
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@file RCWMacro.h
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@ingroup mIDriver
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@note Nothing.
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Copyright Novatek Microelectronics Corp. 2010. All rights reserved.
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*/
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#ifndef __ASM_ARCH_NVT_IVOT_RCW_MACRO_H
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#define __ASM_ARCH_NVT_IVOT_RCW_MACRO_H
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#include <linux/types.h>
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#include <mach/nvt-io.h>
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/**
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@addtogroup mIDriver
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*/
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//@{
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//
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// Register word value type
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//
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// The size in bits of this type should match the RCW type
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#define REGVALUE uint32_t
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#define UBITFIELD unsigned int /* Unsigned bit field */
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#define BITFIELD signed int /* Signed bit field */
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#define FALSE 0
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#define TRUE 1
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enum {
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//------------------------------------------------------
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//Mnemonic Value Description
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//------------------------------------------------------
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E_OK = 0, // Normal completion
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_SYS = (-5), // System error
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_NOMEM = (-10), // Insufficient memory
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_NOSPT = (-17), // Feature not supported
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E_INOSPT = (-18), // Feature not supported by ITRON/FILE specification
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E_RSFN = (-20), // Reserved function code number
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E_RSATR = (-24), // Reserved attribute
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_PAR = (-33), // Parameter error
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E_ID = (-35), // Invalid ID number
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_NOEXS = (-52), // Object does not exist
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E_OBJ = (-63), // Invalid object state
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_MACV = (-65), // Memory access disabled or memory access violation
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E_OACV = (-66), // Object access violation
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_CTX = (-69), // Context error
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_QOVR = (-73), // Queuing or nesting overflow
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_DLT = (-81), // Object being waited for was deleted
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// - - - - - - - - // - - - - - - - - - - - - - - - - - -
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E_TMOUT = (-85), // Polling failure or timeout exceeded
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E_RLWAI = (-86), // WAIT state was forcibly released
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// - - - - - - - - // - - - - - - - - - - - - - - - - - - -
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};
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/**
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@name Assert macros
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*/
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//@{
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#define ASSERT_CONCAT_(a, b) a##b
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#define ASSERT_CONCAT(a, b) ASSERT_CONCAT_(a, b)
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#if defined(__COUNTER__)
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#define STATIC_ASSERT(expr) \
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enum { ASSERT_CONCAT(FAILED_STATIC_ASSERT_, __COUNTER__) = 1/(expr) }
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#else
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// This might cause compile error when writing STATIC_ASSERT at the same line
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// in two (or more) files and one file include another one.
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#define STATIC_ASSERT(expr) \
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enum { ASSERT_CONCAT(FAILED_STATIC_ASSERT_, __LINE__) = 1/(expr) }
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#endif
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#define OUTW(addr, value) nvt_writel(value, addr)
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#define INW(addr) nvt_readl(addr)
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//
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// Macros for Register Cache Word (RCW) type definition
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//
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// Each RCW type should be exactly the same size with REGVALUE type
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// For example, to declare a Register Cache Word type:
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//
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// #define rcwname_OFS 0x00 /* the name of RCW corresponding register address offset
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// should be in specific format with "_OFS" appended */
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// REGDEF_BEGIN(rcwname)
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// REGDEF_BIT(field1, 8) /* declare field1 as 8 bits width */
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// REGDEF_BIT(field2, 8) /* declare field1 as 8 bits width */
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// REGDEF_BIT(, 16) /* pad reserved (not-used) bits to fill RCW type same as REGVALUE size */
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// REGDEF_END(rcwname)
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//
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// Register Cache Word type defintion header
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#define REGDEF_BEGIN(name) \
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typedef union \
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{ \
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REGVALUE reg; \
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struct \
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{
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// Register Cache Word bit defintion
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#define REGDEF_BIT(field, bits) \
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UBITFIELD field : bits;
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// Register Cache Word type defintion trailer
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#define REGDEF_END(name) \
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} bit; \
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} T_##name; \
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STATIC_ASSERT(sizeof(T_##name) == sizeof(REGVALUE));
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// Macro to define register offset
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#define REGDEF_OFFSET(name, ofs) static const uint32_t name##_OFS=(ofs);
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//
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// Macros for prerequisite stuff initialization for Register Cache Word
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// operations
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//
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// Macro to set register base address for current module
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// One must call this macro somewhere to set register I/O base address for
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// current module, either globally or locally before any RCW operations is
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// invoked
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// What this macro set is only effective in current C file
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#define REGDEF_SETIOBASE(base) static const uint32_t _REGIOBASE=(base)
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// Macro to set register repeat group offset address in byte
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// This macro is optional and only used where register with repeat group exist,
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// only one repeat group is allowed in one file
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// If registers with repeat group exist, then one only have to define the RCW type
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// for the first group, respective group of registers can be accessed through
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// RCW_LD2, RCW_ST2, RCW_LD2OF macros
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// What this macro set is only effective in current C file
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#define REGDEF_SETGRPOFS(grpofs) static const uint32_t _REGGRPOFS=(grpofs)
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//
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// Macros for Register Cache Word (RCW) operations
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//
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// These RCW operations are most likely to be used inside C functions
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// It is not recommended to use RCW_DEF(RCW) in global scope which
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// declare RCW as global variable
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// RCW_LD/RCW_ST/RCW_LDOF pair is for normal single register access while
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// RCW_LD2/RCW_ST2/RCW_LD2OF pair is for repeat group register access
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// Beware that the RCW_LD/RCW_ST/RCW_LDOF and RCW_LD2/RCW_ST2/RCW_LD2OF
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// must not be mixed used. e.g. use RCW_LD then RCW_ST2 or use RCW_LD2 then RCW_ST
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//
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// Register Cache Word declaration
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#define RCW_DEF(RCW) T##_##RCW t##RCW
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// Register Cache Word read from I/O
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#define RCW_LD(RCW) t##RCW.reg = INW(_REGIOBASE+RCW##_OFS)
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// Register Cache Word repeat from I/O for group read
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#define RCW_LD2(RCW, grpidx) t##RCW.reg = INW(_REGIOBASE+RCW##_OFS+(grpidx)*_REGGRPOFS)
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// Register Cache Word bit reference
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#define RCW_OF(RCW) t##RCW.bit
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// Register Cache Word reference
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#define RCW_VAL(RCW) t##RCW.reg
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// Register Cache Word write to I/O
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#define RCW_ST(RCW) OUTW(_REGIOBASE+RCW##_OFS, t##RCW.reg)
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// Register Cache Word write to I/O for repeat group
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#define RCW_ST2(RCW, grpidx) OUTW(_REGIOBASE+RCW##_OFS+(grpidx)*_REGGRPOFS, t##RCW.reg)
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// Register Cache Word read and reference to register cache word bit
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// !!!need to check for compiler if support for this syntax
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#define RCW_LDOF(RCW) ((T##_##RCW)(RCW_LD(RCW))).bit
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// Register Cache Word read and reference to register cache word bit for repeat group
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// !!!need to check for compiler if support for this syntax
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#define RCW_LD2OF(RCW, grpidx) ((T##_##RCW)(RCW_LD2(RCW, grpidx))).bit
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#define rcw_get_phy_addr(addr) ((addr) & 0x1FFFFFFF)
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//@}
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#endif /* __ASM_ARCH_NVT_IVOT_RCW_MACRO_H */
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