169 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			169 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
/*
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 * Copyright 2012 Markus Pargmann, Pengutronix
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 *
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 * The code contained herein is licensed under the GNU General Public
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 * License. You may obtain a copy of the GNU General Public License
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 * Version 2 or later at the following locations:
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 *
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 * http://www.opensource.org/licenses/gpl-license.html
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 * http://www.gnu.org/copyleft/gpl.html
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 */
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#include "imx27-phytec-phycard-s-som.dtsi"
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/ {
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	model = "Phytec pca100 rapid development kit";
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	compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
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	chosen {
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		stdout-path = &uart1;
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	};
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	display: display {
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		model = "Primeview-PD050VL1";
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		native-mode = <&timing0>;
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		bits-per-pixel = <16>;  /* non-standard but required */
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		fsl,pcr = <0xf0c88080>;	/* non-standard but required */
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		display-timings {
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			timing0: 640x480 {
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				hactive = <640>;
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				vactive = <480>;
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				hback-porch = <112>;
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				hfront-porch = <36>;
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				hsync-len = <32>;
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				vback-porch = <33>;
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				vfront-porch = <33>;
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				vsync-len = <2>;
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				clock-frequency = <25000000>;
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			};
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		};
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	};
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	regulators {
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		compatible = "simple-bus";
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		#address-cells = <1>;
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		#size-cells = <0>;
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		reg_3v3: regulator@0 {
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			compatible = "regulator-fixed";
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			reg = <0>;
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			regulator-name = "3V3";
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			regulator-min-microvolt = <3300000>;
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			regulator-max-microvolt = <3300000>;
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			regulator-always-on;
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		};
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	};
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};
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&fb {
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	display = <&display>;
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	status = "okay";
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};
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&i2c1 {
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	pinctrl-names = "default";
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	pinctrl-0 = <&pinctrl_i2c1>;
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	status = "okay";
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	rtc@51 {
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		compatible = "nxp,pcf8563";
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		reg = <0x51>;
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	};
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	adc@64 {
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		compatible = "maxim,max1037";
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		vcc-supply = <®_3v3>;
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		reg = <0x64>;
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	};
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};
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&iomuxc {
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	imx27-phycard-s-rdk {
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		pinctrl_i2c1: i2c1grp {
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			fsl,pins = <
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				MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
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				MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
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			>;
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		};
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		pinctrl_owire1: owire1grp {
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			fsl,pins = <
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				MX27_PAD_RTCK__OWIRE 0x0
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			>;
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		};
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		pinctrl_sdhc2: sdhc2grp {
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			fsl,pins = <
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				MX27_PAD_SD2_CLK__SD2_CLK 0x0
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				MX27_PAD_SD2_CMD__SD2_CMD 0x0
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				MX27_PAD_SD2_D0__SD2_D0 0x0
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				MX27_PAD_SD2_D1__SD2_D1 0x0
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				MX27_PAD_SD2_D2__SD2_D2 0x0
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				MX27_PAD_SD2_D3__SD2_D3 0x0
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				MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
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			>;
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		};
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		pinctrl_uart1: uart1grp {
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			fsl,pins = <
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				MX27_PAD_UART1_TXD__UART1_TXD 0x0
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				MX27_PAD_UART1_RXD__UART1_RXD 0x0
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				MX27_PAD_UART1_CTS__UART1_CTS 0x0
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				MX27_PAD_UART1_RTS__UART1_RTS 0x0
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			>;
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		};
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		pinctrl_uart2: uart2grp {
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			fsl,pins = <
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				MX27_PAD_UART2_TXD__UART2_TXD 0x0
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				MX27_PAD_UART2_RXD__UART2_RXD 0x0
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				MX27_PAD_UART2_CTS__UART2_CTS 0x0
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				MX27_PAD_UART2_RTS__UART2_RTS 0x0
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			>;
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		};
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		pinctrl_uart3: uart3grp {
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			fsl,pins = <
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				MX27_PAD_UART3_TXD__UART3_TXD 0x0
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				MX27_PAD_UART3_RXD__UART3_RXD 0x0
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				MX27_PAD_UART3_CTS__UART3_CTS 0x0
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				MX27_PAD_UART3_RTS__UART3_RTS 0x0
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			>;
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		};
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	};
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};
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&owire {
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	pinctrl-names = "default";
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	pinctrl-0 = <&pinctrl_owire1>;
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	status = "okay";
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};
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&sdhci2 {
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	pinctrl-names = "default";
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	pinctrl-0 = <&pinctrl_sdhc2>;
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	cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
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	status = "okay";
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};
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&uart1 {
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	uart-has-rtscts;
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	pinctrl-names = "default";
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	pinctrl-0 = <&pinctrl_uart1>;
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	status = "okay";
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};
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&uart2 {
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	uart-has-rtscts;
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	pinctrl-names = "default";
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	pinctrl-0 = <&pinctrl_uart2>;
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	status = "okay";
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};
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&uart3 {
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	uart-has-rtscts;
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	pinctrl-names = "default";
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	pinctrl-0 = <&pinctrl_uart3>;
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	status = "okay";
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};
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