400 lines
16 KiB
C
Executable File
400 lines
16 KiB
C
Executable File
/**
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Header file for ADC module.
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This file is the header file that define the APIs and data types for ADC module.
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The user can reference this section for the detail description of the each driver API usage
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and also the parameter descriptions and its limitations.
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The overall combinational usage flow is introduced in the application note document,
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and the user must reference to the application note for the driver usage flow.
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@file adc.h
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@ingroup mIDrvIO_ADC
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@note Nothing.
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Copyright Novatek Microelectronics Corp. 2014. All rights reserved.
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*/
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#ifndef _ADC_H
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#define _ADC_H
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#include <kwrap/nvt_type.h>
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#define ADC_TODO 0
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#if ADC_TODO
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#include "../comm/driver.h"
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#endif
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/**
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@addtogroup mIDrvIO_ADC
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*/
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//@{
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/**
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Definitions for ADC configuration ID.
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Definitions for ADC configuration ID.
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These definitions are used to configure the general settings such as adc analog block operating frequency and sample periods.
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@note Used in adc_setConfig() / adc_getConfig().
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*/
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typedef enum {
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ADC_CONFIG_ID_OCLK_FREQ, ///< Set the ADC analog block operating frequency. This value allowable range is from 250000 to 2000000 in current design.
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ADC_CONFIG_ID_SAMPLE_AVERAGE, ///< Set ADC Sample average times. Use "ADC_SAMPLEAVG" as input paramters.
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ADC_CONFIG_ID_EXT_SAMPLE_CNT, ///< Set ADC channel external HOLD time. Valid range from 0x0~0xF. This setting would enlarge the hold time of adc each channel.
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ADC_CONFIG_ID_THERMAL_AVG, ///< Set ADC thermal channel average counts, range from 2 ~ 256 as 2's order.
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ENUM_DUMMY4WORD(ADC_CONFIG_ID)
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} ADC_CONFIG_ID;
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/**
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ADC sampling average times every sequence
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Definition ADC sampling average times every output sample. By setting this value to ADC_SAMPAVG_2 or ADC_SAMPAVG_4, the
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ADC output rate would be slower because the controller would sample each ADC channel 2 or 4 times and output the average value automatically.
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@note Used in adc_setConfig(ADC_CONFIG_ID_SAMPLE_AVERAGE, ADC_SAMPAVG_1/2/4).
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*/
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typedef enum {
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ADC_SAMPAVG_1, ///< Sample one time and output the value.
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ADC_SAMPAVG_2, ///< Sample two times and output the average value.
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ADC_SAMPAVG_4 ///< Sample four times and output the average value.
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} ADC_SAMPLEAVG;
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/**
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ADC channel ID
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Definition for ADC channel identification. These definitions are used to specify the dedicated channel to access.
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@note Used in adc_open() / adc_close() / adc_readVoltage() / adc_setChConfig() / ...
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*/
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typedef enum {
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ADC_CHANNEL_0, ///< ADC channel 0
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ADC_CHANNEL_1, ///< ADC channel 1
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ADC_CHANNEL_2, ///< ADC channel 2
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ADC_CHANNEL_3, ///< ADC channel 3
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ADC_TOTAL_CH, // Total ADC channel number
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ENUM_DUMMY4WORD(ADC_CHANNEL)
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} ADC_CHANNEL;
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/**
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ADC Channel Configuration ID
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These definitions are used to configure each ADC channel operating settings such as ISR callback handler, sample frequency, interrupt enanle,
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sample mode, and also the value trigger settings. Please refer to the application note for the functional introductions.
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@note Used in adc_setChConfig(ADC_CHANNEL_X, ADC_CH_CONFIG_ID_SAMPLE_MODE) / adc_getChConfig(ADC_CHANNEL_X, ADC_CH_CONFIG_ID_SAMPLE_MODE).
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*/
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typedef enum {
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ADC_CH_CONFIG_ID_SAMPLE_MODE, ///< Set ADC Channel sample mode. Use ADC_CH_SAMPLEMODE_ONESHOT or ADC_CH_SAMPLEMODE_CONTINUOUS.
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ADC_CH_CONFIG_ID_SAMPLE_FREQ, ///< Set ADC Channel sample frequency. Unit in Hertz.
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ADC_CH_CONFIG_ID_INTEN, ///< Set ADC Channel interrupt enable/disable.
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ADC_CH_CONFIG_ID_VALUETRIG_VOL_LOW, ///< Set ADC Channel value trigger LOW voltage in mV. Valid Range from 0 to 3300(mV).
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///< The user must notice that the NT96650's ADC is 10bits design and the valid resolution is about 8bits,
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///< so the value trigger function is designed for 256 levels only(8bits) and aligned to MSB 8bits of the ADC value.
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///< So this assigned trigger voltage would be slightly different about 0~10mV if this value is read out form adc_getChConfig().
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///< This is because the ADC trigger value LSB 2 bits is forced to 0x0 in the ADC design.
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ADC_CH_CONFIG_ID_VALUETRIG_VOL_HIGH, ///< Set ADC Channel value trigger HIGH voltage in mV. Valid Range from 0 to 3300.
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///< The user must notice that the NT96650's ADC is 10bits design and the valid resolution is about 8bits,
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///< so the value trigger function is designed for 256 levels only(8bits) and aligned to MSB 8bits of the ADC value.
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///< So this assigned trigger voltage would be slightly different about 0~10mV if this value is read out form adc_getChConfig().
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///< This is because the ADC trigger value LSB 2 bits is forced to 0x0 in the ADC design.
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ADC_CH_CONFIG_ID_VALUETRIG_THD_LOW, ///< Set ADC Channel value trigger LOW threshold value. Valid Range from 0 to 1023.
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///< The user must notice that the NT96650's ADC is 10bits design and the valid resolution is about 8bits,
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///< so the value trigger function is designed for 256 levels only(8bits) and aligned to MSB 8bits of the ADC value.
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///< So this assigned trigger voltage would be slightly different about 0~2 if this value is read out form adc_getChConfig().
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///< This is because the ADC trigger value LSB 2 bits is forced to 0x0 in the ADC design.
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ADC_CH_CONFIG_ID_VALUETRIG_THD_HIGH, ///< Set ADC Channel value trigger HIGH threshold value. Valid Range from 0 to 1023.
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///< The user must notice that the NT96650's ADC is 10bits design and the valid resolution is about 8bits,
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///< so the value trigger function is designed for 256 levels only(8bits) and aligned to MSB 8bits of the ADC value.
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///< So this assigned trigger voltage would be slightly different about 0~2 if this value is read out form adc_getChConfig().
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///< This is because the ADC trigger value LSB 2 bits is forced to 0x0 in the ADC design.
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ADC_CH_CONFIG_ID_VALUETRIG_RANGE, ///< Set ADC Channel value trigger range condition. Please use ADC_VALTRIG_RANGE as input parameter.
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ADC_CH_CONFIG_ID_VALUETRIG_MODE, ///< Set ADC Channel value trigger mode condition. Please use ADC_VALTRIG_MODE as input parameter.
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ADC_CH_CONFIG_ID_VALUETRIG_EN, ///< Set ADC Channel value trigger function enable/ disable.
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ADC_CH_CONFIG_ID_VALUETRIG_INTEN, ///< Set ADC Channel value trigger interrupt enable / disable.
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ENUM_DUMMY4WORD(ADC_CH_CONFIG_ID)
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} ADC_CH_CONFIG_ID;
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/**
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ADC Channel Sample Mode
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Specify the specified ADC Channel is in OneShot or Continuously Sample Mode.
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@note Used in adc_setChConfig(ADC_CHANNEL_X, ADC_CH_CONFIG_ID_SAMPLE_MODE)
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*/
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typedef enum {
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ADC_CH_SAMPLEMODE_ONESHOT, ///< Set ADC Channel to OneShot trigger mode.
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ADC_CH_SAMPLEMODE_CONTINUOUS, ///< Set ADC Channel to Continuously trigger mode.
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ENUM_DUMMY4WORD(ADC_CH_SAMPLEMODE)
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} ADC_CH_SAMPLEMODE;
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/**
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Definitions for setup value trigger interrupt's value trigger range.
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ADC controller's value trigger interrupt can select to issue interrupt when the sample value is within specified range.
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@note Used in adc_setChConfig(ADC_CHANNEL_X, ADC_CH_CONFIG_ID_VALUETRIG_RANGE).
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*/
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typedef enum {
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ADC_VALTRIG_RANGE_IN, ///< The value trigger interrupt is issued when sample value is inside the specified range.
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ADC_VALTRIG_RANGE_OUT, ///< The value trigger interrupt is issued when sample value is outside the specified range.
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ENUM_DUMMY4WORD(ADC_VALTRIG_RANGE)
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} ADC_VALTRIG_RANGE;
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/**
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Definition for setup the value trigger interrupt is edge trigger or level trigger interrupt.
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@note Used in adc_setChConfig(ADC_CHANNEL_X, ADC_CH_CONFIG_ID_VALUETRIG_MODE).
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*/
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typedef enum {
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ADC_VALTRIG_MODE_LVL, ///< Set the value trigger interrupt issue condition to level trigger.
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ADC_VALTRIG_MODE_EDGE, ///< Set the value trigger interrupt issue condition to edge trigger.
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ENUM_DUMMY4WORD(ADC_VALTRIG_MODE)
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} ADC_VALTRIG_MODE;
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/*
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Touch Panel Configuration ID
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(OBSOLETE)
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Definitions for Touch Panel configurations.
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@note Used in adc_setTpConfig() / adc_getTpConfig().
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*/
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typedef enum {
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ADC_TP_CONFIG_ID_GSR, //< De-Glitch function of the touch panel. Unit is 4us per step. Value range 0x00 to 0xFF.
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ADC_TP_CONFIG_ID_RESISTOR, //< Configure the Touch Panel PenDown Detect Pull Up Resistor. Valid Range form 0 to 63 which means 1K~64K ohm.
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ADC_TP_CONFIG_ID_SAMPLE_FREQ, //< Configure the Touch Panel Sample Rate per seconds. The allowable range depends on the ADC OCLK_FREQ.
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ADC_TP_CONFIG_ID_OPERATE_MODE, //< Configure the Touch Panel operating mode. Please use "ADC_TP_OPMODE" and the default value is ADC_TP_OPMODE_AUTO_NORMAL.
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ADC_TP_CONFIG_ID_INTEN, //< Configure the Touch Panel interrupt enable. Please uses "ENABLE" or "DISABLE" as input parameter.
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ADC_TP_CONFIG_ID_ISR_CALLBACK, //< Configure the Touch Panel interrupt ISR callback handler.
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ADC_TP_CONFIG_ID_CURRENT_SEL, //< Configure the Touch Panel pressure measure current source. Please uses ADC_TP_CURRENT_200UA or ADC_TP_CURRENT_400UA as input parameter.
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ADC_TP_CONFIG_ID_FIFO_TH, //< When TP operate mode as ADC_TP_OPMODE_AUTO_THRESHOLD, this is used to configure the FIFO threshold. Valid range form 0x1 to 0x4.
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ADC_TP_CONFIG_ID_PRESSURE_FILT_EN, //< Configure the Touch Panel pressure filter functionality enable/disable.
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ADC_TP_CONFIG_ID_PRESSURE_TH, //< Configure the Touch Panel pressure filter functionality threshold value
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ADC_TP_CONFIG_ID_SYNC_EN, //< Configure the Touch Panel Sync to IDE functionality Enable/Disable.
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ADC_TP_CONFIG_ID_SYNC_SRC, //< Configure the Touch Panel Sync to IDE function source from IDE or IDE2. Please use ADC_TP_SYNC as input parameter.
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ADC_TP_CONFIG_ID_PRECHARGE_EN, //< Enable/Disable Touch Panel PreChare period.
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//< The PreChare period is that the TP state machine would connect to VCC first before PenDown Detect Pull Up Resistor,
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//< this period is used to charge the panel's parasitic capacitance first before using the pull up resistor.
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ADC_TP_CONFIG_ID_PRECHARGE_TIME, //< If the PreCharge Period is enabled, this is the PreCharge Time length. Unit is 4us per step. Value range 0x00 to 0xFF.
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#if defined(_NVT_FPGA_)
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ADC_TP_CONFIG_ID_MS_MODE, //< Reserved for NVT internal usage.
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ADC_TP_CONFIG_ID_MANUAL_MUX, //< Reserved for NVT internal usage.
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#endif
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ADC_TP_CONFIG_ID_TOTAL,
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ENUM_DUMMY4WORD(ADC_TP_CONFIG_ID)
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} ADC_TP_CONFIG_ID;
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/*
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TP operation mode
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(OBSOLETE)
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Definition for TP operation.
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@note Used in adc_setTpConfig(ADC_TP_CONFIG_ID_OPERATE_MODE).
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*/
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typedef enum {
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ADC_TP_OPMODE_MANUAL, //< Reserved for NVT internal usage only. Not allow setting to Manual mode.
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ADC_TP_OPMODE_AUTO_NORMAL, //< Select ADC to Auto Mode. Driver Default Value.
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ADC_TP_OPMODE_AUTO_THRESHOLD, //< Select ADC to Auto Mode with FIFO Threshold.
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ENUM_DUMMY4WORD(ADC_TP_OPMODE)
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} ADC_TP_OPMODE;
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/**
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The ADC interrupt identification IDs.
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These definitions can be used in the adc_waitInterrupt() to specify the waited interrupt events.
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*/
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typedef enum {
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ADC_INTERRUPT_READY_CH0 = 0x00000001, ///< ADC Channel 0 Data Ready
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ADC_INTERRUPT_READY_CH1 = 0x00000002, ///< ADC Channel 1 Data Ready
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ADC_INTERRUPT_READY_CH2 = 0x00000004, ///< ADC Channel 2 Data Ready
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ADC_INTERRUPT_READY_CH3 = 0x00000008, ///< ADC Channel 3 Data Ready
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ADC_INTERRUPT_VALTRIG_0 = 0x00000010, ///< ADC Channel 0 Level trigger ready
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ADC_INTERRUPT_VALTRIG_1 = 0x00000020, ///< ADC Channel 1 Level trigger ready
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ADC_INTERRUPT_VALTRIG_2 = 0x00000040, ///< ADC Channel 2 Level trigger ready
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ENUM_DUMMY4WORD(ADC_INTERRUPT)
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} ADC_INTERRUPT;
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/**
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ADC thermal average counts
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Definition ADC thermal average counts every output sample.
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@note Used in adc_setConfig(ADC_CONFIG_ID_THERMAL_AVG, ADC_THERMAL_AVG_2 ~ 128).
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*/
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typedef enum {
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ADC_THERMAL_AVG_2 = 0, ///< 2 times average.
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ADC_THERMAL_AVG_4, ///< 4 times average.
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ADC_THERMAL_AVG_8, ///< 8 times average.
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ADC_THERMAL_AVG_16, ///< 16 times average.
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ADC_THERMAL_AVG_32, ///< 32 times average.
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ADC_THERMAL_AVG_64, ///< 64 times average.
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ADC_THERMAL_AVG_128, ///< 128 times average.
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ADC_THERMAL_AVG_256, ///< 256 times average.
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} ADC_THERMAL_AVG;
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/*
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The Touch Panel interrupt identification IDs.
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(OBSOLETE)
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These definitions can be used in the callback function to identify which touch panel's interrupt is issued.
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*/
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typedef enum {
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ADC_TP_INTERRUPT_PENDOWN = 0x00004000, //< Touch Panel Pen-Down interrupt
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ADC_TP_INTERRUPT_PENUP = 0x00008000, //< Touch Panel Pen-Up interrupt
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ADC_TP_INTERRUPT_READY = 0x00001000, //< Touch Panel Data-Ready interrupt
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ADC_TP_INTERRUPT_TH_HIT = 0x00100000, //< Touch Panel Data-Ready Fifo Threshold Hit interrupt
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ADC_TP_INTERRUPT_FIFO_OVR = 0x00400000, //< Touch Panel Fifo OverRun interrupt
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ENUM_DUMMY4WORD(ADC_TP_INTERRUPT)
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} ADC_TP_INTERRUPT;
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/*
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Select the current source in presure measurement.
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(OBSOLETE)
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@note Used in adc_setTpConfig(ADC_TP_CONFIG_ID_CURRENT_SEL)
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*/
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typedef enum {
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ADC_TP_CURRENT_200UA, //< Set presure measure current source as 200uA.
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ADC_TP_CURRENT_400UA, //< Set presure measure current source as 400uA.
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ENUM_DUMMY4WORD(ADC_TP_CURRENT)
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} ADC_TP_CURRENT;
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/*
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The structure for touch panel fifo data.
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(OBSOLETE)
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This is used in the touch panel fifo threshold mode.
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@note Used i the adc_readTpFifo().
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*/
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typedef struct {
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UINT32 uiEntry; //< Number of Valid Entries
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UINT32 uiPosX[4]; //< Position X FIFO values
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UINT32 uiPosY[4]; //< Position Y FIFO values
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UINT32 uiPre1[4]; //< Pressure 1 FIFO values
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UINT32 uiPre2[4]; //< Pressure 2 FIFO values
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} ADC_TP_FIFO, *PADC_TP_FIFO;
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/*
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Select the TP Synchronization source from IDE or IDE2
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(OBSOLETE)
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@note Used in adc_setTpConfig(ADC_TP_CONFIG_ID_SYNC_SRC)
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*/
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typedef enum {
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ADC_TP_SYNC_IDE, //< TP SYNC with IDE
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ADC_TP_SYNC_IDE2, //< TP SYNC with IDE2
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ENUM_DUMMY4WORD(ADC_TP_SYNC)
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} ADC_TP_SYNC;
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/**
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Configuration ID for ADC wakeup CPU event condition.
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After CPU entering power down mode, the ADC can wakeup the CPU by the specified conditions.
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@note Used in the adc_setWakeupConfig().
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*/
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typedef enum {
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ADC_WAKEUP_CONFIG_ENABLE, ///< Set ADC Wakeup CPU source enable. Parameter uses "Bit-Wise OR" of the ADC_WAKEUP_SRC.
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ADC_WAKEUP_CONFIG_DISABLE, ///< Set ADC Wakeup CPU source disable. Parameter uses "Bit-Wise OR" of the ADC_WAKEUP_SRC.
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ENUM_DUMMY4WORD(ADC_WAKEUP_CONFIG)
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} ADC_WAKEUP_CONFIG;
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/**
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Wakeup Source Options of the ADC module
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@note Used in the adc_setWakeupConfig(ADC_WAKEUP_CONFIG_ENABLE / ADC_WAKEUP_CONFIG_DISABLE).
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*/
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typedef enum {
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ADC_WAKEUP_SRC_ADCCH_0 = 0x00000010, ///< Set ADC Wakeup CPU condition as ADC_CHANNEL_0 Value Trigger Interrupt
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ADC_WAKEUP_SRC_ADCCH_1 = 0x00000020, ///< Set ADC Wakeup CPU condition as ADC_CHANNEL_1 Value Trigger Interrupt
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ADC_WAKEUP_SRC_ADCCH_2 = 0x00000040, ///< Set ADC Wakeup CPU condition as ADC_CHANNEL_2 Value Trigger Interrupt
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ADC_WAKEUP_SRC_MASK = 0x00000070,
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ENUM_DUMMY4WORD(ADC_WAKEUP_SRC)
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} ADC_WAKEUP_SRC;
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//
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// Export ADC APIs
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//
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extern ER adc_open(ADC_CHANNEL Channel);
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extern ER adc_close(ADC_CHANNEL Channel);
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extern BOOL adc_isOpened(ADC_CHANNEL Channel);
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extern ER adc_setEnable(BOOL bEn);
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extern BOOL adc_getEnable(void);
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extern void adc_setConfig(ADC_CONFIG_ID CfgID, UINT32 uiCfgValue);
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extern UINT32 adc_getConfig(ADC_CONFIG_ID CfgID);
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extern void adc_setChConfig(ADC_CHANNEL Channel, ADC_CH_CONFIG_ID CfgID, UINT32 uiCfgValue);
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extern UINT32 adc_getChConfig(ADC_CHANNEL Channel, ADC_CH_CONFIG_ID CfgID);
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extern void adc_triggerOneShot(ADC_CHANNEL Channel);
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extern UINT32 adc_readData(ADC_CHANNEL Channel);
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extern BOOL adc_isDataReady(ADC_CHANNEL Channel);
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extern void adc_clearDataReady(ADC_CHANNEL Channel);
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extern UINT32 adc_readVoltage(ADC_CHANNEL Channel);
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extern UINT32 adc_readVoltage_channel0_avg(UINT32 device_id, UINT32 delay_time_ms);
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extern UINT32 adc_thermal_read_data(void);
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extern UINT32 adc_thermal_read_voltage(void);
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extern void adc_setCaliOffset(UINT32 Offset, UINT32 CalVDDADC);
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extern ER adc_setWakeupConfig(ADC_WAKEUP_CONFIG CfgID, UINT32 uiParam);
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extern ADC_INTERRUPT adc_waitInterrupt(ADC_INTERRUPT WaitedFlag);
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#if defined(_NVT_FPGA_)
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#define ADC_SRCCLOCK 1600000
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#else
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#define ADC_SRCCLOCK 16000000
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#endif
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#endif
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//@}
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