65 lines
1.7 KiB
C
Executable File
65 lines
1.7 KiB
C
Executable File
/*
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GPIO controller
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Sets the GPIO control of each pin.
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@file na51068_gpio_host.c
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@ingroup mIDrvSys_PAD
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@note Nothing
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Copyright Novatek Microelectronics Corp. 2019. All rights reserved.
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*/
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#include <linux/spinlock.h>
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#include "na51068_pinmux.h"
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static DEFINE_SPINLOCK(gpio_lock);
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#define loc_cpu(lock, flags) spin_lock_irqsave(lock, flags)
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#define unl_cpu(lock, flags) spin_unlock_irqrestore(lock, flags)
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void __iomem *gpio_vaddr;
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#define GPIO_SETREG(ofs,value) OUTW((gpio_vaddr+(ofs)),(value))
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#define GPIO_GETREG(ofs) INW(gpio_vaddr+(ofs))
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#define GPIO_DBG(fmt, ...) pr_info(fmt, ##__VA_ARGS__)
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#define GPIO_DBG_ERR(fmt, ...) pr_err(fmt, ##__VA_ARGS__)
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#define NVT_GPIO_PIN_DIR 0x08
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#define NVT_GPIO_DATA_SET 0x10
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#define NVT_GPIO_DATA_CLEAR 0x14
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#define NVT_GPIO_NR_PIN_PER_GROUP 32
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static unsigned int group_base_offset[] = {
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0x0, 0x20000, 0x40000, 0x240000,
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};
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void gpio_init(struct nvt_gpio_info *gpio, int nr_gpio, struct nvt_pinctrl_info *info)
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{
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u32 reg_data, offset, group, val;
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int cnt = 0;
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unsigned long flags = 0;
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gpio_vaddr = info->gpio_base;
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loc_cpu(&gpio_lock, flags);
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for (cnt = 0; cnt < nr_gpio; cnt++) {
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offset = gpio[cnt].gpio_pin;
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group = (offset >> 5);
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offset &= (NVT_GPIO_NR_PIN_PER_GROUP - 1);
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val = (1 << offset);
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/* Set output */
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reg_data = GPIO_GETREG(group_base_offset[group] + NVT_GPIO_PIN_DIR);
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reg_data |= val;
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GPIO_SETREG(group_base_offset[group] + NVT_GPIO_PIN_DIR, reg_data);
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/* Set output value */
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if (gpio[cnt].direction)
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GPIO_SETREG(group_base_offset[group] + NVT_GPIO_DATA_SET, val);
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else
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GPIO_SETREG(group_base_offset[group] + NVT_GPIO_DATA_CLEAR, val);
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}
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unl_cpu(&gpio_lock, flags);
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}
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