201 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			201 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright 2012 Freescale Semiconductor, Inc.
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|  */
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| 
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| #include <linux/clk.h>
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| #include <linux/err.h>
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| #include <linux/io.h>
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/of.h>
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| #include <linux/of_address.h>
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| #include <linux/platform_device.h>
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| #include <linux/pwm.h>
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| #include <linux/slab.h>
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| #include <linux/stmp_device.h>
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| 
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| #define SET	0x4
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| #define CLR	0x8
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| #define TOG	0xc
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| 
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| #define PWM_CTRL		0x0
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| #define PWM_ACTIVE0		0x10
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| #define PWM_PERIOD0		0x20
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| #define  PERIOD_PERIOD(p)	((p) & 0xffff)
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| #define  PERIOD_PERIOD_MAX	0x10000
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| #define  PERIOD_ACTIVE_HIGH	(3 << 16)
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| #define  PERIOD_INACTIVE_LOW	(2 << 18)
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| #define  PERIOD_CDIV(div)	(((div) & 0x7) << 20)
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| #define  PERIOD_CDIV_MAX	8
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| 
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| static const unsigned int cdiv[PERIOD_CDIV_MAX] = {
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| 	1, 2, 4, 8, 16, 64, 256, 1024
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| };
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| 
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| struct mxs_pwm_chip {
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| 	struct pwm_chip chip;
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| 	struct clk *clk;
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| 	void __iomem *base;
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| };
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| 
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| #define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip)
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| 
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| static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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| 			  int duty_ns, int period_ns)
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| {
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| 	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
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| 	int ret, div = 0;
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| 	unsigned int period_cycles, duty_cycles;
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| 	unsigned long rate;
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| 	unsigned long long c;
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| 
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| 	rate = clk_get_rate(mxs->clk);
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| 	while (1) {
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| 		c = rate / cdiv[div];
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| 		c = c * period_ns;
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| 		do_div(c, 1000000000);
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| 		if (c < PERIOD_PERIOD_MAX)
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| 			break;
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| 		div++;
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| 		if (div >= PERIOD_CDIV_MAX)
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| 			return -EINVAL;
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| 	}
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| 
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| 	period_cycles = c;
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| 	c *= duty_ns;
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| 	do_div(c, period_ns);
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| 	duty_cycles = c;
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| 
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| 	/*
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| 	 * If the PWM channel is disabled, make sure to turn on the clock
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| 	 * before writing the register. Otherwise, keep it enabled.
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| 	 */
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| 	if (!pwm_is_enabled(pwm)) {
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| 		ret = clk_prepare_enable(mxs->clk);
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| 		if (ret)
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| 			return ret;
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| 	}
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| 
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| 	writel(duty_cycles << 16,
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| 			mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20);
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| 	writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH |
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| 	       PERIOD_INACTIVE_LOW | PERIOD_CDIV(div),
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| 			mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20);
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| 
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| 	/*
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| 	 * If the PWM is not enabled, turn the clock off again to save power.
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| 	 */
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| 	if (!pwm_is_enabled(pwm))
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| 		clk_disable_unprepare(mxs->clk);
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| 
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| 	return 0;
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| }
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| 
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| static int mxs_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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| {
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| 	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
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| 	int ret;
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| 
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| 	ret = clk_prepare_enable(mxs->clk);
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| 	if (ret)
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| 		return ret;
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| 
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| 	writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET);
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| 
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| 	return 0;
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| }
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| 
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| static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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| {
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| 	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
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| 
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| 	writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR);
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| 
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| 	clk_disable_unprepare(mxs->clk);
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| }
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| 
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| static const struct pwm_ops mxs_pwm_ops = {
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| 	.config = mxs_pwm_config,
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| 	.enable = mxs_pwm_enable,
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| 	.disable = mxs_pwm_disable,
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| 	.owner = THIS_MODULE,
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| };
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| 
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| static int mxs_pwm_probe(struct platform_device *pdev)
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| {
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| 	struct device_node *np = pdev->dev.of_node;
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| 	struct mxs_pwm_chip *mxs;
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| 	struct resource *res;
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| 	int ret;
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| 
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| 	mxs = devm_kzalloc(&pdev->dev, sizeof(*mxs), GFP_KERNEL);
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| 	if (!mxs)
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| 		return -ENOMEM;
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| 
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| 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| 	mxs->base = devm_ioremap_resource(&pdev->dev, res);
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| 	if (IS_ERR(mxs->base))
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| 		return PTR_ERR(mxs->base);
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| 
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| 	mxs->clk = devm_clk_get(&pdev->dev, NULL);
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| 	if (IS_ERR(mxs->clk))
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| 		return PTR_ERR(mxs->clk);
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| 
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| 	mxs->chip.dev = &pdev->dev;
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| 	mxs->chip.ops = &mxs_pwm_ops;
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| 	mxs->chip.base = -1;
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| 
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| 	ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm);
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| 	if (ret < 0) {
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| 		dev_err(&pdev->dev, "failed to get pwm number: %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	ret = pwmchip_add(&mxs->chip);
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| 	if (ret < 0) {
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| 		dev_err(&pdev->dev, "failed to add pwm chip %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	platform_set_drvdata(pdev, mxs);
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| 
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| 	ret = stmp_reset_block(mxs->base);
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| 	if (ret)
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| 		goto pwm_remove;
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| 
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| 	return 0;
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| 
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| pwm_remove:
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| 	pwmchip_remove(&mxs->chip);
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| 	return ret;
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| }
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| 
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| static int mxs_pwm_remove(struct platform_device *pdev)
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| {
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| 	struct mxs_pwm_chip *mxs = platform_get_drvdata(pdev);
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| 
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| 	return pwmchip_remove(&mxs->chip);
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| }
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| 
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| static const struct of_device_id mxs_pwm_dt_ids[] = {
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| 	{ .compatible = "fsl,imx23-pwm", },
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| 	{ /* sentinel */ }
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| };
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| MODULE_DEVICE_TABLE(of, mxs_pwm_dt_ids);
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| 
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| static struct platform_driver mxs_pwm_driver = {
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| 	.driver = {
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| 		.name = "mxs-pwm",
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| 		.of_match_table = mxs_pwm_dt_ids,
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| 	},
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| 	.probe = mxs_pwm_probe,
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| 	.remove = mxs_pwm_remove,
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| };
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| module_platform_driver(mxs_pwm_driver);
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| 
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| MODULE_ALIAS("platform:mxs-pwm");
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| MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
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| MODULE_DESCRIPTION("Freescale MXS PWM Driver");
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| MODULE_LICENSE("GPL v2");
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