272 lines
		
	
	
		
			6.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			272 lines
		
	
	
		
			6.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Mediatek Watchdog Driver
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|  *
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|  * Copyright (C) 2014 Matthias Brugger
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|  *
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|  * Matthias Brugger <matthias.bgg@gmail.com>
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|  *
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|  * Based on sunxi_wdt.c
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|  */
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| 
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| #include <linux/err.h>
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| #include <linux/init.h>
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| #include <linux/io.h>
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/moduleparam.h>
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| #include <linux/of.h>
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| #include <linux/platform_device.h>
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| #include <linux/types.h>
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| #include <linux/watchdog.h>
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| #include <linux/delay.h>
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| 
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| #define WDT_MAX_TIMEOUT		31
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| #define WDT_MIN_TIMEOUT		1
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| #define WDT_LENGTH_TIMEOUT(n)	((n) << 5)
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| 
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| #define WDT_LENGTH		0x04
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| #define WDT_LENGTH_KEY		0x8
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| 
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| #define WDT_RST			0x08
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| #define WDT_RST_RELOAD		0x1971
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| 
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| #define WDT_MODE		0x00
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| #define WDT_MODE_EN		(1 << 0)
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| #define WDT_MODE_EXT_POL_LOW	(0 << 1)
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| #define WDT_MODE_EXT_POL_HIGH	(1 << 1)
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| #define WDT_MODE_EXRST_EN	(1 << 2)
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| #define WDT_MODE_IRQ_EN		(1 << 3)
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| #define WDT_MODE_AUTO_START	(1 << 4)
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| #define WDT_MODE_DUAL_EN	(1 << 6)
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| #define WDT_MODE_KEY		0x22000000
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| 
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| #define WDT_SWRST		0x14
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| #define WDT_SWRST_KEY		0x1209
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| 
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| #define DRV_NAME		"mtk-wdt"
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| #define DRV_VERSION		"1.0"
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| 
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| static bool nowayout = WATCHDOG_NOWAYOUT;
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| static unsigned int timeout;
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| 
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| struct mtk_wdt_dev {
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| 	struct watchdog_device wdt_dev;
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| 	void __iomem *wdt_base;
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| };
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| 
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| static int mtk_wdt_restart(struct watchdog_device *wdt_dev,
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| 			   unsigned long action, void *data)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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| 	void __iomem *wdt_base;
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| 
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| 	wdt_base = mtk_wdt->wdt_base;
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| 
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| 	while (1) {
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| 		writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
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| 		mdelay(5);
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int mtk_wdt_ping(struct watchdog_device *wdt_dev)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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| 	void __iomem *wdt_base = mtk_wdt->wdt_base;
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| 
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| 	iowrite32(WDT_RST_RELOAD, wdt_base + WDT_RST);
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| 
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| 	return 0;
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| }
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| 
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| static int mtk_wdt_set_timeout(struct watchdog_device *wdt_dev,
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| 				unsigned int timeout)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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| 	void __iomem *wdt_base = mtk_wdt->wdt_base;
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| 	u32 reg;
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| 
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| 	wdt_dev->timeout = timeout;
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| 
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| 	/*
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| 	 * One bit is the value of 512 ticks
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| 	 * The clock has 32 KHz
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| 	 */
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| 	reg = WDT_LENGTH_TIMEOUT(timeout << 6) | WDT_LENGTH_KEY;
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| 	iowrite32(reg, wdt_base + WDT_LENGTH);
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| 
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| 	mtk_wdt_ping(wdt_dev);
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| 
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| 	return 0;
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| }
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| 
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| static int mtk_wdt_stop(struct watchdog_device *wdt_dev)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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| 	void __iomem *wdt_base = mtk_wdt->wdt_base;
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| 	u32 reg;
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| 
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| 	reg = readl(wdt_base + WDT_MODE);
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| 	reg &= ~WDT_MODE_EN;
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| 	reg |= WDT_MODE_KEY;
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| 	iowrite32(reg, wdt_base + WDT_MODE);
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| 
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| 	return 0;
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| }
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| 
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| static int mtk_wdt_start(struct watchdog_device *wdt_dev)
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| {
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| 	u32 reg;
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| 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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| 	void __iomem *wdt_base = mtk_wdt->wdt_base;
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| 	int ret;
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| 
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| 	ret = mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
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| 	if (ret < 0)
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| 		return ret;
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| 
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| 	reg = ioread32(wdt_base + WDT_MODE);
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| 	reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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| 	reg |= (WDT_MODE_EN | WDT_MODE_KEY);
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| 	iowrite32(reg, wdt_base + WDT_MODE);
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| 
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| 	return 0;
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| }
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| 
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| static const struct watchdog_info mtk_wdt_info = {
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| 	.identity	= DRV_NAME,
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| 	.options	= WDIOF_SETTIMEOUT |
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| 			  WDIOF_KEEPALIVEPING |
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| 			  WDIOF_MAGICCLOSE,
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| };
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| 
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| static const struct watchdog_ops mtk_wdt_ops = {
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| 	.owner		= THIS_MODULE,
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| 	.start		= mtk_wdt_start,
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| 	.stop		= mtk_wdt_stop,
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| 	.ping		= mtk_wdt_ping,
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| 	.set_timeout	= mtk_wdt_set_timeout,
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| 	.restart	= mtk_wdt_restart,
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| };
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| 
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| static int mtk_wdt_probe(struct platform_device *pdev)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt;
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| 	struct resource *res;
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| 	int err;
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| 
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| 	mtk_wdt = devm_kzalloc(&pdev->dev, sizeof(*mtk_wdt), GFP_KERNEL);
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| 	if (!mtk_wdt)
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| 		return -ENOMEM;
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| 
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| 	platform_set_drvdata(pdev, mtk_wdt);
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| 
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| 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| 	mtk_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
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| 	if (IS_ERR(mtk_wdt->wdt_base))
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| 		return PTR_ERR(mtk_wdt->wdt_base);
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| 
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| 	mtk_wdt->wdt_dev.info = &mtk_wdt_info;
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| 	mtk_wdt->wdt_dev.ops = &mtk_wdt_ops;
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| 	mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
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| 	mtk_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
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| 	mtk_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
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| 	mtk_wdt->wdt_dev.parent = &pdev->dev;
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| 
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| 	watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, &pdev->dev);
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| 	watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
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| 	watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
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| 
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| 	watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
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| 
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| 	mtk_wdt_stop(&mtk_wdt->wdt_dev);
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| 
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| 	err = watchdog_register_device(&mtk_wdt->wdt_dev);
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| 	if (unlikely(err))
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| 		return err;
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| 
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| 	dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)\n",
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| 			mtk_wdt->wdt_dev.timeout, nowayout);
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| 
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| 	return 0;
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| }
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| 
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| static void mtk_wdt_shutdown(struct platform_device *pdev)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
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| 
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| 	if (watchdog_active(&mtk_wdt->wdt_dev))
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| 		mtk_wdt_stop(&mtk_wdt->wdt_dev);
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| }
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| 
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| static int mtk_wdt_remove(struct platform_device *pdev)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
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| 
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| 	watchdog_unregister_device(&mtk_wdt->wdt_dev);
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| 
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| 	return 0;
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| }
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| 
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| #ifdef CONFIG_PM_SLEEP
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| static int mtk_wdt_suspend(struct device *dev)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
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| 
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| 	if (watchdog_active(&mtk_wdt->wdt_dev))
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| 		mtk_wdt_stop(&mtk_wdt->wdt_dev);
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| 
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| 	return 0;
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| }
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| 
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| static int mtk_wdt_resume(struct device *dev)
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| {
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| 	struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
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| 
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| 	if (watchdog_active(&mtk_wdt->wdt_dev)) {
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| 		mtk_wdt_start(&mtk_wdt->wdt_dev);
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| 		mtk_wdt_ping(&mtk_wdt->wdt_dev);
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| 	}
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| 
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| 	return 0;
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| }
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| #endif
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| 
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| static const struct of_device_id mtk_wdt_dt_ids[] = {
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| 	{ .compatible = "mediatek,mt6589-wdt" },
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| 	{ /* sentinel */ }
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| };
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| MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
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| 
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| static const struct dev_pm_ops mtk_wdt_pm_ops = {
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| 	SET_SYSTEM_SLEEP_PM_OPS(mtk_wdt_suspend,
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| 				mtk_wdt_resume)
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| };
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| 
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| static struct platform_driver mtk_wdt_driver = {
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| 	.probe		= mtk_wdt_probe,
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| 	.remove		= mtk_wdt_remove,
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| 	.shutdown	= mtk_wdt_shutdown,
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| 	.driver		= {
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| 		.name		= DRV_NAME,
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| 		.pm		= &mtk_wdt_pm_ops,
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| 		.of_match_table	= mtk_wdt_dt_ids,
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| 	},
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| };
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| 
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| module_platform_driver(mtk_wdt_driver);
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| 
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| module_param(timeout, uint, 0);
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| MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
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| 
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| module_param(nowayout, bool, 0);
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| MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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| 			__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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| 
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| MODULE_LICENSE("GPL");
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| MODULE_AUTHOR("Matthias Brugger <matthias.bgg@gmail.com>");
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| MODULE_DESCRIPTION("Mediatek WatchDog Timer Driver");
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| MODULE_VERSION(DRV_VERSION);
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