331 lines
8.0 KiB
C
331 lines
8.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Support for periodic interrupts (100 per second) and for getting
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* the current time from the RTC on Power Macintoshes.
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*
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* We use the decrementer register for our periodic interrupts.
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*
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* Paul Mackerras August 1996.
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* Copyright (C) 1996 Paul Mackerras.
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* Copyright (C) 2003-2005 Benjamin Herrenschmidt.
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*
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/time.h>
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#include <linux/adb.h>
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#include <linux/cuda.h>
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#include <linux/pmu.h>
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#include <linux/interrupt.h>
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#include <linux/hardirq.h>
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#include <linux/rtc.h>
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#include <asm/sections.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/machdep.h>
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#include <asm/time.h>
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#include <asm/nvram.h>
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#include <asm/smu.h>
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#include "pmac.h"
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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/*
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* Offset between Unix time (1970-based) and Mac time (1904-based). Cuda and PMU
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* times wrap in 2040. If we need to handle later times, the read_time functions
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* need to be changed to interpret wrapped times as post-2040.
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*/
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#define RTC_OFFSET 2082844800
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/*
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* Calibrate the decrementer frequency with the VIA timer 1.
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*/
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#define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
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/* VIA registers */
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#define RS 0x200 /* skip between registers */
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#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
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#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
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#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
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#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
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#define ACR (11*RS) /* Auxiliary control register */
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#define IFR (13*RS) /* Interrupt flag register */
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/* Bits in ACR */
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#define T1MODE 0xc0 /* Timer 1 mode */
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#define T1MODE_CONT 0x40 /* continuous interrupts */
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/* Bits in IFR and IER */
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#define T1_INT 0x40 /* Timer 1 interrupt */
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long __init pmac_time_init(void)
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{
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s32 delta = 0;
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#ifdef CONFIG_NVRAM
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int dst;
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delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16;
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delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8;
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delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb);
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if (delta & 0x00800000UL)
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delta |= 0xFF000000UL;
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dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0);
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printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,
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dst ? "on" : "off");
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#endif
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return delta;
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}
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#ifdef CONFIG_ADB_CUDA
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static time64_t cuda_get_time(void)
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{
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struct adb_request req;
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time64_t now;
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if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_GET_TIME) < 0)
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return 0;
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while (!req.complete)
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cuda_poll();
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if (req.reply_len != 7)
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printk(KERN_ERR "cuda_get_time: got %d byte reply\n",
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req.reply_len);
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now = (u32)((req.reply[3] << 24) + (req.reply[4] << 16) +
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(req.reply[5] << 8) + req.reply[6]);
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/* it's either after year 2040, or the RTC has gone backwards */
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WARN_ON(now < RTC_OFFSET);
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return now - RTC_OFFSET;
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}
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#define cuda_get_rtc_time(tm) rtc_time64_to_tm(cuda_get_time(), (tm))
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static int cuda_set_rtc_time(struct rtc_time *tm)
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{
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u32 nowtime;
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struct adb_request req;
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nowtime = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
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if (cuda_request(&req, NULL, 6, CUDA_PACKET, CUDA_SET_TIME,
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nowtime >> 24, nowtime >> 16, nowtime >> 8,
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nowtime) < 0)
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return -ENXIO;
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while (!req.complete)
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cuda_poll();
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if ((req.reply_len != 3) && (req.reply_len != 7))
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printk(KERN_ERR "cuda_set_rtc_time: got %d byte reply\n",
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req.reply_len);
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return 0;
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}
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#else
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#define cuda_get_time() 0
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#define cuda_get_rtc_time(tm)
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#define cuda_set_rtc_time(tm) 0
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#endif
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#ifdef CONFIG_ADB_PMU
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static time64_t pmu_get_time(void)
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{
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struct adb_request req;
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time64_t now;
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if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
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return 0;
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pmu_wait_complete(&req);
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if (req.reply_len != 4)
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printk(KERN_ERR "pmu_get_time: got %d byte reply from PMU\n",
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req.reply_len);
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now = (u32)((req.reply[0] << 24) + (req.reply[1] << 16) +
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(req.reply[2] << 8) + req.reply[3]);
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/* it's either after year 2040, or the RTC has gone backwards */
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WARN_ON(now < RTC_OFFSET);
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return now - RTC_OFFSET;
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}
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#define pmu_get_rtc_time(tm) rtc_time64_to_tm(pmu_get_time(), (tm))
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static int pmu_set_rtc_time(struct rtc_time *tm)
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{
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u32 nowtime;
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struct adb_request req;
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nowtime = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
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if (pmu_request(&req, NULL, 5, PMU_SET_RTC, nowtime >> 24,
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nowtime >> 16, nowtime >> 8, nowtime) < 0)
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return -ENXIO;
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pmu_wait_complete(&req);
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if (req.reply_len != 0)
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printk(KERN_ERR "pmu_set_rtc_time: %d byte reply from PMU\n",
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req.reply_len);
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return 0;
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}
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#else
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#define pmu_get_time() 0
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#define pmu_get_rtc_time(tm)
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#define pmu_set_rtc_time(tm) 0
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#endif
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#ifdef CONFIG_PMAC_SMU
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static time64_t smu_get_time(void)
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{
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struct rtc_time tm;
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if (smu_get_rtc_time(&tm, 1))
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return 0;
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return rtc_tm_to_time64(&tm);
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}
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#else
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#define smu_get_time() 0
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#define smu_get_rtc_time(tm, spin)
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#define smu_set_rtc_time(tm, spin) 0
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#endif
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/* Can't be __init, it's called when suspending and resuming */
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time64_t pmac_get_boot_time(void)
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{
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/* Get the time from the RTC, used only at boot time */
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switch (sys_ctrler) {
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case SYS_CTRLER_CUDA:
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return cuda_get_time();
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case SYS_CTRLER_PMU:
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return pmu_get_time();
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case SYS_CTRLER_SMU:
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return smu_get_time();
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default:
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return 0;
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}
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}
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void pmac_get_rtc_time(struct rtc_time *tm)
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{
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/* Get the time from the RTC, used only at boot time */
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switch (sys_ctrler) {
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case SYS_CTRLER_CUDA:
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cuda_get_rtc_time(tm);
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break;
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case SYS_CTRLER_PMU:
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pmu_get_rtc_time(tm);
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break;
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case SYS_CTRLER_SMU:
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smu_get_rtc_time(tm, 1);
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break;
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default:
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;
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}
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}
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int pmac_set_rtc_time(struct rtc_time *tm)
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{
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switch (sys_ctrler) {
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case SYS_CTRLER_CUDA:
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return cuda_set_rtc_time(tm);
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case SYS_CTRLER_PMU:
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return pmu_set_rtc_time(tm);
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case SYS_CTRLER_SMU:
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return smu_set_rtc_time(tm, 1);
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default:
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return -ENODEV;
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}
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}
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#ifdef CONFIG_PPC32
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/*
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* Calibrate the decrementer register using VIA timer 1.
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* This is used both on powermacs and CHRP machines.
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*/
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static int __init via_calibrate_decr(void)
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{
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struct device_node *vias;
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volatile unsigned char __iomem *via;
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int count = VIA_TIMER_FREQ_6 / 100;
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unsigned int dstart, dend;
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struct resource rsrc;
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vias = of_find_node_by_name(NULL, "via-cuda");
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if (vias == NULL)
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vias = of_find_node_by_name(NULL, "via-pmu");
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if (vias == NULL)
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vias = of_find_node_by_name(NULL, "via");
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if (vias == NULL || of_address_to_resource(vias, 0, &rsrc)) {
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of_node_put(vias);
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return 0;
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}
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of_node_put(vias);
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via = ioremap(rsrc.start, resource_size(&rsrc));
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if (via == NULL) {
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printk(KERN_ERR "Failed to map VIA for timer calibration !\n");
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return 0;
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}
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/* set timer 1 for continuous interrupts */
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out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
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/* set the counter to a small value */
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out_8(&via[T1CH], 2);
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/* set the latch to `count' */
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out_8(&via[T1LL], count);
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out_8(&via[T1LH], count >> 8);
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/* wait until it hits 0 */
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while ((in_8(&via[IFR]) & T1_INT) == 0)
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;
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dstart = get_dec();
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/* clear the interrupt & wait until it hits 0 again */
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in_8(&via[T1CL]);
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while ((in_8(&via[IFR]) & T1_INT) == 0)
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;
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dend = get_dec();
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ppc_tb_freq = (dstart - dend) * 100 / 6;
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iounmap(via);
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return 1;
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}
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#endif
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/*
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* Query the OF and get the decr frequency.
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*/
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void __init pmac_calibrate_decr(void)
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{
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generic_calibrate_decr();
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#ifdef CONFIG_PPC32
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/* We assume MacRISC2 machines have correct device-tree
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* calibration. That's better since the VIA itself seems
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* to be slightly off. --BenH
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*/
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if (!of_machine_is_compatible("MacRISC2") &&
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!of_machine_is_compatible("MacRISC3") &&
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!of_machine_is_compatible("MacRISC4"))
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if (via_calibrate_decr())
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return;
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/* Special case: QuickSilver G4s seem to have a badly calibrated
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* timebase-frequency in OF, VIA is much better on these. We should
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* probably implement calibration based on the KL timer on these
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* machines anyway... -BenH
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*/
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if (of_machine_is_compatible("PowerMac3,5"))
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if (via_calibrate_decr())
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return;
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#endif
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}
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