990 lines
24 KiB
C
990 lines
24 KiB
C
/*
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* Common boot and setup code for both 32-bit and 64-bit.
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* Extracted from arch/powerpc/kernel/setup_64.c.
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*
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* Copyright (C) 2001 PPC64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#undef DEBUG
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#include <linux/export.h>
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#include <linux/string.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/reboot.h>
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#include <linux/delay.h>
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#include <linux/initrd.h>
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#include <linux/platform_device.h>
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#include <linux/seq_file.h>
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#include <linux/ioport.h>
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#include <linux/console.h>
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#include <linux/screen_info.h>
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#include <linux/root_dev.h>
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#include <linux/notifier.h>
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#include <linux/cpu.h>
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#include <linux/unistd.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/percpu.h>
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#include <linux/memblock.h>
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#include <linux/of_platform.h>
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#include <linux/hugetlb.h>
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#include <asm/debugfs.h>
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#include <asm/io.h>
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#include <asm/paca.h>
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#include <asm/prom.h>
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#include <asm/processor.h>
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#include <asm/vdso_datapage.h>
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#include <asm/pgtable.h>
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#include <asm/smp.h>
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#include <asm/elf.h>
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#include <asm/machdep.h>
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#include <asm/time.h>
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#include <asm/cputable.h>
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#include <asm/sections.h>
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#include <asm/firmware.h>
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#include <asm/btext.h>
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#include <asm/nvram.h>
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#include <asm/setup.h>
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#include <asm/rtas.h>
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#include <asm/iommu.h>
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#include <asm/serial.h>
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#include <asm/cache.h>
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/xmon.h>
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#include <asm/cputhreads.h>
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#include <mm/mmu_decl.h>
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#include <asm/fadump.h>
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#include <asm/udbg.h>
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#include <asm/hugetlb.h>
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#include <asm/livepatch.h>
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#include <asm/mmu_context.h>
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#include <asm/cpu_has_feature.h>
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#include "setup.h"
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#ifdef DEBUG
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#include <asm/udbg.h>
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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/* The main machine-dep calls structure
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*/
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struct machdep_calls ppc_md;
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EXPORT_SYMBOL(ppc_md);
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struct machdep_calls *machine_id;
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EXPORT_SYMBOL(machine_id);
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int boot_cpuid = -1;
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EXPORT_SYMBOL_GPL(boot_cpuid);
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/*
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* These are used in binfmt_elf.c to put aux entries on the stack
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* for each elf executable being started.
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*/
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int dcache_bsize;
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int icache_bsize;
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int ucache_bsize;
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unsigned long klimit = (unsigned long) _end;
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/*
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* This still seems to be needed... -- paulus
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*/
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struct screen_info screen_info = {
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.orig_x = 0,
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.orig_y = 25,
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.orig_video_cols = 80,
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.orig_video_lines = 25,
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.orig_video_isVGA = 1,
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.orig_video_points = 16
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};
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#if defined(CONFIG_FB_VGA16_MODULE)
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EXPORT_SYMBOL(screen_info);
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#endif
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/* Variables required to store legacy IO irq routing */
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int of_i8042_kbd_irq;
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EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
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int of_i8042_aux_irq;
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EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
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#ifdef __DO_IRQ_CANON
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/* XXX should go elsewhere eventually */
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int ppc_do_canonicalize_irqs;
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EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
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#endif
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#ifdef CONFIG_CRASH_CORE
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/* This keeps a track of which one is the crashing cpu. */
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int crashing_cpu = -1;
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#endif
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/* also used by kexec */
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void machine_shutdown(void)
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{
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#ifdef CONFIG_FA_DUMP
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/*
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* if fadump is active, cleanup the fadump registration before we
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* shutdown.
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*/
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fadump_cleanup();
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#endif
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if (ppc_md.machine_shutdown)
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ppc_md.machine_shutdown();
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}
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static void machine_hang(void)
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{
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pr_emerg("System Halted, OK to turn off power\n");
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local_irq_disable();
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while (1)
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;
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}
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void machine_restart(char *cmd)
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{
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machine_shutdown();
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if (ppc_md.restart)
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ppc_md.restart(cmd);
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smp_send_stop();
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do_kernel_restart(cmd);
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mdelay(1000);
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machine_hang();
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}
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void machine_power_off(void)
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{
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machine_shutdown();
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if (pm_power_off)
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pm_power_off();
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smp_send_stop();
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machine_hang();
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}
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/* Used by the G5 thermal driver */
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EXPORT_SYMBOL_GPL(machine_power_off);
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void (*pm_power_off)(void);
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EXPORT_SYMBOL_GPL(pm_power_off);
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void machine_halt(void)
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{
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machine_shutdown();
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if (ppc_md.halt)
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ppc_md.halt();
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smp_send_stop();
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machine_hang();
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}
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#ifdef CONFIG_SMP
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DEFINE_PER_CPU(unsigned int, cpu_pvr);
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#endif
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static void show_cpuinfo_summary(struct seq_file *m)
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{
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struct device_node *root;
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const char *model = NULL;
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#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
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unsigned long bogosum = 0;
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int i;
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for_each_online_cpu(i)
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bogosum += loops_per_jiffy;
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seq_printf(m, "total bogomips\t: %lu.%02lu\n",
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bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
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#endif /* CONFIG_SMP && CONFIG_PPC32 */
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seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
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if (ppc_md.name)
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seq_printf(m, "platform\t: %s\n", ppc_md.name);
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root = of_find_node_by_path("/");
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if (root)
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model = of_get_property(root, "model", NULL);
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if (model)
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seq_printf(m, "model\t\t: %s\n", model);
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of_node_put(root);
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if (ppc_md.show_cpuinfo != NULL)
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ppc_md.show_cpuinfo(m);
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#ifdef CONFIG_PPC32
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/* Display the amount of memory */
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seq_printf(m, "Memory\t\t: %d MB\n",
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(unsigned int)(total_memory / (1024 * 1024)));
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#endif
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}
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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unsigned long cpu_id = (unsigned long)v - 1;
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unsigned int pvr;
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unsigned long proc_freq;
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unsigned short maj;
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unsigned short min;
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#ifdef CONFIG_SMP
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pvr = per_cpu(cpu_pvr, cpu_id);
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#else
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pvr = mfspr(SPRN_PVR);
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#endif
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maj = (pvr >> 8) & 0xFF;
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min = pvr & 0xFF;
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seq_printf(m, "processor\t: %lu\n", cpu_id);
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seq_printf(m, "cpu\t\t: ");
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if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
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seq_printf(m, "%s", cur_cpu_spec->cpu_name);
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else
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seq_printf(m, "unknown (%08x)", pvr);
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#ifdef CONFIG_ALTIVEC
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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seq_printf(m, ", altivec supported");
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#endif /* CONFIG_ALTIVEC */
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seq_printf(m, "\n");
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#ifdef CONFIG_TAU
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if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
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#ifdef CONFIG_TAU_AVERAGE
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/* more straightforward, but potentially misleading */
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seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
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cpu_temp(cpu_id));
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#else
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/* show the actual temp sensor range */
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u32 temp;
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temp = cpu_temp_both(cpu_id);
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seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
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temp & 0xff, temp >> 16);
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#endif
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}
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#endif /* CONFIG_TAU */
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/*
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* Platforms that have variable clock rates, should implement
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* the method ppc_md.get_proc_freq() that reports the clock
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* rate of a given cpu. The rest can use ppc_proc_freq to
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* report the clock rate that is same across all cpus.
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*/
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if (ppc_md.get_proc_freq)
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proc_freq = ppc_md.get_proc_freq(cpu_id);
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else
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proc_freq = ppc_proc_freq;
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if (proc_freq)
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seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
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proc_freq / 1000000, proc_freq % 1000000);
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if (ppc_md.show_percpuinfo != NULL)
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ppc_md.show_percpuinfo(m, cpu_id);
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/* If we are a Freescale core do a simple check so
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* we dont have to keep adding cases in the future */
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if (PVR_VER(pvr) & 0x8000) {
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switch (PVR_VER(pvr)) {
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case 0x8000: /* 7441/7450/7451, Voyager */
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case 0x8001: /* 7445/7455, Apollo 6 */
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case 0x8002: /* 7447/7457, Apollo 7 */
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case 0x8003: /* 7447A, Apollo 7 PM */
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case 0x8004: /* 7448, Apollo 8 */
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case 0x800c: /* 7410, Nitro */
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maj = ((pvr >> 8) & 0xF);
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min = PVR_MIN(pvr);
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break;
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default: /* e500/book-e */
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maj = PVR_MAJ(pvr);
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min = PVR_MIN(pvr);
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break;
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}
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} else {
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switch (PVR_VER(pvr)) {
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case 0x0020: /* 403 family */
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maj = PVR_MAJ(pvr) + 1;
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min = PVR_MIN(pvr);
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break;
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case 0x1008: /* 740P/750P ?? */
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maj = ((pvr >> 8) & 0xFF) - 1;
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min = pvr & 0xFF;
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break;
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case 0x004e: /* POWER9 bits 12-15 give chip type */
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maj = (pvr >> 8) & 0x0F;
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min = pvr & 0xFF;
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break;
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default:
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maj = (pvr >> 8) & 0xFF;
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min = pvr & 0xFF;
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break;
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}
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}
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seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
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maj, min, PVR_VER(pvr), PVR_REV(pvr));
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#ifdef CONFIG_PPC32
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seq_printf(m, "bogomips\t: %lu.%02lu\n",
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loops_per_jiffy / (500000/HZ),
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(loops_per_jiffy / (5000/HZ)) % 100);
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#endif
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seq_printf(m, "\n");
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/* If this is the last cpu, print the summary */
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if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
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show_cpuinfo_summary(m);
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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if (*pos == 0) /* just in case, cpu 0 is not the first */
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*pos = cpumask_first(cpu_online_mask);
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else
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*pos = cpumask_next(*pos - 1, cpu_online_mask);
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if ((*pos) < nr_cpu_ids)
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return (void *)(unsigned long)(*pos + 1);
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return NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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(*pos)++;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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void __init check_for_initrd(void)
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{
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#ifdef CONFIG_BLK_DEV_INITRD
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DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
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initrd_start, initrd_end);
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/* If we were passed an initrd, set the ROOT_DEV properly if the values
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* look sensible. If not, clear initrd reference.
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*/
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if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
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initrd_end > initrd_start)
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ROOT_DEV = Root_RAM0;
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else
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initrd_start = initrd_end = 0;
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if (initrd_start)
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pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
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DBG(" <- check_for_initrd()\n");
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#endif /* CONFIG_BLK_DEV_INITRD */
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}
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#ifdef CONFIG_SMP
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int threads_per_core, threads_per_subcore, threads_shift;
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cpumask_t threads_core_mask;
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EXPORT_SYMBOL_GPL(threads_per_core);
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EXPORT_SYMBOL_GPL(threads_per_subcore);
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EXPORT_SYMBOL_GPL(threads_shift);
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EXPORT_SYMBOL_GPL(threads_core_mask);
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static void __init cpu_init_thread_core_maps(int tpc)
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{
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int i;
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threads_per_core = tpc;
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threads_per_subcore = tpc;
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cpumask_clear(&threads_core_mask);
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/* This implementation only supports power of 2 number of threads
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* for simplicity and performance
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*/
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threads_shift = ilog2(tpc);
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BUG_ON(tpc != (1 << threads_shift));
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for (i = 0; i < tpc; i++)
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cpumask_set_cpu(i, &threads_core_mask);
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printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
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tpc, tpc > 1 ? "s" : "");
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printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
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}
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u32 *cpu_to_phys_id = NULL;
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/**
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* setup_cpu_maps - initialize the following cpu maps:
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* cpu_possible_mask
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* cpu_present_mask
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*
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* Having the possible map set up early allows us to restrict allocations
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* of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
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*
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* We do not initialize the online map here; cpus set their own bits in
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* cpu_online_mask as they come up.
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*
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* This function is valid only for Open Firmware systems. finish_device_tree
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* must be called before using this.
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*
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* While we're here, we may as well set the "physical" cpu ids in the paca.
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*
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* NOTE: This must match the parsing done in early_init_dt_scan_cpus.
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*/
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void __init smp_setup_cpu_maps(void)
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{
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struct device_node *dn;
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int cpu = 0;
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int nthreads = 1;
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DBG("smp_setup_cpu_maps()\n");
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cpu_to_phys_id = __va(memblock_alloc(nr_cpu_ids * sizeof(u32),
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__alignof__(u32)));
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memset(cpu_to_phys_id, 0, nr_cpu_ids * sizeof(u32));
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for_each_node_by_type(dn, "cpu") {
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const __be32 *intserv;
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__be32 cpu_be;
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int j, len;
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DBG(" * %pOF...\n", dn);
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intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
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&len);
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if (intserv) {
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DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
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nthreads);
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} else {
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DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
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intserv = of_get_property(dn, "reg", &len);
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if (!intserv) {
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cpu_be = cpu_to_be32(cpu);
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/* XXX: what is this? uninitialized?? */
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intserv = &cpu_be; /* assume logical == phys */
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len = 4;
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}
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}
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nthreads = len / sizeof(int);
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for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
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bool avail;
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DBG(" thread %d -> cpu %d (hard id %d)\n",
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j, cpu, be32_to_cpu(intserv[j]));
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avail = of_device_is_available(dn);
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if (!avail)
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avail = !of_property_match_string(dn,
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"enable-method", "spin-table");
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set_cpu_present(cpu, avail);
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set_cpu_possible(cpu, true);
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cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
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cpu++;
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}
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if (cpu >= nr_cpu_ids) {
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of_node_put(dn);
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break;
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}
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}
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|
|
/* If no SMT supported, nthreads is forced to 1 */
|
|
if (!cpu_has_feature(CPU_FTR_SMT)) {
|
|
DBG(" SMT disabled ! nthreads forced to 1\n");
|
|
nthreads = 1;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC64
|
|
/*
|
|
* On pSeries LPAR, we need to know how many cpus
|
|
* could possibly be added to this partition.
|
|
*/
|
|
if (firmware_has_feature(FW_FEATURE_LPAR) &&
|
|
(dn = of_find_node_by_path("/rtas"))) {
|
|
int num_addr_cell, num_size_cell, maxcpus;
|
|
const __be32 *ireg;
|
|
|
|
num_addr_cell = of_n_addr_cells(dn);
|
|
num_size_cell = of_n_size_cells(dn);
|
|
|
|
ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
|
|
|
|
if (!ireg)
|
|
goto out;
|
|
|
|
maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
|
|
|
|
/* Double maxcpus for processors which have SMT capability */
|
|
if (cpu_has_feature(CPU_FTR_SMT))
|
|
maxcpus *= nthreads;
|
|
|
|
if (maxcpus > nr_cpu_ids) {
|
|
printk(KERN_WARNING
|
|
"Partition configured for %d cpus, "
|
|
"operating system maximum is %u.\n",
|
|
maxcpus, nr_cpu_ids);
|
|
maxcpus = nr_cpu_ids;
|
|
} else
|
|
printk(KERN_INFO "Partition configured for %d cpus.\n",
|
|
maxcpus);
|
|
|
|
for (cpu = 0; cpu < maxcpus; cpu++)
|
|
set_cpu_possible(cpu, true);
|
|
out:
|
|
of_node_put(dn);
|
|
}
|
|
vdso_data->processorCount = num_present_cpus();
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
/* Initialize CPU <=> thread mapping/
|
|
*
|
|
* WARNING: We assume that the number of threads is the same for
|
|
* every CPU in the system. If that is not the case, then some code
|
|
* here will have to be reworked
|
|
*/
|
|
cpu_init_thread_core_maps(nthreads);
|
|
|
|
/* Now that possible cpus are set, set nr_cpu_ids for later use */
|
|
setup_nr_cpu_ids();
|
|
|
|
free_unused_pacas();
|
|
}
|
|
#endif /* CONFIG_SMP */
|
|
|
|
#ifdef CONFIG_PCSPKR_PLATFORM
|
|
static __init int add_pcspkr(void)
|
|
{
|
|
struct device_node *np;
|
|
struct platform_device *pd;
|
|
int ret;
|
|
|
|
np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
|
|
of_node_put(np);
|
|
if (!np)
|
|
return -ENODEV;
|
|
|
|
pd = platform_device_alloc("pcspkr", -1);
|
|
if (!pd)
|
|
return -ENOMEM;
|
|
|
|
ret = platform_device_add(pd);
|
|
if (ret)
|
|
platform_device_put(pd);
|
|
|
|
return ret;
|
|
}
|
|
device_initcall(add_pcspkr);
|
|
#endif /* CONFIG_PCSPKR_PLATFORM */
|
|
|
|
void probe_machine(void)
|
|
{
|
|
extern struct machdep_calls __machine_desc_start;
|
|
extern struct machdep_calls __machine_desc_end;
|
|
unsigned int i;
|
|
|
|
/*
|
|
* Iterate all ppc_md structures until we find the proper
|
|
* one for the current machine type
|
|
*/
|
|
DBG("Probing machine type ...\n");
|
|
|
|
/*
|
|
* Check ppc_md is empty, if not we have a bug, ie, we setup an
|
|
* entry before probe_machine() which will be overwritten
|
|
*/
|
|
for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
|
|
if (((void **)&ppc_md)[i]) {
|
|
printk(KERN_ERR "Entry %d in ppc_md non empty before"
|
|
" machine probe !\n", i);
|
|
}
|
|
}
|
|
|
|
for (machine_id = &__machine_desc_start;
|
|
machine_id < &__machine_desc_end;
|
|
machine_id++) {
|
|
DBG(" %s ...", machine_id->name);
|
|
memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
|
|
if (ppc_md.probe()) {
|
|
DBG(" match !\n");
|
|
break;
|
|
}
|
|
DBG("\n");
|
|
}
|
|
/* What can we do if we didn't find ? */
|
|
if (machine_id >= &__machine_desc_end) {
|
|
DBG("No suitable machine found !\n");
|
|
for (;;);
|
|
}
|
|
|
|
printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
|
|
}
|
|
|
|
/* Match a class of boards, not a specific device configuration. */
|
|
int check_legacy_ioport(unsigned long base_port)
|
|
{
|
|
struct device_node *parent, *np = NULL;
|
|
int ret = -ENODEV;
|
|
|
|
switch(base_port) {
|
|
case I8042_DATA_REG:
|
|
if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
|
|
np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
|
|
if (np) {
|
|
parent = of_get_parent(np);
|
|
|
|
of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
|
|
if (!of_i8042_kbd_irq)
|
|
of_i8042_kbd_irq = 1;
|
|
|
|
of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
|
|
if (!of_i8042_aux_irq)
|
|
of_i8042_aux_irq = 12;
|
|
|
|
of_node_put(np);
|
|
np = parent;
|
|
break;
|
|
}
|
|
np = of_find_node_by_type(NULL, "8042");
|
|
/* Pegasos has no device_type on its 8042 node, look for the
|
|
* name instead */
|
|
if (!np)
|
|
np = of_find_node_by_name(NULL, "8042");
|
|
if (np) {
|
|
of_i8042_kbd_irq = 1;
|
|
of_i8042_aux_irq = 12;
|
|
}
|
|
break;
|
|
case FDC_BASE: /* FDC1 */
|
|
np = of_find_node_by_type(NULL, "fdc");
|
|
break;
|
|
default:
|
|
/* ipmi is supposed to fail here */
|
|
break;
|
|
}
|
|
if (!np)
|
|
return ret;
|
|
parent = of_get_parent(np);
|
|
if (parent) {
|
|
if (strcmp(parent->type, "isa") == 0)
|
|
ret = 0;
|
|
of_node_put(parent);
|
|
}
|
|
of_node_put(np);
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(check_legacy_ioport);
|
|
|
|
static int ppc_panic_event(struct notifier_block *this,
|
|
unsigned long event, void *ptr)
|
|
{
|
|
/*
|
|
* panic does a local_irq_disable, but we really
|
|
* want interrupts to be hard disabled.
|
|
*/
|
|
hard_irq_disable();
|
|
|
|
/*
|
|
* If firmware-assisted dump has been registered then trigger
|
|
* firmware-assisted dump and let firmware handle everything else.
|
|
*/
|
|
crash_fadump(NULL, ptr);
|
|
if (ppc_md.panic)
|
|
ppc_md.panic(ptr); /* May not return */
|
|
return NOTIFY_DONE;
|
|
}
|
|
|
|
static struct notifier_block ppc_panic_block = {
|
|
.notifier_call = ppc_panic_event,
|
|
.priority = INT_MIN /* may not return; must be done last */
|
|
};
|
|
|
|
void __init setup_panic(void)
|
|
{
|
|
/* PPC64 always does a hard irq disable in its panic handler */
|
|
if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
|
|
return;
|
|
atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
|
|
}
|
|
|
|
#ifdef CONFIG_CHECK_CACHE_COHERENCY
|
|
/*
|
|
* For platforms that have configurable cache-coherency. This function
|
|
* checks that the cache coherency setting of the kernel matches the setting
|
|
* left by the firmware, as indicated in the device tree. Since a mismatch
|
|
* will eventually result in DMA failures, we print * and error and call
|
|
* BUG() in that case.
|
|
*/
|
|
|
|
#ifdef CONFIG_NOT_COHERENT_CACHE
|
|
#define KERNEL_COHERENCY 0
|
|
#else
|
|
#define KERNEL_COHERENCY 1
|
|
#endif
|
|
|
|
static int __init check_cache_coherency(void)
|
|
{
|
|
struct device_node *np;
|
|
const void *prop;
|
|
int devtree_coherency;
|
|
|
|
np = of_find_node_by_path("/");
|
|
prop = of_get_property(np, "coherency-off", NULL);
|
|
of_node_put(np);
|
|
|
|
devtree_coherency = prop ? 0 : 1;
|
|
|
|
if (devtree_coherency != KERNEL_COHERENCY) {
|
|
printk(KERN_ERR
|
|
"kernel coherency:%s != device tree_coherency:%s\n",
|
|
KERNEL_COHERENCY ? "on" : "off",
|
|
devtree_coherency ? "on" : "off");
|
|
BUG();
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
late_initcall(check_cache_coherency);
|
|
#endif /* CONFIG_CHECK_CACHE_COHERENCY */
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
struct dentry *powerpc_debugfs_root;
|
|
EXPORT_SYMBOL(powerpc_debugfs_root);
|
|
|
|
static int powerpc_debugfs_init(void)
|
|
{
|
|
powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
|
|
|
|
return powerpc_debugfs_root == NULL;
|
|
}
|
|
arch_initcall(powerpc_debugfs_init);
|
|
#endif
|
|
|
|
void ppc_printk_progress(char *s, unsigned short hex)
|
|
{
|
|
pr_info("%s\n", s);
|
|
}
|
|
|
|
void arch_setup_pdev_archdata(struct platform_device *pdev)
|
|
{
|
|
pdev->archdata.dma_mask = DMA_BIT_MASK(32);
|
|
pdev->dev.dma_mask = &pdev->archdata.dma_mask;
|
|
set_dma_ops(&pdev->dev, &dma_nommu_ops);
|
|
}
|
|
|
|
static __init void print_system_info(void)
|
|
{
|
|
pr_info("-----------------------------------------------------\n");
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
|
|
#endif
|
|
#ifdef CONFIG_PPC_STD_MMU_32
|
|
pr_info("Hash_size = 0x%lx\n", Hash_size);
|
|
#endif
|
|
pr_info("phys_mem_size = 0x%llx\n",
|
|
(unsigned long long)memblock_phys_mem_size());
|
|
|
|
pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
|
|
pr_info("icache_bsize = 0x%x\n", icache_bsize);
|
|
if (ucache_bsize != 0)
|
|
pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
|
|
|
|
pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
|
|
pr_info(" possible = 0x%016lx\n",
|
|
(unsigned long)CPU_FTRS_POSSIBLE);
|
|
pr_info(" always = 0x%016lx\n",
|
|
(unsigned long)CPU_FTRS_ALWAYS);
|
|
pr_info("cpu_user_features = 0x%08x 0x%08x\n",
|
|
cur_cpu_spec->cpu_user_features,
|
|
cur_cpu_spec->cpu_user_features2);
|
|
pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
|
|
#ifdef CONFIG_PPC64
|
|
pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
if (htab_address)
|
|
pr_info("htab_address = 0x%p\n", htab_address);
|
|
if (htab_hash_mask)
|
|
pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
|
|
#endif
|
|
#ifdef CONFIG_PPC_STD_MMU_32
|
|
if (Hash)
|
|
pr_info("Hash = 0x%p\n", Hash);
|
|
if (Hash_mask)
|
|
pr_info("Hash_mask = 0x%lx\n", Hash_mask);
|
|
#endif
|
|
|
|
if (PHYSICAL_START > 0)
|
|
pr_info("physical_start = 0x%llx\n",
|
|
(unsigned long long)PHYSICAL_START);
|
|
pr_info("-----------------------------------------------------\n");
|
|
}
|
|
|
|
#ifdef CONFIG_SMP
|
|
static void smp_setup_pacas(void)
|
|
{
|
|
int cpu;
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
if (cpu == smp_processor_id())
|
|
continue;
|
|
allocate_paca(cpu);
|
|
set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
|
|
}
|
|
|
|
memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
|
|
cpu_to_phys_id = NULL;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Called into from start_kernel this initializes memblock, which is used
|
|
* to manage page allocation until mem_init is called.
|
|
*/
|
|
void __init setup_arch(char **cmdline_p)
|
|
{
|
|
*cmdline_p = boot_command_line;
|
|
|
|
/* Set a half-reasonable default so udelay does something sensible */
|
|
loops_per_jiffy = 500000000 / HZ;
|
|
|
|
/* Unflatten the device-tree passed by prom_init or kexec */
|
|
unflatten_device_tree();
|
|
|
|
/*
|
|
* Initialize cache line/block info from device-tree (on ppc64) or
|
|
* just cputable (on ppc32).
|
|
*/
|
|
initialize_cache_info();
|
|
|
|
/* Initialize RTAS if available. */
|
|
rtas_initialize();
|
|
|
|
/* Check if we have an initrd provided via the device-tree. */
|
|
check_for_initrd();
|
|
|
|
/* Probe the machine type, establish ppc_md. */
|
|
probe_machine();
|
|
|
|
/* Setup panic notifier if requested by the platform. */
|
|
setup_panic();
|
|
|
|
/*
|
|
* Configure ppc_md.power_save (ppc32 only, 64-bit machines do
|
|
* it from their respective probe() function.
|
|
*/
|
|
setup_power_save();
|
|
|
|
/* Discover standard serial ports. */
|
|
find_legacy_serial_ports();
|
|
|
|
/* Register early console with the printk subsystem. */
|
|
register_early_udbg_console();
|
|
|
|
/* Setup the various CPU maps based on the device-tree. */
|
|
smp_setup_cpu_maps();
|
|
|
|
/* Initialize xmon. */
|
|
xmon_setup();
|
|
|
|
/* Check the SMT related command line arguments (ppc64). */
|
|
check_smt_enabled();
|
|
|
|
/* Parse memory topology */
|
|
mem_topology_setup();
|
|
|
|
/*
|
|
* Release secondary cpus out of their spinloops at 0x60 now that
|
|
* we can map physical -> logical CPU ids.
|
|
*
|
|
* Freescale Book3e parts spin in a loop provided by firmware,
|
|
* so smp_release_cpus() does nothing for them.
|
|
*/
|
|
#ifdef CONFIG_SMP
|
|
smp_setup_pacas();
|
|
|
|
/* On BookE, setup per-core TLB data structures. */
|
|
setup_tlb_core_data();
|
|
|
|
smp_release_cpus();
|
|
#endif
|
|
|
|
/* Print various info about the machine that has been gathered so far. */
|
|
print_system_info();
|
|
|
|
/* Reserve large chunks of memory for use by CMA for KVM. */
|
|
kvm_cma_reserve();
|
|
|
|
klp_init_thread_info(&init_thread_info);
|
|
|
|
init_mm.start_code = (unsigned long)_stext;
|
|
init_mm.end_code = (unsigned long) _etext;
|
|
init_mm.end_data = (unsigned long) _edata;
|
|
init_mm.brk = klimit;
|
|
|
|
#ifdef CONFIG_PPC_MM_SLICES
|
|
#ifdef CONFIG_PPC64
|
|
if (!radix_enabled())
|
|
init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64;
|
|
#elif defined(CONFIG_PPC_8xx)
|
|
init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW;
|
|
#else
|
|
#error "context.addr_limit not initialized."
|
|
#endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_SPAPR_TCE_IOMMU
|
|
mm_iommu_init(&init_mm);
|
|
#endif
|
|
irqstack_early_init();
|
|
exc_lvl_early_init();
|
|
emergency_stack_init();
|
|
|
|
initmem_init();
|
|
|
|
#ifdef CONFIG_DUMMY_CONSOLE
|
|
conswitchp = &dummy_con;
|
|
#endif
|
|
if (ppc_md.setup_arch)
|
|
ppc_md.setup_arch();
|
|
|
|
setup_barrier_nospec();
|
|
setup_spectre_v2();
|
|
|
|
paging_init();
|
|
|
|
/* Initialize the MMU context management stuff. */
|
|
mmu_context_init();
|
|
|
|
#ifdef CONFIG_PPC64
|
|
/* Interrupt code needs to be 64K-aligned. */
|
|
if ((unsigned long)_stext & 0xffff)
|
|
panic("Kernelbase not 64K-aligned (0x%lx)!\n",
|
|
(unsigned long)_stext);
|
|
#endif
|
|
}
|