243 lines
		
	
	
		
			4.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			243 lines
		
	
	
		
			4.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: (GPL-2.0 OR MIT)
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| /*
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|  * Device Tree include file for SolidRun Clearfog 88F6828 based boards
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|  *
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|  *  Copyright (C) 2015 Russell King
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|  */
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| 
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| #include "armada-388.dtsi"
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| #include "armada-38x-solidrun-microsom.dtsi"
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| 
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| / {
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| 	aliases {
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| 		/* So that mvebu u-boot can update the MAC addresses */
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| 		ethernet1 = ð0;
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| 		ethernet2 = ð1;
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| 		ethernet3 = ð2;
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| 	};
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| 
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| 	chosen {
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| 		stdout-path = "serial0:115200n8";
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| 	};
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| 
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| 	reg_3p3v: regulator-3p3v {
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| 		compatible = "regulator-fixed";
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| 		regulator-name = "3P3V";
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| 		regulator-min-microvolt = <3300000>;
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| 		regulator-max-microvolt = <3300000>;
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| 		regulator-always-on;
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| 	};
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| 
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| 	soc {
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| 		internal-regs {
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| 			sata@a8000 {
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| 				/* pinctrl? */
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| 				status = "okay";
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| 			};
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| 
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| 			sata@e0000 {
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| 				/* pinctrl? */
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| 				status = "okay";
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| 			};
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| 
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| 			sdhci@d8000 {
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| 				bus-width = <4>;
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| 				cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
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| 				no-1-8-v;
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| 				pinctrl-0 = <µsom_sdhci_pins
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| 					     &clearfog_sdhci_cd_pins>;
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| 				pinctrl-names = "default";
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| 				status = "okay";
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| 				vmmc-supply = <®_3p3v>;
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| 				wp-inverted;
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| 			};
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| 
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| 			usb@58000 {
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| 				/* CON3, nearest  power. */
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| 				status = "okay";
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| 			};
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| 
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| 			usb3@f8000 {
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| 				/* CON7 */
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| 				status = "okay";
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| 			};
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| 		};
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| 
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| 		pcie {
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| 			status = "okay";
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| 			/*
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| 			 * The two PCIe units are accessible through
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| 			 * the mini-PCIe connectors on the board.
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| 			 */
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| 			pcie@2,0 {
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| 				/* Port 1, Lane 0. CON3, nearest power. */
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| 				reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
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| 				status = "okay";
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| 			};
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| 		};
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| 	};
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| 
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| 	sfp: sfp {
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| 		compatible = "sff,sfp";
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| 		i2c-bus = <&i2c1>;
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| 		los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
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| 		mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
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| 		tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
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| 		tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
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| 		maximum-power-milliwatt = <2000>;
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| 	};
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| };
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| 
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| ð1 {
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| 	/* ethernet@30000 */
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| 	bm,pool-long = <2>;
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| 	bm,pool-short = <1>;
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| 	buffer-manager = <&bm>;
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| 	phy-mode = "sgmii";
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| 	status = "okay";
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| };
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| 
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| ð2 {
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| 	/* ethernet@34000 */
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| 	bm,pool-long = <3>;
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| 	bm,pool-short = <1>;
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| 	buffer-manager = <&bm>;
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| 	managed = "in-band-status";
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| 	phy-mode = "sgmii";
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| 	sfp = <&sfp>;
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| 	status = "okay";
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| };
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| 
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| &i2c0 {
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| 	clock-frequency = <400000>;
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| 	pinctrl-0 = <&i2c0_pins>;
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| 	pinctrl-names = "default";
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| 	status = "okay";
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| 
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| 	/*
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| 	 * PCA9655 GPIO expander, up to 1MHz clock.
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| 	 *  0-CON3 CLKREQ#
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| 	 *  1-CON3 PERST#
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| 	 *  2-
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| 	 *  3-CON3 W_DISABLE
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| 	 *  4-
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| 	 *  5-USB3 overcurrent
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| 	 *  6-USB3 power
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| 	 *  7-
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| 	 *  8-JP4 P1
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| 	 *  9-JP4 P4
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| 	 * 10-JP4 P5
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| 	 * 11-m.2 DEVSLP
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| 	 * 12-SFP_LOS
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| 	 * 13-SFP_TX_FAULT
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| 	 * 14-SFP_TX_DISABLE
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| 	 * 15-SFP_MOD_DEF0
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| 	 */
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| 	expander0: gpio-expander@20 {
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| 		/*
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| 		 * This is how it should be:
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| 		 * compatible = "onnn,pca9655", "nxp,pca9555";
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| 		 * but you can't do this because of the way I2C works.
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| 		 */
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| 		compatible = "nxp,pca9555";
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| 		gpio-controller;
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| 		#gpio-cells = <2>;
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| 		reg = <0x20>;
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| 
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| 		pcie1_0_clkreq {
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| 			gpio-hog;
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| 			gpios = <0 GPIO_ACTIVE_LOW>;
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| 			input;
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| 			line-name = "pcie1.0-clkreq";
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| 		};
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| 		pcie1_0_w_disable {
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| 			gpio-hog;
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| 			gpios = <3 GPIO_ACTIVE_LOW>;
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| 			output-low;
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| 			line-name = "pcie1.0-w-disable";
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| 		};
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| 		usb3_ilimit {
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| 			gpio-hog;
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| 			gpios = <5 GPIO_ACTIVE_LOW>;
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| 			input;
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| 			line-name = "usb3-current-limit";
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| 		};
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| 		usb3_power {
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| 			gpio-hog;
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| 			gpios = <6 GPIO_ACTIVE_HIGH>;
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| 			output-high;
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| 			line-name = "usb3-power";
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| 		};
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| 		m2_devslp {
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| 			gpio-hog;
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| 			gpios = <11 GPIO_ACTIVE_HIGH>;
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| 			output-low;
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| 			line-name = "m.2 devslp";
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| 		};
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| 	};
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| 
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| 	/* The MCP3021 supports standard and fast modes */
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| 	mikrobus_adc: mcp3021@4c {
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| 		compatible = "microchip,mcp3021";
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| 		reg = <0x4c>;
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| 	};
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| };
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| 
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| &i2c1 {
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| 	/*
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| 	 * Routed to SFP, mikrobus, and PCIe.
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| 	 * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
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| 	 *  address pins tied low, which takes addresses 0x50 and 0x51.
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| 	 * Mikrobus doesn't specify beyond an I2C bus being present.
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| 	 * PCIe uses ARP to assign addresses, or 0x63-0x64.
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| 	 */
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| 	clock-frequency = <100000>;
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| 	pinctrl-0 = <&clearfog_i2c1_pins>;
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| 	pinctrl-names = "default";
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| 	status = "okay";
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| };
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| 
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| &pinctrl {
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| 	clearfog_i2c1_pins: i2c1-pins {
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| 		/* SFP, PCIe, mSATA, mikrobus */
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| 		marvell,pins = "mpp26", "mpp27";
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| 		marvell,function = "i2c1";
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| 	};
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| 	clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
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| 		marvell,pins = "mpp20";
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| 		marvell,function = "gpio";
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| 	};
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| 	mikro_pins: mikro-pins {
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| 		/* int: mpp22 rst: mpp29 */
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| 		marvell,pins = "mpp22", "mpp29";
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| 		marvell,function = "gpio";
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| 	};
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| 	mikro_spi_pins: mikro-spi-pins {
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| 		marvell,pins = "mpp43";
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| 		marvell,function = "spi1";
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| 	};
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| 	mikro_uart_pins: mikro-uart-pins {
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| 		marvell,pins = "mpp24", "mpp25";
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| 		marvell,function = "ua1";
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| 	};
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| };
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| 
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| &spi1 {
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| 	/*
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| 	 * Add SPI CS pins for clearfog:
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| 	 * CS0: W25Q32
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| 	 * CS1: PIC microcontroller (Pro models)
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| 	 * CS2: mikrobus
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| 	 */
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| 	pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
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| 	pinctrl-names = "default";
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| 	status = "okay";
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| };
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| 
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| &uart1 {
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| 	/* mikrobus uart */
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| 	pinctrl-0 = <&mikro_uart_pins>;
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| 	pinctrl-names = "default";
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| 	status = "okay";
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| };
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