30 lines
1.2 KiB
C
30 lines
1.2 KiB
C
#define CONFIG_MODEL_NVT_FPGA_S1
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/* NVT board configuration */
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#define CONFIG_MEM_SIZE 0x20000000
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#define CONFIG_SMEM_SDRAM_BASE 0x00002000
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#define CONFIG_MODELEXT_SDRAM_BASE CONFIG_SMEM_SDRAM_BASE
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#define CONFIG_MODELEXT_SDRAM_SIZE 0x1000
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#define CONFIG_NVTIPC_SDRAM_BASE 0x80000
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#define CONFIG_NVTIPC_SDRAM_SIZE 0x1000
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#define CONFIG_SMEM_SDRAM_SIZE (CONFIG_LINUX_SDRAM_BASE - CONFIG_MODELEXT_SDRAM_BASE)
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#define CONFIG_LINUX_SDRAM_BASE 0x00200000
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#define CONFIG_LINUX_SDRAM_START 0x01300000
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#define CONFIG_LINUX_SDRAM_SIZE (CONFIG_UBOOT_SDRAM_BASE - CONFIG_LINUX_SDRAM_BASE)
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#define CONFIG_UBOOT_SDRAM_BASE 0x01900000
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#define CONFIG_UBOOT_SDRAM_SIZE (CONFIG_ITRON_SDRAM_BASE - CONFIG_UBOOT_SDRAM_BASE)
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#define CONFIG_ITRON_SDRAM_BASE 0x02000000
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#define CONFIG_ITRON_SDRAM_SIZE (CONFIG_DSP1_SDRAM_BASE - CONFIG_ITRON_SDRAM_BASE)
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#define CONFIG_DSP1_SDRAM_BASE 0x1EB00000
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#define CONFIG_DSP1_SDRAM_SIZE (CONFIG_MEM_SIZE - CONFIG_DSP1_SDRAM_BASE)
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#define CONFIG_MODELEXT_SPINAND_BASE 0x40000
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/* FLASH FileSystem */
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#define CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0xF0400000
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#define CONFIG_FPGA_PLL_OSC 54000000
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#define CONFIG_SYS_HZ_CLOCK (CONFIG_FPGA_PLL_OSC / 8)
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