153 lines
4.1 KiB
C
153 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Eukréa Electromatique
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* Author: Eric Bénard <eric@eukrea.com>
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*
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* Configuration settings for the Embest RIoTboard
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*
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* based on mx6*sabre*.h which are :
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*/
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#ifndef __RIOTBOARD_CONFIG_H
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#define __RIOTBOARD_CONFIG_H
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#define CONSOLE_DEV "ttymxc1"
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#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
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#define CONFIG_IMX_THERMAL
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
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#define CONFIG_MXC_UART
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* USB Configs */
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 4
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#define CONFIG_PHY_ATHEROS
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#define CONFIG_ARP_TIMEOUT 200UL
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x10010000
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* Environment organization */
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#define CONFIG_ENV_SIZE (8 * 1024)
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#if defined(CONFIG_ENV_IS_IN_MMC)
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/* RiOTboard */
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#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
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#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
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#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
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/* MarSBoard */
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#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_ENV_OFFSET (768 * 1024)
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#define CONFIG_ENV_SECT_SIZE (8 * 1024)
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#endif
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/* Framebuffer */
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_BMP_LOGO
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#define CONFIG_IMX_HDMI
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#define CONFIG_IMX_VIDEO_SKIP
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#include "mx6_common.h"
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#ifdef CONFIG_SPL
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#include "imx6_spl.h"
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/* RiOTboard */
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
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#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
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#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb"
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
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#endif
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/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
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* 1M script, 1M pxe and the ramdisk at the end */
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#define MEM_LAYOUT_ENV_SETTINGS \
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"bootm_size=0x10000000\0" \
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"kernel_addr_r=0x12000000\0" \
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"fdt_addr_r=0x13000000\0" \
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"scriptaddr=0x13100000\0" \
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"pxefile_addr_r=0x13200000\0" \
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"ramdisk_addr_r=0x13300000\0"
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(USB, usb, 0) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define CONSOLE_STDIN_SETTINGS \
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"stdin=serial\0"
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#define CONSOLE_STDOUT_SETTINGS \
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"stdout=serial\0" \
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"stderr=serial\0"
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#define CONSOLE_ENV_SETTINGS \
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CONSOLE_STDIN_SETTINGS \
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CONSOLE_STDOUT_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONSOLE_ENV_SETTINGS \
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MEM_LAYOUT_ENV_SETTINGS \
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"fdtfile=" CONFIG_FDTFILE "\0" \
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"finduuid=part uuid mmc 0:1 uuid\0" \
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BOOTENV
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#endif /* __RIOTBOARD_CONFIG_H */
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