587 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			587 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
# SPDX-License-Identifier: GPL-2.0
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config ZONE_DMA
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	def_bool y
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config XTENSA
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	def_bool y
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	select ARCH_HAS_SG_CHAIN
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	select ARCH_HAS_SYNC_DMA_FOR_CPU
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	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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	select ARCH_NO_COHERENT_DMA_MMAP if !MMU
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	select ARCH_WANT_FRAME_POINTERS
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	select ARCH_WANT_IPC_PARSE_VERSION
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	select BUILDTIME_EXTABLE_SORT
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	select CLONE_BACKWARDS
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	select COMMON_CLK
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	select DMA_NONCOHERENT_OPS
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	select GENERIC_ATOMIC64
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	select GENERIC_CLOCKEVENTS
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	select GENERIC_IRQ_SHOW
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	select GENERIC_PCI_IOMAP
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	select GENERIC_SCHED_CLOCK
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	select GENERIC_STRNCPY_FROM_USER if KASAN
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	select HAVE_ARCH_KASAN if MMU
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	select HAVE_DEBUG_KMEMLEAK
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	select HAVE_DMA_CONTIGUOUS
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	select HAVE_EXIT_THREAD
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	select HAVE_FUNCTION_TRACER
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	select HAVE_FUTEX_CMPXCHG if !MMU
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	select HAVE_HW_BREAKPOINT if PERF_EVENTS
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	select HAVE_IRQ_TIME_ACCOUNTING
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	select HAVE_MEMBLOCK
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	select HAVE_OPROFILE
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	select HAVE_PERF_EVENTS
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	select HAVE_STACKPROTECTOR
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	select IRQ_DOMAIN
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	select MODULES_USE_ELF_RELA
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	select NO_BOOTMEM
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	select PERF_USE_VMALLOC
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	select VIRT_TO_BUS
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	help
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	  Xtensa processors are 32-bit RISC machines designed by Tensilica
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	  primarily for embedded systems.  These processors are both
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	  configurable and extensible.  The Linux port to the Xtensa
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	  architecture supports all processor configurations and extensions,
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	  with reasonable minimum requirements.  The Xtensa Linux project has
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	  a home page at <http://www.linux-xtensa.org/>.
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config RWSEM_XCHGADD_ALGORITHM
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	def_bool y
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config GENERIC_HWEIGHT
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	def_bool y
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config ARCH_HAS_ILOG2_U32
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	def_bool n
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config ARCH_HAS_ILOG2_U64
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	def_bool n
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config NO_IOPORT_MAP
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	def_bool n
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config HZ
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	int
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	default 100
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config LOCKDEP_SUPPORT
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	def_bool y
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config STACKTRACE_SUPPORT
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	def_bool y
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config TRACE_IRQFLAGS_SUPPORT
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	def_bool y
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config MMU
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	def_bool n
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config HAVE_XTENSA_GPIO32
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	def_bool n
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config KASAN_SHADOW_OFFSET
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	hex
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	default 0x6e400000
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menu "Processor type and features"
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choice
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	prompt "Xtensa Processor Configuration"
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	default XTENSA_VARIANT_FSF
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config XTENSA_VARIANT_FSF
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	bool "fsf - default (not generic) configuration"
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	select MMU
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config XTENSA_VARIANT_DC232B
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	bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
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	select MMU
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	select HAVE_XTENSA_GPIO32
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	help
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	  This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
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config XTENSA_VARIANT_DC233C
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	bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
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	select MMU
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	select HAVE_XTENSA_GPIO32
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	help
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	  This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
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config XTENSA_VARIANT_CUSTOM
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	bool "Custom Xtensa processor configuration"
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	select HAVE_XTENSA_GPIO32
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	help
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	  Select this variant to use a custom Xtensa processor configuration.
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	  You will be prompted for a processor variant CORENAME.
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endchoice
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config XTENSA_VARIANT_CUSTOM_NAME
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	string "Xtensa Processor Custom Core Variant Name"
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	depends on XTENSA_VARIANT_CUSTOM
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	help
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	  Provide the name of a custom Xtensa processor variant.
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	  This CORENAME selects arch/xtensa/variant/CORENAME.
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	  Dont forget you have to select MMU if you have one.
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config XTENSA_VARIANT_NAME
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	string
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	default "dc232b"			if XTENSA_VARIANT_DC232B
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	default "dc233c"			if XTENSA_VARIANT_DC233C
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	default "fsf"				if XTENSA_VARIANT_FSF
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	default XTENSA_VARIANT_CUSTOM_NAME	if XTENSA_VARIANT_CUSTOM
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config XTENSA_VARIANT_MMU
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	bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
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	depends on XTENSA_VARIANT_CUSTOM
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	default y
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	select MMU
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	help
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	  Build a Conventional Kernel with full MMU support,
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	  ie: it supports a TLB with auto-loading, page protection.
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config XTENSA_VARIANT_HAVE_PERF_EVENTS
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	bool "Core variant has Performance Monitor Module"
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	depends on XTENSA_VARIANT_CUSTOM
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	default n
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	help
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	  Enable if core variant has Performance Monitor Module with
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	  External Registers Interface.
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	  If unsure, say N.
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config XTENSA_FAKE_NMI
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	bool "Treat PMM IRQ as NMI"
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	depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
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	default n
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	help
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	  If PMM IRQ is the only IRQ at EXCM level it is safe to
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	  treat it as NMI, which improves accuracy of profiling.
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	  If there are other interrupts at or above PMM IRQ priority level
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	  but not above the EXCM level, PMM IRQ still may be treated as NMI,
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	  but only if these IRQs are not used. There will be a build warning
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	  saying that this is not safe, and a bugcheck if one of these IRQs
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	  actually fire.
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	  If unsure, say N.
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config XTENSA_UNALIGNED_USER
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	bool "Unaligned memory access in use space"
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	help
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	  The Xtensa architecture currently does not handle unaligned
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	  memory accesses in hardware but through an exception handler.
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	  Per default, unaligned memory accesses are disabled in user space.
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	  Say Y here to enable unaligned memory access in user space.
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config HAVE_SMP
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	bool "System Supports SMP (MX)"
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	depends on XTENSA_VARIANT_CUSTOM
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	select XTENSA_MX
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	help
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	  This option is use to indicate that the system-on-a-chip (SOC)
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	  supports Multiprocessing. Multiprocessor support implemented above
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	  the CPU core definition and currently needs to be selected manually.
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	  Multiprocessor support in implemented with external cache and
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	  interrupt controllers.
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	  The MX interrupt distributer adds Interprocessor Interrupts
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	  and causes the IRQ numbers to be increased by 4 for devices
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	  like the open cores ethernet driver and the serial interface.
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	  You still have to select "Enable SMP" to enable SMP on this SOC.
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config SMP
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	bool "Enable Symmetric multi-processing support"
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	depends on HAVE_SMP
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	select GENERIC_SMP_IDLE_THREAD
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	help
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	  Enabled SMP Software; allows more than one CPU/CORE
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	  to be activated during startup.
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config NR_CPUS
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	depends on SMP
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	int "Maximum number of CPUs (2-32)"
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	range 2 32
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	default "4"
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config HOTPLUG_CPU
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	bool "Enable CPU hotplug support"
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	depends on SMP
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	help
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	  Say Y here to allow turning CPUs off and on. CPUs can be
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	  controlled through /sys/devices/system/cpu.
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	  Say N if you want to disable CPU hotplug.
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config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
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	bool "Initialize Xtensa MMU inside the Linux kernel code"
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	depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
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	default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
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	help
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	  Earlier version initialized the MMU in the exception vector
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	  before jumping to _startup in head.S and had an advantage that
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	  it was possible to place a software breakpoint at 'reset' and
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	  then enter your normal kernel breakpoints once the MMU was mapped
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	  to the kernel mappings (0XC0000000).
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	  This unfortunately won't work for U-Boot and likely also wont
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	  work for using KEXEC to have a hot kernel ready for doing a
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	  KDUMP.
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	  So now the MMU is initialized in head.S but it's necessary to
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	  use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
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	  xt-gdb can't place a Software Breakpoint in the  0XD region prior
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	  to mapping the MMU and after mapping even if the area of low memory
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	  was mapped gdb wouldn't remove the breakpoint on hitting it as the
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	  PC wouldn't match. Since Hardware Breakpoints are recommended for
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	  Linux configurations it seems reasonable to just assume they exist
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	  and leave this older mechanism for unfortunate souls that choose
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	  not to follow Tensilica's recommendation.
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	  Selecting this will cause U-Boot to set the KERNEL Load and Entry
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	  address at 0x00003000 instead of the mapped std of 0xD0003000.
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	  If in doubt, say Y.
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config MEMMAP_CACHEATTR
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	hex "Cache attributes for the memory address space"
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	depends on !MMU
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	default 0x22222222
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	help
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	  These cache attributes are set up for noMMU systems. Each hex digit
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	  specifies cache attributes for the corresponding 512MB memory
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	  region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
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	  bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
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	  Cache attribute values are specific for the MMU type, so e.g.
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	  for region protection MMUs: 2 is cache bypass, 4 is WB cached,
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	  1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable,
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	  bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass,
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	  1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is
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	  reserved).
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config KSEG_PADDR
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	hex "Physical address of the KSEG mapping"
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	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
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	default 0x00000000
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	help
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	  This is the physical address where KSEG is mapped. Please refer to
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	  the chosen KSEG layout help for the required address alignment.
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	  Unpacked kernel image (including vectors) must be located completely
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	  within KSEG.
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	  Physical memory below this address is not available to linux.
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	  If unsure, leave the default value here.
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config KERNEL_LOAD_ADDRESS
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	hex "Kernel load address"
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	default 0x60003000 if !MMU
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	default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
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	default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
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	help
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	  This is the address where the kernel is loaded.
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	  It is virtual address for MMUv2 configurations and physical address
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	  for all other configurations.
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	  If unsure, leave the default value here.
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config VECTORS_OFFSET
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	hex "Kernel vectors offset"
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	default 0x00003000
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	help
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	  This is the offset of the kernel image from the relocatable vectors
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	  base.
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	  If unsure, leave the default value here.
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choice
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	prompt "KSEG layout"
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	depends on MMU
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	default XTENSA_KSEG_MMU_V2
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config XTENSA_KSEG_MMU_V2
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	bool "MMUv2: 128MB cached + 128MB uncached"
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	help
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	  MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
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	  at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
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	  without cache.
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	  KSEG_PADDR must be aligned to 128MB.
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config XTENSA_KSEG_256M
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	bool "256MB cached + 256MB uncached"
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	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
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	help
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	  TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
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	  with cache and to 0xc0000000 without cache.
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	  KSEG_PADDR must be aligned to 256MB.
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config XTENSA_KSEG_512M
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	bool "512MB cached + 512MB uncached"
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	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
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	help
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	  TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
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	  with cache and to 0xc0000000 without cache.
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	  KSEG_PADDR must be aligned to 256MB.
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endchoice
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config HIGHMEM
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	bool "High Memory Support"
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	depends on MMU
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	help
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	  Linux can use the full amount of RAM in the system by
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	  default. However, the default MMUv2 setup only maps the
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	  lowermost 128 MB of memory linearly to the areas starting
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	  at 0xd0000000 (cached) and 0xd8000000 (uncached).
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	  When there are more than 128 MB memory in the system not
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	  all of it can be "permanently mapped" by the kernel.
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	  The physical memory that's not permanently mapped is called
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	  "high memory".
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	  If you are compiling a kernel which will never run on a
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	  machine with more than 128 MB total physical RAM, answer
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	  N here.
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	  If unsure, say Y.
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config FAST_SYSCALL_XTENSA
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	bool "Enable fast atomic syscalls"
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	default n
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	help
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	  fast_syscall_xtensa is a syscall that can make atomic operations
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	  on UP kernel when processor has no s32c1i support.
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	  This syscall is deprecated. It may have issues when called with
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	  invalid arguments. It is provided only for backwards compatibility.
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	  Only enable it if your userspace software requires it.
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	  If unsure, say N.
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config FAST_SYSCALL_SPILL_REGISTERS
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	bool "Enable spill registers syscall"
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	default n
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	help
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	  fast_syscall_spill_registers is a syscall that spills all active
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	  register windows of a calling userspace task onto its stack.
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	  This syscall is deprecated. It may have issues when called with
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	  invalid arguments. It is provided only for backwards compatibility.
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	  Only enable it if your userspace software requires it.
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	  If unsure, say N.
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endmenu
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config XTENSA_CALIBRATE_CCOUNT
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	def_bool n
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	help
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	  On some platforms (XT2000, for example), the CPU clock rate can
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	  vary.  The frequency can be determined, however, by measuring
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	  against a well known, fixed frequency, such as an UART oscillator.
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config SERIAL_CONSOLE
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	def_bool n
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menu "Bus options"
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config PCI
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	bool "PCI support"
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	default y
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	help
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	  Find out whether you have a PCI motherboard. PCI is the name of a
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	  bus system, i.e. the way the CPU talks to the other stuff inside
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	  your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
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	  VESA. If you have PCI, say Y, otherwise N.
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source "drivers/pci/Kconfig"
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endmenu
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menu "Platform options"
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choice
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	prompt "Xtensa System Type"
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	default XTENSA_PLATFORM_ISS
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config XTENSA_PLATFORM_ISS
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	bool "ISS"
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	select XTENSA_CALIBRATE_CCOUNT
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	select SERIAL_CONSOLE
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	help
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	  ISS is an acronym for Tensilica's Instruction Set Simulator.
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config XTENSA_PLATFORM_XT2000
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	bool "XT2000"
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	select HAVE_IDE
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	help
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	  XT2000 is the name of Tensilica's feature-rich emulation platform.
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	  This hardware is capable of running a full Linux distribution.
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config XTENSA_PLATFORM_XTFPGA
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	bool "XTFPGA"
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	select ETHOC if ETHERNET
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	select PLATFORM_WANT_DEFAULT_MEM if !MMU
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	select SERIAL_CONSOLE
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	select XTENSA_CALIBRATE_CCOUNT
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	help
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	  XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
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	  This hardware is capable of running a full Linux distribution.
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endchoice
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config PLATFORM_NR_IRQS
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	int
 | 
						|
	default 3 if XTENSA_PLATFORM_XT2000
 | 
						|
	default 0
 | 
						|
 | 
						|
config XTENSA_CPU_CLOCK
 | 
						|
	int "CPU clock rate [MHz]"
 | 
						|
	depends on !XTENSA_CALIBRATE_CCOUNT
 | 
						|
	default 16
 | 
						|
 | 
						|
config GENERIC_CALIBRATE_DELAY
 | 
						|
	bool "Auto calibration of the BogoMIPS value"
 | 
						|
	help
 | 
						|
	  The BogoMIPS value can easily be derived from the CPU frequency.
 | 
						|
 | 
						|
config CMDLINE_BOOL
 | 
						|
	bool "Default bootloader kernel arguments"
 | 
						|
 | 
						|
config CMDLINE
 | 
						|
	string "Initial kernel command string"
 | 
						|
	depends on CMDLINE_BOOL
 | 
						|
	default "console=ttyS0,38400 root=/dev/ram"
 | 
						|
	help
 | 
						|
	  On some architectures (EBSA110 and CATS), there is currently no way
 | 
						|
	  for the boot loader to pass arguments to the kernel. For these
 | 
						|
	  architectures, you should supply some command-line options at build
 | 
						|
	  time by entering them here. As a minimum, you should specify the
 | 
						|
	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
 | 
						|
 | 
						|
config USE_OF
 | 
						|
	bool "Flattened Device Tree support"
 | 
						|
	select OF
 | 
						|
	select OF_EARLY_FLATTREE
 | 
						|
	select OF_RESERVED_MEM
 | 
						|
	help
 | 
						|
	  Include support for flattened device tree machine descriptions.
 | 
						|
 | 
						|
config BUILTIN_DTB
 | 
						|
	string "DTB to build into the kernel image"
 | 
						|
	depends on OF
 | 
						|
 | 
						|
config PARSE_BOOTPARAM
 | 
						|
	bool "Parse bootparam block"
 | 
						|
	default y
 | 
						|
	help
 | 
						|
	  Parse parameters passed to the kernel from the bootloader. It may
 | 
						|
	  be disabled if the kernel is known to run without the bootloader.
 | 
						|
 | 
						|
	  If unsure, say Y.
 | 
						|
 | 
						|
config BLK_DEV_SIMDISK
 | 
						|
	tristate "Host file-based simulated block device support"
 | 
						|
	default n
 | 
						|
	depends on XTENSA_PLATFORM_ISS && BLOCK
 | 
						|
	help
 | 
						|
	  Create block devices that map to files in the host file system.
 | 
						|
	  Device binding to host file may be changed at runtime via proc
 | 
						|
	  interface provided the device is not in use.
 | 
						|
 | 
						|
config BLK_DEV_SIMDISK_COUNT
 | 
						|
	int "Number of host file-based simulated block devices"
 | 
						|
	range 1 10
 | 
						|
	depends on BLK_DEV_SIMDISK
 | 
						|
	default 2
 | 
						|
	help
 | 
						|
	  This is the default minimal number of created block devices.
 | 
						|
	  Kernel/module parameter 'simdisk_count' may be used to change this
 | 
						|
	  value at runtime. More file names (but no more than 10) may be
 | 
						|
	  specified as parameters, simdisk_count grows accordingly.
 | 
						|
 | 
						|
config SIMDISK0_FILENAME
 | 
						|
	string "Host filename for the first simulated device"
 | 
						|
	depends on BLK_DEV_SIMDISK = y
 | 
						|
	default ""
 | 
						|
	help
 | 
						|
	  Attach a first simdisk to a host file. Conventionally, this file
 | 
						|
	  contains a root file system.
 | 
						|
 | 
						|
config SIMDISK1_FILENAME
 | 
						|
	string "Host filename for the second simulated device"
 | 
						|
	depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
 | 
						|
	default ""
 | 
						|
	help
 | 
						|
	  Another simulated disk in a host file for a buildroot-independent
 | 
						|
	  storage.
 | 
						|
 | 
						|
config FORCE_MAX_ZONEORDER
 | 
						|
	int "Maximum zone order"
 | 
						|
	default "11"
 | 
						|
	help
 | 
						|
	  The kernel memory allocator divides physically contiguous memory
 | 
						|
	  blocks into "zones", where each zone is a power of two number of
 | 
						|
	  pages.  This option selects the largest power of two that the kernel
 | 
						|
	  keeps in the memory allocator.  If you need to allocate very large
 | 
						|
	  blocks of physically contiguous memory, then you may need to
 | 
						|
	  increase this value.
 | 
						|
 | 
						|
	  This config option is actually maximum order plus one. For example,
 | 
						|
	  a value of 11 means that the largest free memory block is 2^10 pages.
 | 
						|
 | 
						|
source "drivers/pcmcia/Kconfig"
 | 
						|
 | 
						|
config PLATFORM_WANT_DEFAULT_MEM
 | 
						|
	def_bool n
 | 
						|
 | 
						|
config DEFAULT_MEM_START
 | 
						|
	hex
 | 
						|
	prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
 | 
						|
	default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
 | 
						|
	default 0x00000000
 | 
						|
	help
 | 
						|
	  This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
 | 
						|
	  in noMMU configurations.
 | 
						|
 | 
						|
	  If unsure, leave the default value here.
 | 
						|
 | 
						|
config XTFPGA_LCD
 | 
						|
	bool "Enable XTFPGA LCD driver"
 | 
						|
	depends on XTENSA_PLATFORM_XTFPGA
 | 
						|
	default n
 | 
						|
	help
 | 
						|
	  There's a 2x16 LCD on most of XTFPGA boards, kernel may output
 | 
						|
	  progress messages there during bootup/shutdown. It may be useful
 | 
						|
	  during board bringup.
 | 
						|
 | 
						|
	  If unsure, say N.
 | 
						|
 | 
						|
config XTFPGA_LCD_BASE_ADDR
 | 
						|
	hex "XTFPGA LCD base address"
 | 
						|
	depends on XTFPGA_LCD
 | 
						|
	default "0x0d0c0000"
 | 
						|
	help
 | 
						|
	  Base address of the LCD controller inside KIO region.
 | 
						|
	  Different boards from XTFPGA family have LCD controller at different
 | 
						|
	  addresses. Please consult prototyping user guide for your board for
 | 
						|
	  the correct address. Wrong address here may lead to hardware lockup.
 | 
						|
 | 
						|
config XTFPGA_LCD_8BIT_ACCESS
 | 
						|
	bool "Use 8-bit access to XTFPGA LCD"
 | 
						|
	depends on XTFPGA_LCD
 | 
						|
	default n
 | 
						|
	help
 | 
						|
	  LCD may be connected with 4- or 8-bit interface, 8-bit access may
 | 
						|
	  only be used with 8-bit interface. Please consult prototyping user
 | 
						|
	  guide for your board for the correct interface width.
 | 
						|
 | 
						|
endmenu
 | 
						|
 | 
						|
menu "Power management options"
 | 
						|
 | 
						|
source "kernel/power/Kconfig"
 | 
						|
 | 
						|
endmenu
 |