347 lines
		
	
	
		
			8.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			347 lines
		
	
	
		
			8.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *      Intel Atom E6xx Watchdog driver
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|  *
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|  *      Copyright (C) 2011 Alexander Stein
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|  *                <alexander.stein@systec-electronic.com>
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|  *
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|  *      This program is free software; you can redistribute it and/or
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|  *      modify it under the terms of version 2 of the GNU General
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|  *      Public License as published by the Free Software Foundation.
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|  *
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|  *      This program is distributed in the hope that it will be
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|  *      useful, but WITHOUT ANY WARRANTY; without even the implied
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|  *      warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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|  *      PURPOSE.  See the GNU General Public License for more details.
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|  *      You should have received a copy of the GNU General Public
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|  *      License along with this program; if not, write to the Free
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|  *      Software Foundation, Inc., 59 Temple Place - Suite 330,
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|  *      Boston, MA  02111-1307, USA.
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|  *      The full GNU General Public License is included in this
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|  *      distribution in the file called COPYING.
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|  *
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|  */
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| 
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| #include <linux/module.h>
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| #include <linux/moduleparam.h>
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| #include <linux/platform_device.h>
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| #include <linux/io.h>
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| #include <linux/kernel.h>
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| #include <linux/types.h>
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| #include <linux/watchdog.h>
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| #include <linux/seq_file.h>
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| #include <linux/debugfs.h>
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| #include <linux/uaccess.h>
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| #include <linux/spinlock.h>
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| 
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| #define DRIVER_NAME "ie6xx_wdt"
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| 
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| #define PV1	0x00
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| #define PV2	0x04
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| 
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| #define RR0	0x0c
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| #define RR1	0x0d
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| #define WDT_RELOAD	0x01
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| #define WDT_TOUT	0x02
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| 
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| #define WDTCR	0x10
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| #define WDT_PRE_SEL	0x04
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| #define WDT_RESET_SEL	0x08
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| #define WDT_RESET_EN	0x10
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| #define WDT_TOUT_EN	0x20
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| 
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| #define DCR	0x14
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| 
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| #define WDTLR	0x18
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| #define WDT_LOCK	0x01
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| #define WDT_ENABLE	0x02
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| #define WDT_TOUT_CNF	0x03
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| 
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| #define MIN_TIME	1
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| #define MAX_TIME	(10 * 60) /* 10 minutes */
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| #define DEFAULT_TIME	60
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| 
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| static unsigned int timeout = DEFAULT_TIME;
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| module_param(timeout, uint, 0);
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| MODULE_PARM_DESC(timeout,
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| 		"Default Watchdog timer setting ("
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| 		__MODULE_STRING(DEFAULT_TIME) "s)."
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| 		"The range is from 1 to 600");
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| 
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| static bool nowayout = WATCHDOG_NOWAYOUT;
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| module_param(nowayout, bool, 0);
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| MODULE_PARM_DESC(nowayout,
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| 	"Watchdog cannot be stopped once started (default="
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| 		__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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| 
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| static u8 resetmode = 0x10;
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| module_param(resetmode, byte, 0);
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| MODULE_PARM_DESC(resetmode,
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| 	"Resetmode bits: 0x08 warm reset (cold reset otherwise), "
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| 	"0x10 reset enable, 0x20 disable toggle GPIO[4] (default=0x10)");
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| 
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| static struct {
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| 	unsigned short sch_wdtba;
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| 	struct spinlock unlock_sequence;
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| #ifdef CONFIG_DEBUG_FS
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| 	struct dentry *debugfs;
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| #endif
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| } ie6xx_wdt_data;
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| 
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| /*
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|  * This is needed to write to preload and reload registers
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|  * struct ie6xx_wdt_data.unlock_sequence must be used
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|  * to prevent sequence interrupts
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|  */
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| static void ie6xx_wdt_unlock_registers(void)
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| {
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| 	outb(0x80, ie6xx_wdt_data.sch_wdtba + RR0);
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| 	outb(0x86, ie6xx_wdt_data.sch_wdtba + RR0);
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| }
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| 
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| static int ie6xx_wdt_ping(struct watchdog_device *wdd)
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| {
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| 	spin_lock(&ie6xx_wdt_data.unlock_sequence);
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| 	ie6xx_wdt_unlock_registers();
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| 	outb(WDT_RELOAD, ie6xx_wdt_data.sch_wdtba + RR1);
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| 	spin_unlock(&ie6xx_wdt_data.unlock_sequence);
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| 	return 0;
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| }
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| 
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| static int ie6xx_wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
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| {
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| 	u32 preload;
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| 	u64 clock;
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| 	u8 wdtcr;
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| 
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| 	/* Watchdog clock is PCI Clock (33MHz) */
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| 	clock = 33000000;
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| 	/* and the preload value is loaded into [34:15] of the down counter */
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| 	preload = (t * clock) >> 15;
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| 	/*
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| 	 * Manual states preload must be one less.
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| 	 * Does not wrap as t is at least 1
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| 	 */
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| 	preload -= 1;
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| 
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| 	spin_lock(&ie6xx_wdt_data.unlock_sequence);
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| 
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| 	/* Set ResetMode & Enable prescaler for range 10ms to 10 min */
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| 	wdtcr = resetmode & 0x38;
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| 	outb(wdtcr, ie6xx_wdt_data.sch_wdtba + WDTCR);
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| 
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| 	ie6xx_wdt_unlock_registers();
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| 	outl(0, ie6xx_wdt_data.sch_wdtba + PV1);
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| 
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| 	ie6xx_wdt_unlock_registers();
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| 	outl(preload, ie6xx_wdt_data.sch_wdtba + PV2);
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| 
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| 	ie6xx_wdt_unlock_registers();
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| 	outb(WDT_RELOAD | WDT_TOUT, ie6xx_wdt_data.sch_wdtba + RR1);
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| 
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| 	spin_unlock(&ie6xx_wdt_data.unlock_sequence);
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| 
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| 	wdd->timeout = t;
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| 	return 0;
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| }
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| 
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| static int ie6xx_wdt_start(struct watchdog_device *wdd)
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| {
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| 	ie6xx_wdt_set_timeout(wdd, wdd->timeout);
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| 
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| 	/* Enable the watchdog timer */
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| 	spin_lock(&ie6xx_wdt_data.unlock_sequence);
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| 	outb(WDT_ENABLE, ie6xx_wdt_data.sch_wdtba + WDTLR);
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| 	spin_unlock(&ie6xx_wdt_data.unlock_sequence);
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| 
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| 	return 0;
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| }
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| 
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| static int ie6xx_wdt_stop(struct watchdog_device *wdd)
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| {
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| 	if (inb(ie6xx_wdt_data.sch_wdtba + WDTLR) & WDT_LOCK)
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| 		return -1;
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| 
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| 	/* Disable the watchdog timer */
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| 	spin_lock(&ie6xx_wdt_data.unlock_sequence);
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| 	outb(0, ie6xx_wdt_data.sch_wdtba + WDTLR);
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| 	spin_unlock(&ie6xx_wdt_data.unlock_sequence);
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| 
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| 	return 0;
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| }
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| 
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| static const struct watchdog_info ie6xx_wdt_info = {
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| 	.identity =	"Intel Atom E6xx Watchdog",
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| 	.options =	WDIOF_SETTIMEOUT |
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| 			WDIOF_MAGICCLOSE |
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| 			WDIOF_KEEPALIVEPING,
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| };
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| 
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| static const struct watchdog_ops ie6xx_wdt_ops = {
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| 	.owner =	THIS_MODULE,
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| 	.start =	ie6xx_wdt_start,
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| 	.stop =		ie6xx_wdt_stop,
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| 	.ping =		ie6xx_wdt_ping,
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| 	.set_timeout =	ie6xx_wdt_set_timeout,
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| };
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| 
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| static struct watchdog_device ie6xx_wdt_dev = {
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| 	.info =		&ie6xx_wdt_info,
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| 	.ops =		&ie6xx_wdt_ops,
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| 	.min_timeout =	MIN_TIME,
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| 	.max_timeout =	MAX_TIME,
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| };
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| 
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| #ifdef CONFIG_DEBUG_FS
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| 
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| static int ie6xx_wdt_dbg_show(struct seq_file *s, void *unused)
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| {
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| 	seq_printf(s, "PV1   = 0x%08x\n",
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| 		inl(ie6xx_wdt_data.sch_wdtba + PV1));
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| 	seq_printf(s, "PV2   = 0x%08x\n",
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| 		inl(ie6xx_wdt_data.sch_wdtba + PV2));
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| 	seq_printf(s, "RR    = 0x%08x\n",
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| 		inw(ie6xx_wdt_data.sch_wdtba + RR0));
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| 	seq_printf(s, "WDTCR = 0x%08x\n",
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| 		inw(ie6xx_wdt_data.sch_wdtba + WDTCR));
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| 	seq_printf(s, "DCR   = 0x%08x\n",
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| 		inl(ie6xx_wdt_data.sch_wdtba + DCR));
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| 	seq_printf(s, "WDTLR = 0x%08x\n",
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| 		inw(ie6xx_wdt_data.sch_wdtba + WDTLR));
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| 
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| 	seq_printf(s, "\n");
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| 	return 0;
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| }
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| 
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| static int ie6xx_wdt_dbg_open(struct inode *inode, struct file *file)
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| {
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| 	return single_open(file, ie6xx_wdt_dbg_show, NULL);
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| }
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| 
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| static const struct file_operations ie6xx_wdt_dbg_operations = {
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| 	.open		= ie6xx_wdt_dbg_open,
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| 	.read		= seq_read,
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| 	.llseek		= seq_lseek,
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| 	.release	= single_release,
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| };
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| 
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| static void ie6xx_wdt_debugfs_init(void)
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| {
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| 	/* /sys/kernel/debug/ie6xx_wdt */
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| 	ie6xx_wdt_data.debugfs = debugfs_create_file("ie6xx_wdt",
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| 		S_IFREG | S_IRUGO, NULL, NULL, &ie6xx_wdt_dbg_operations);
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| }
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| 
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| static void ie6xx_wdt_debugfs_exit(void)
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| {
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| 	debugfs_remove(ie6xx_wdt_data.debugfs);
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| }
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| 
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| #else
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| static void ie6xx_wdt_debugfs_init(void)
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| {
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| }
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| 
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| static void ie6xx_wdt_debugfs_exit(void)
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| {
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| }
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| #endif
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| 
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| static int ie6xx_wdt_probe(struct platform_device *pdev)
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| {
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| 	struct resource *res;
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| 	u8 wdtlr;
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| 	int ret;
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| 
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| 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
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| 	if (!res)
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| 		return -ENODEV;
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| 
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| 	if (!request_region(res->start, resource_size(res), pdev->name)) {
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| 		dev_err(&pdev->dev, "Watchdog region 0x%llx already in use!\n",
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| 			(u64)res->start);
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| 		return -EBUSY;
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| 	}
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| 
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| 	ie6xx_wdt_data.sch_wdtba = res->start;
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| 	dev_dbg(&pdev->dev, "WDT = 0x%X\n", ie6xx_wdt_data.sch_wdtba);
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| 
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| 	ie6xx_wdt_dev.timeout = timeout;
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| 	watchdog_set_nowayout(&ie6xx_wdt_dev, nowayout);
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| 	ie6xx_wdt_dev.parent = &pdev->dev;
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| 
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| 	spin_lock_init(&ie6xx_wdt_data.unlock_sequence);
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| 
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| 	wdtlr = inb(ie6xx_wdt_data.sch_wdtba + WDTLR);
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| 	if (wdtlr & WDT_LOCK)
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| 		dev_warn(&pdev->dev,
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| 			"Watchdog Timer is Locked (Reg=0x%x)\n", wdtlr);
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| 
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| 	ie6xx_wdt_debugfs_init();
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| 
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| 	ret = watchdog_register_device(&ie6xx_wdt_dev);
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| 	if (ret) {
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| 		dev_err(&pdev->dev,
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| 			"Watchdog timer: cannot register device (err =%d)\n",
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| 									ret);
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| 		goto misc_register_error;
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| 	}
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| 
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| 	return 0;
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| 
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| misc_register_error:
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| 	ie6xx_wdt_debugfs_exit();
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| 	release_region(res->start, resource_size(res));
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| 	ie6xx_wdt_data.sch_wdtba = 0;
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| 	return ret;
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| }
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| 
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| static int ie6xx_wdt_remove(struct platform_device *pdev)
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| {
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| 	struct resource *res;
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| 
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| 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
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| 	ie6xx_wdt_stop(NULL);
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| 	watchdog_unregister_device(&ie6xx_wdt_dev);
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| 	ie6xx_wdt_debugfs_exit();
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| 	release_region(res->start, resource_size(res));
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| 	ie6xx_wdt_data.sch_wdtba = 0;
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| 
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| 	return 0;
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| }
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| 
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| static struct platform_driver ie6xx_wdt_driver = {
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| 	.probe		= ie6xx_wdt_probe,
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| 	.remove		= ie6xx_wdt_remove,
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| 	.driver		= {
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| 		.name	= DRIVER_NAME,
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| 	},
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| };
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| 
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| static int __init ie6xx_wdt_init(void)
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| {
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| 	/* Check boot parameters to verify that their initial values */
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| 	/* are in range. */
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| 	if ((timeout < MIN_TIME) ||
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| 	    (timeout > MAX_TIME)) {
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| 		pr_err("Watchdog timer: value of timeout %d (dec) "
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| 		  "is out of range from %d to %d (dec)\n",
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| 		  timeout, MIN_TIME, MAX_TIME);
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| 		return -EINVAL;
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| 	}
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| 
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| 	return platform_driver_register(&ie6xx_wdt_driver);
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| }
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| 
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| static void __exit ie6xx_wdt_exit(void)
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| {
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| 	platform_driver_unregister(&ie6xx_wdt_driver);
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| }
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| 
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| late_initcall(ie6xx_wdt_init);
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| module_exit(ie6xx_wdt_exit);
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| 
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| MODULE_AUTHOR("Alexander Stein <alexander.stein@systec-electronic.com>");
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| MODULE_DESCRIPTION("Intel Atom E6xx Watchdog Device Driver");
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| MODULE_LICENSE("GPL");
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| MODULE_ALIAS("platform:" DRIVER_NAME);
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