45 lines
1.9 KiB
C
Executable File
45 lines
1.9 KiB
C
Executable File
#define CONFIG_MODEL_NVT_FPGA_S3
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/* NVT board configuration */
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#define CONFIG_MEM_SIZE _BOARD_DRAM_SIZE_
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/* 6MB for kernel image */
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#define CONFIG_NVT_UIMAGE_SIZE (SZ_1M * 6)
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/* We have two DSP cores can be used here. The DSP address definition only needs to be defined in first DSP base address */
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#if _BOARD_DSP1_ADDR_ > _BOARD_DSP2_ADDR_
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#define CONFIG_DSP_SDRAM_BASE _BOARD_DSP2_ADDR_
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#else
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#define CONFIG_DSP_SDRAM_BASE _BOARD_DSP1_ADDR_
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#endif
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#define CONFIG_DSP_SDRAM_SIZE (_BOARD_DSP1_SIZE_ + _BOARD_DSP2_SIZE_)
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#define CONFIG_RAMDISK_SDRAM_BASE _BOARD_RAMDISK_ADDR_
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#define CONFIG_RAMDISK_SDRAM_SIZE _BOARD_RAMDISK_SIZE_
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#define CONFIG_ITRON_SDRAM_BASE _BOARD_UITRON_ADDR_
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#define CONFIG_ITRON_SDRAM_SIZE _BOARD_UITRON_SIZE_
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/* temp buffer for all-in-one T.bin boot requirement */
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#define CONFIG_NVT_RUNFW_SDRAM_BASE (CONFIG_ITRON_SDRAM_BASE + (SZ_1M * 40))
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#define CONFIG_UBOOT_SDRAM_BASE _BOARD_UBOOT_ADDR_
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#define CONFIG_UBOOT_SDRAM_SIZE _BOARD_UBOOT_SIZE_
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#define CONFIG_LINUX_SDRAM_BASE _BOARD_LINUX_ADDR_
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#define CONFIG_LINUX_SDRAM_SIZE _BOARD_LINUX_SIZE_
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#define CONFIG_LINUX_SDRAM_START (CONFIG_UBOOT_SDRAM_BASE - CONFIG_NVT_UIMAGE_SIZE)
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#define CONFIG_LINUX_SDRAM_MEMRESERVED_BASE (_BOARD_DRAM_SIZE_ - CONFIG_DSP_SDRAM_SIZE - _BOARD_RAMDISK_SIZE_ - _BOARD_UITRON_RESV_SIZE_)
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#define CONFIG_LINUX_SDRAM_MEMRESERVED_SIZE _BOARD_UITRON_RESV_SIZE_
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#define CONFIG_SMEM_SDRAM_BASE _BOARD_IPC_ADDR_
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#define CONFIG_MODELEXT_SDRAM_BASE CONFIG_SMEM_SDRAM_BASE
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#define CONFIG_MODELEXT_SDRAM_SIZE 0x1000
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#define CONFIG_NVTIPC_SHARED_MEM_ADDR 0x00080000
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#define CONFIG_NVTIPC_SHARED_MEM_SIZE 0x1000
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#define CONFIG_SMEM_SDRAM_SIZE _BOARD_IPC_SIZE_
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#define CONFIG_MODELEXT_SPINAND_BASE 0x40000
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/* FLASH FileSystem */
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#ifdef CONFIG_NVT_SPI_NAND
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#define CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#endif
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#define CONFIG_SYS_NAND_BASE 0xF0400000
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#define CONFIG_SYS_HZ_CLOCK 24000000
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