161 lines
4.6 KiB
C
161 lines
4.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#ifndef __PINCTRL_UNIPHIER_H__
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#define __PINCTRL_UNIPHIER_H__
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#include <linux/bitops.h>
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#include <linux/build_bug.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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/* drive strength control register number */
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#define UNIPHIER_PIN_DRVCTRL_SHIFT 0
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#define UNIPHIER_PIN_DRVCTRL_BITS 9
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#define UNIPHIER_PIN_DRVCTRL_MASK ((1U << (UNIPHIER_PIN_DRVCTRL_BITS)) \
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- 1)
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/* drive control type */
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#define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
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(UNIPHIER_PIN_DRVCTRL_BITS))
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#define UNIPHIER_PIN_DRV_TYPE_BITS 2
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#define UNIPHIER_PIN_DRV_TYPE_MASK ((1U << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
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- 1)
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/* drive control type */
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enum uniphier_pin_drv_type {
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UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */
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UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */
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UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */
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};
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#define UNIPHIER_PIN_DRVCTRL(x) \
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(((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
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#define UNIPHIER_PIN_DRV_TYPE(x) \
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(((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
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#define UNIPHIER_PIN_ATTR_PACKED(drvctrl, drv_type) \
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UNIPHIER_PIN_DRVCTRL(drvctrl) | \
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UNIPHIER_PIN_DRV_TYPE(drv_type)
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static inline unsigned int uniphier_pin_get_drvctrl(unsigned int data)
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{
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return (data >> UNIPHIER_PIN_DRVCTRL_SHIFT) & UNIPHIER_PIN_DRVCTRL_MASK;
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}
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static inline unsigned int uniphier_pin_get_drv_type(unsigned int data)
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{
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return (data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
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UNIPHIER_PIN_DRV_TYPE_MASK;
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}
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/**
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* struct uniphier_pinctrl_pin - pin data for UniPhier SoC
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*
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* @number: pin number
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* @data: additional per-pin data
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*/
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struct uniphier_pinctrl_pin {
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unsigned number;
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const char *name;
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unsigned int data;
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};
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/**
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* struct uniphier_pinctrl_group - pin group data for UniPhier SoC
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*
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* @name: pin group name
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* @pins: array of pins that belong to the group
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* @num_pins: number of pins in the group
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* @muxvals: array of values to be set to pinmux registers
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*/
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struct uniphier_pinctrl_group {
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const char *name;
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const unsigned *pins;
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unsigned num_pins;
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const int *muxvals;
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};
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/**
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* struct uniphier_pinctrl_socdata - SoC data for UniPhier pin controller
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*
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* @pins: array of pin data
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* @pins_count: number of pin data
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* @groups: array of pin group data
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* @groups_count: number of pin group data
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* @functions: array of pinmux function names
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* @functions_count: number of pinmux functions
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* @mux_bits: bit width of each pinmux register
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* @reg_stride: stride of pinmux register address
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* @caps: SoC-specific capability flag
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*/
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struct uniphier_pinctrl_socdata {
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const struct uniphier_pinctrl_pin *pins;
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int pins_count;
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const struct uniphier_pinctrl_group *groups;
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int groups_count;
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const char * const *functions;
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int functions_count;
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unsigned caps;
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#define UNIPHIER_PINCTRL_CAPS_PUPD_SIMPLE BIT(3)
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#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(2)
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#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(1)
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#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT BIT(0)
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};
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#define UNIPHIER_PINCTRL_PIN(a, b, c, d) \
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{ \
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.number = a, \
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.name = b, \
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.data = UNIPHIER_PIN_ATTR_PACKED(c, d), \
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}
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#define __UNIPHIER_PINCTRL_GROUP(grp) \
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{ \
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.name = #grp, \
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.pins = grp##_pins, \
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.num_pins = ARRAY_SIZE(grp##_pins), \
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.muxvals = grp##_muxvals + \
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BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
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ARRAY_SIZE(grp##_muxvals)), \
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}
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#define __UNIPHIER_PINMUX_FUNCTION(func) #func
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#ifdef CONFIG_SPL_BUILD
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/*
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* a tricky way to drop unneeded *_pins and *_muxvals arrays from SPL,
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* suppressing "defined but not used" warnings.
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*/
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#define UNIPHIER_PINCTRL_GROUP(grp) \
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{ .num_pins = ARRAY_SIZE(grp##_pins) + ARRAY_SIZE(grp##_muxvals) }
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#define UNIPHIER_PINMUX_FUNCTION(func) NULL
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#else
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#define UNIPHIER_PINCTRL_GROUP(grp) __UNIPHIER_PINCTRL_GROUP(grp)
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#define UNIPHIER_PINMUX_FUNCTION(func) __UNIPHIER_PINMUX_FUNCTION(func)
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#endif
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#define UNIPHIER_PINCTRL_GROUP_SPL(grp) __UNIPHIER_PINCTRL_GROUP(grp)
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#define UNIPHIER_PINMUX_FUNCTION_SPL(func) __UNIPHIER_PINMUX_FUNCTION(func)
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/**
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* struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver
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*
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* @base: base address of the pinctrl device
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* @socdata: SoC specific data
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*/
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struct uniphier_pinctrl_priv {
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void __iomem *base;
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struct uniphier_pinctrl_socdata *socdata;
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};
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extern const struct pinctrl_ops uniphier_pinctrl_ops;
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int uniphier_pinctrl_probe(struct udevice *dev,
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struct uniphier_pinctrl_socdata *socdata);
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#endif /* __PINCTRL_UNIPHIER_H__ */
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