228 lines
6.5 KiB
C
228 lines
6.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2011 Freescale Semiconductor, Inc.
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* Jason Liu <r64343@freescale.com>
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*
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* Configuration settings for Freescale MX53 low cost board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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#define CONSOLE_DEV "ttymxc0"
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SYS_FSL_CLK
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_REVISION_TAG
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 2
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/* Eth Configs */
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1F
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX5
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_MCS7830
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#define CONFIG_USB_ETHER_SMSC95XX
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_SYS_RTC_BUS_NUM 2
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#define CONFIG_SYS_I2C_RTC_ADDR 0x30
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/* PMIC Controller */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_DIALOG_POWER
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#define CONFIG_POWER_FSL
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#define CONFIG_POWER_FSL_MC13892
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#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
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#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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#define CONFIG_ETHPRIME "FEC0"
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#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
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#define PPD_CONFIG_NFS \
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"nfsserver=192.168.252.95\0" \
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"gatewayip=192.168.252.95\0" \
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"netmask=255.255.255.0\0" \
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"ipaddr=192.168.252.99\0" \
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"kernsize=0x2000\0" \
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"use_dhcp=0\0" \
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"nfsroot=/opt/springdale/rd\0" \
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"bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
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"${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
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"choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \
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"set getcmd dhcp; else set kern_ipconf " \
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"ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
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"set getcmd tftp; fi\0" \
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"nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
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"${nfsserver}:${image}; bootm ${loadaddr}\0" \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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PPD_CONFIG_NFS \
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"image=/boot/fitImage\0" \
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"fdt_high=0xffffffff\0" \
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"dev=mmc\0" \
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"devnum=0\0" \
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"rootdev=mmcblk0p\0" \
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"quiet=quiet loglevel=0\0" \
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"console=" CONSOLE_DEV "\0" \
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"lvds=ldb\0" \
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"setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
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"vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
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"console=${console} ${rtc_status}\0" \
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"bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
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"rootwait ${bootargs}\0" \
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"doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
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"then setenv quiet; fi\0" \
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"hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
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"/boot/bootcause/firstboot\0" \
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"swappartitions=setexpr partnum 3 - ${partnum}\0" \
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"failbootcmd=" \
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"ppd_lcd_enable; " \
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"msg=\"Monitor failed to start. " \
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"Try again, or contact GE Service for support.\"; " \
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"echo $msg; " \
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"setenv stdout vga; " \
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"echo \"\n\n\n\n \" $msg; " \
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"setenv stdout serial; " \
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"mw.b 0x7000A000 0xbc; " \
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"mw.b 0x7000A001 0x00; " \
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"ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
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"altbootcmd=" \
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"run doquiet; " \
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"setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
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"run hasfirstboot || setenv partnum 0; " \
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"if test ${partnum} != 0; then " \
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"setenv bootcause REVERT; " \
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"run swappartitions loadimage doboot; " \
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"fi; " \
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"run failbootcmd\0" \
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"loadimage=" \
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"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
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"doboot=" \
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"echo Booting from ${dev}:${devnum}:${partnum} ...; " \
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"run setargs; " \
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"run bootargs_emmc; " \
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"bootm ${loadaddr}\0" \
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"tryboot=" \
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"setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
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"run loadimage || run swappartitions && run loadimage || " \
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"setenv partnum 0 && echo MISSING IMAGE;" \
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"run doboot; " \
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"run failbootcmd\0" \
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"video-mode=" \
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"lcd:800x480-24@60,monitor=lcd\0" \
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#define CONFIG_MMCBOOTCOMMAND \
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"if mmc dev ${devnum}; then " \
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"run doquiet; " \
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"run tryboot; " \
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"fi; " \
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#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_MAXARGS 48 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x70000000
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#define CONFIG_SYS_MEMTEST_END 0x70010000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Physical Memory Map */
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
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#define PHYS_SDRAM_2 CSD1_BASE_ADDR
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#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
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#define PHYS_SDRAM_SIZE (gd->ram_size)
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#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
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#define CONFIG_ENV_SIZE (10 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_CMD_FUSE
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#define CONFIG_FSL_IIM
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#define CONFIG_SYS_I2C_SPEED 100000
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/* I2C1 */
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#define CONFIG_SYS_NUM_I2C_BUSES 9
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#define CONFIG_SYS_I2C_MAX_HOPS 1
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#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
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}
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#define CONFIG_BCH
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/* Backlight Control */
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#define CONFIG_PWM_IMX
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#define CONFIG_IMX6_PWM_PER_CLK 66666000
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/* Framebuffer and LCD */
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#endif
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#endif /* __CONFIG_H */
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