120 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			120 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
/*
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 * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
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 *
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 * Copyright 2011-2012 Freescale Semiconductor Inc.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *     * Redistributions of source code must retain the above copyright
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 *       notice, this list of conditions and the following disclaimer.
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 *     * Redistributions in binary form must reproduce the above copyright
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 *       notice, this list of conditions and the following disclaimer in the
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 *       documentation and/or other materials provided with the distribution.
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 *     * Neither the name of Freescale Semiconductor nor the
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 *       names of its contributors may be used to endorse or promote products
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 *       derived from this software without specific prior written permission.
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 *
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 *
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 * ALTERNATIVELY, this software may be distributed under the terms of the
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 * GNU General Public License ("GPL") as published by the Free Software
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 * Foundation, either version 2 of that License or (at your option) any
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 * later version.
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 *
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 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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crypto: crypto@300000 {
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	compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
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	fsl,sec-era = <5>;
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	#address-cells = <1>;
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	#size-cells = <1>;
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	reg		 = <0x300000 0x10000>;
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	ranges		 = <0 0x300000 0x10000>;
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	interrupts	 = <92 2 0 0>;
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	sec_jr0: jr@1000 {
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		compatible = "fsl,sec-v5.2-job-ring",
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			     "fsl,sec-v5.0-job-ring",
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			     "fsl,sec-v4.0-job-ring";
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		reg = <0x1000 0x1000>;
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		interrupts = <88 2 0 0>;
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	};
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	sec_jr1: jr@2000 {
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		compatible = "fsl,sec-v5.2-job-ring",
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			     "fsl,sec-v5.0-job-ring",
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			     "fsl,sec-v4.0-job-ring";
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		reg = <0x2000 0x1000>;
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		interrupts = <89 2 0 0>;
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	};
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	sec_jr2: jr@3000 {
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		compatible = "fsl,sec-v5.2-job-ring",
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			     "fsl,sec-v5.0-job-ring",
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			     "fsl,sec-v4.0-job-ring";
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		reg = <0x3000 0x1000>;
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		interrupts = <90 2 0 0>;
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	};
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	sec_jr3: jr@4000 {
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		compatible = "fsl,sec-v5.2-job-ring",
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			     "fsl,sec-v5.0-job-ring",
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			     "fsl,sec-v4.0-job-ring";
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		reg = <0x4000 0x1000>;
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		interrupts = <91 2 0 0>;
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	};
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	rtic@6000 {
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		compatible = "fsl,sec-v5.2-rtic",
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			     "fsl,sec-v5.0-rtic",
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			     "fsl,sec-v4.0-rtic";
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		#address-cells = <1>;
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		#size-cells = <1>;
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		reg = <0x6000 0x100>;
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		ranges = <0x0 0x6100 0xe00>;
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		rtic_a: rtic-a@0 {
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			compatible = "fsl,sec-v5.2-rtic-memory",
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				     "fsl,sec-v5.0-rtic-memory",
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				     "fsl,sec-v4.0-rtic-memory";
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			reg = <0x00 0x20 0x100 0x80>;
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		};
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		rtic_b: rtic-b@20 {
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			compatible = "fsl,sec-v5.2-rtic-memory",
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				     "fsl,sec-v5.0-rtic-memory",
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				     "fsl,sec-v4.0-rtic-memory";
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			reg = <0x20 0x20 0x200 0x80>;
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		};
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		rtic_c: rtic-c@40 {
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			compatible = "fsl,sec-v5.2-rtic-memory",
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				     "fsl,sec-v5.0-rtic-memory",
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				     "fsl,sec-v4.0-rtic-memory";
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			reg = <0x40 0x20 0x300 0x80>;
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		};
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		rtic_d: rtic-d@60 {
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			compatible = "fsl,sec-v5.2-rtic-memory",
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				     "fsl,sec-v5.0-rtic-memory",
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				     "fsl,sec-v4.0-rtic-memory";
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			reg = <0x60 0x20 0x500 0x80>;
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		};
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	};
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};
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sec_mon: sec_mon@314000 {
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	compatible = "fsl,sec-v5.2-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
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	reg = <0x314000 0x1000>;
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	interrupts = <93 2 0 0>;
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};
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