55 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			55 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_24XX_H
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| #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_24XX_H
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| 
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| /*
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|  * OMAP24XX Clock Management register bits
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|  *
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|  * Copyright (C) 2007 Texas Instruments, Inc.
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|  * Copyright (C) 2007 Nokia Corporation
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|  *
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|  * Written by Paul Walmsley
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| 
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| #define OMAP24XX_AUTOSTATE_MPU_MASK			(1 << 0)
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| #define OMAP24XX_EN_DSS1_MASK				(1 << 0)
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| #define OMAP24XX_ST_MAILBOXES_SHIFT			30
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| #define OMAP24XX_ST_HDQ_SHIFT				23
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| #define OMAP2420_ST_I2C2_SHIFT				20
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| #define OMAP2430_ST_I2CHS1_SHIFT			19
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| #define OMAP2420_ST_I2C1_SHIFT				19
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| #define OMAP2430_ST_I2CHS2_SHIFT			20
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| #define OMAP24XX_ST_MCBSP2_SHIFT			16
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| #define OMAP24XX_ST_MCBSP1_SHIFT			15
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| #define OMAP2430_ST_MCBSP5_SHIFT			5
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| #define OMAP2430_ST_MCBSP4_SHIFT			4
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| #define OMAP2430_ST_MCBSP3_SHIFT			3
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| #define OMAP24XX_ST_AES_SHIFT				3
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| #define OMAP24XX_ST_RNG_SHIFT				2
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| #define OMAP24XX_ST_SHA_SHIFT				1
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| #define OMAP24XX_CLKSEL_DSS2_MASK			(0x1 << 13)
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| #define OMAP24XX_AUTOSTATE_DSS_MASK			(1 << 2)
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| #define OMAP24XX_AUTOSTATE_L4_MASK			(1 << 1)
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| #define OMAP24XX_AUTOSTATE_L3_MASK			(1 << 0)
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| #define OMAP24XX_AUTOSTATE_GFX_MASK			(1 << 0)
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| #define OMAP24XX_ST_MPU_WDT_SHIFT			3
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| #define OMAP24XX_ST_32KSYNC_SHIFT			1
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| #define OMAP24XX_EN_54M_PLL_SHIFT			6
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| #define OMAP24XX_EN_96M_PLL_SHIFT			2
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| #define OMAP24XX_ST_54M_APLL_SHIFT			9
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| #define OMAP24XX_ST_96M_APLL_SHIFT			8
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| #define OMAP24XX_AUTO_54M_MASK				(0x3 << 6)
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| #define OMAP24XX_AUTO_96M_MASK				(0x3 << 2)
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| #define OMAP24XX_AUTO_DPLL_SHIFT			0
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| #define OMAP24XX_AUTO_DPLL_MASK				(0x3 << 0)
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| #define OMAP24XX_CORE_CLK_SRC_MASK			(0x3 << 0)
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| #define OMAP2420_AUTOSTATE_IVA_MASK			(1 << 8)
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| #define OMAP24XX_AUTOSTATE_DSP_MASK			(1 << 0)
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| #define OMAP2430_AUTOSTATE_MDM_MASK			(1 << 0)
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| #define OMAP24XX_CLKSTCTRL_DISABLE_AUTO		0x0
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| #define OMAP24XX_CLKSTCTRL_ENABLE_AUTO		0x1
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| #endif
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