222 lines
		
	
	
		
			5.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			222 lines
		
	
	
		
			5.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * linux/drivers/misc/xillybus_pcie.c
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|  *
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|  * Copyright 2011 Xillybus Ltd, http://xillybus.com
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|  *
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|  * Driver for the Xillybus FPGA/host framework using PCI Express.
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the smems of the GNU General Public License as published by
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|  * the Free Software Foundation; version 2 of the License.
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|  */
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| 
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| #include <linux/module.h>
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| #include <linux/pci.h>
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| #include <linux/pci-aspm.h>
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| #include <linux/slab.h>
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| #include "xillybus.h"
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| 
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| MODULE_DESCRIPTION("Xillybus driver for PCIe");
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| MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
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| MODULE_VERSION("1.06");
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| MODULE_ALIAS("xillybus_pcie");
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| MODULE_LICENSE("GPL v2");
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| 
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| #define PCI_DEVICE_ID_XILLYBUS		0xebeb
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| 
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| #define PCI_VENDOR_ID_ACTEL		0x11aa
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| #define PCI_VENDOR_ID_LATTICE		0x1204
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| 
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| static const char xillyname[] = "xillybus_pcie";
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| 
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| static const struct pci_device_id xillyids[] = {
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| 	{PCI_DEVICE(PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_XILLYBUS)},
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| 	{PCI_DEVICE(PCI_VENDOR_ID_ALTERA, PCI_DEVICE_ID_XILLYBUS)},
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| 	{PCI_DEVICE(PCI_VENDOR_ID_ACTEL, PCI_DEVICE_ID_XILLYBUS)},
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| 	{PCI_DEVICE(PCI_VENDOR_ID_LATTICE, PCI_DEVICE_ID_XILLYBUS)},
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| 	{ /* End: all zeroes */ }
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| };
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| 
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| static int xilly_pci_direction(int direction)
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| {
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| 	switch (direction) {
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| 	case DMA_TO_DEVICE:
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| 		return PCI_DMA_TODEVICE;
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| 	case DMA_FROM_DEVICE:
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| 		return PCI_DMA_FROMDEVICE;
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| 	default:
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| 		return PCI_DMA_BIDIRECTIONAL;
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| 	}
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| }
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| 
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| static void xilly_dma_sync_single_for_cpu_pci(struct xilly_endpoint *ep,
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| 					      dma_addr_t dma_handle,
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| 					      size_t size,
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| 					      int direction)
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| {
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| 	pci_dma_sync_single_for_cpu(ep->pdev,
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| 				    dma_handle,
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| 				    size,
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| 				    xilly_pci_direction(direction));
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| }
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| 
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| static void xilly_dma_sync_single_for_device_pci(struct xilly_endpoint *ep,
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| 						 dma_addr_t dma_handle,
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| 						 size_t size,
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| 						 int direction)
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| {
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| 	pci_dma_sync_single_for_device(ep->pdev,
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| 				       dma_handle,
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| 				       size,
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| 				       xilly_pci_direction(direction));
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| }
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| 
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| static void xilly_pci_unmap(void *ptr)
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| {
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| 	struct xilly_mapping *data = ptr;
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| 
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| 	pci_unmap_single(data->device, data->dma_addr,
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| 			 data->size, data->direction);
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| 
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| 	kfree(ptr);
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| }
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| 
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| /*
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|  * Map either through the PCI DMA mapper or the non_PCI one. Behind the
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|  * scenes exactly the same functions are called with the same parameters,
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|  * but that can change.
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|  */
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| 
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| static int xilly_map_single_pci(struct xilly_endpoint *ep,
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| 				void *ptr,
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| 				size_t size,
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| 				int direction,
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| 				dma_addr_t *ret_dma_handle
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| 	)
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| {
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| 	int pci_direction;
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| 	dma_addr_t addr;
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| 	struct xilly_mapping *this;
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| 
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| 	this = kzalloc(sizeof(*this), GFP_KERNEL);
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| 	if (!this)
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| 		return -ENOMEM;
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| 
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| 	pci_direction = xilly_pci_direction(direction);
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| 
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| 	addr = pci_map_single(ep->pdev, ptr, size, pci_direction);
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| 
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| 	if (pci_dma_mapping_error(ep->pdev, addr)) {
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| 		kfree(this);
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| 		return -ENODEV;
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| 	}
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| 
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| 	this->device = ep->pdev;
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| 	this->dma_addr = addr;
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| 	this->size = size;
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| 	this->direction = pci_direction;
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| 
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| 	*ret_dma_handle = addr;
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| 
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| 	return devm_add_action_or_reset(ep->dev, xilly_pci_unmap, this);
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| }
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| 
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| static struct xilly_endpoint_hardware pci_hw = {
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| 	.owner = THIS_MODULE,
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| 	.hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_pci,
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| 	.hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_pci,
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| 	.map_single = xilly_map_single_pci,
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| };
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| 
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| static int xilly_probe(struct pci_dev *pdev,
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| 		       const struct pci_device_id *ent)
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| {
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| 	struct xilly_endpoint *endpoint;
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| 	int rc;
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| 
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| 	endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw);
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| 
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| 	if (!endpoint)
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| 		return -ENOMEM;
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| 
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| 	pci_set_drvdata(pdev, endpoint);
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| 
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| 	rc = pcim_enable_device(pdev);
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| 	if (rc) {
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| 		dev_err(endpoint->dev,
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| 			"pcim_enable_device() failed. Aborting.\n");
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| 		return rc;
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| 	}
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| 
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| 	/* L0s has caused packet drops. No power saving, thank you. */
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| 
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| 	pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
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| 
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| 	if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
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| 		dev_err(endpoint->dev,
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| 			"Incorrect BAR configuration. Aborting.\n");
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| 		return -ENODEV;
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| 	}
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| 
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| 	rc = pcim_iomap_regions(pdev, 0x01, xillyname);
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| 	if (rc) {
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| 		dev_err(endpoint->dev,
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| 			"pcim_iomap_regions() failed. Aborting.\n");
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| 		return rc;
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| 	}
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| 
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| 	endpoint->registers = pcim_iomap_table(pdev)[0];
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| 
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| 	pci_set_master(pdev);
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| 
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| 	/* Set up a single MSI interrupt */
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| 	if (pci_enable_msi(pdev)) {
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| 		dev_err(endpoint->dev,
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| 			"Failed to enable MSI interrupts. Aborting.\n");
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| 		return -ENODEV;
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| 	}
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| 	rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0,
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| 			      xillyname, endpoint);
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| 	if (rc) {
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| 		dev_err(endpoint->dev,
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| 			"Failed to register MSI handler. Aborting.\n");
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| 		return -ENODEV;
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| 	}
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| 
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| 	/*
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| 	 * Some (old and buggy?) hardware drops 64-bit addressed PCIe packets,
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| 	 * even when the PCIe driver claims that a 64-bit mask is OK. On the
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| 	 * other hand, on some architectures, 64-bit addressing is mandatory.
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| 	 * So go for the 64-bit mask only when failing is the other option.
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| 	 */
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| 
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| 	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
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| 		endpoint->dma_using_dac = 0;
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| 	} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
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| 		endpoint->dma_using_dac = 1;
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| 	} else {
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| 		dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n");
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| 		return -ENODEV;
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| 	}
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| 
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| 	return xillybus_endpoint_discovery(endpoint);
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| }
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| 
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| static void xilly_remove(struct pci_dev *pdev)
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| {
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| 	struct xilly_endpoint *endpoint = pci_get_drvdata(pdev);
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| 
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| 	xillybus_endpoint_remove(endpoint);
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| }
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| 
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| MODULE_DEVICE_TABLE(pci, xillyids);
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| 
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| static struct pci_driver xillybus_driver = {
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| 	.name = xillyname,
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| 	.id_table = xillyids,
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| 	.probe = xilly_probe,
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| 	.remove = xilly_remove,
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| };
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| 
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| module_pci_driver(xillybus_driver);
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