117 lines
1.8 KiB
C
117 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* K2E EVM : Board initialization
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*
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* (C) Copyright 2014
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* Texas Instruments Incorporated, <www.ti.com>
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*/
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#include <common.h>
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#include <asm/arch/ddr3.h>
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#include <asm/arch/hardware.h>
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#include <asm/ti-common/keystone_net.h>
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unsigned int get_external_clk(u32 clk)
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{
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unsigned int clk_freq;
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switch (clk) {
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case sys_clk:
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clk_freq = 100000000;
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break;
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case alt_core_clk:
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clk_freq = 100000000;
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break;
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case pa_clk:
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clk_freq = 100000000;
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break;
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case ddr3a_clk:
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clk_freq = 100000000;
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break;
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default:
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clk_freq = 0;
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break;
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}
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return clk_freq;
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}
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static struct pll_init_data core_pll_config[NUM_SPDS] = {
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[SPD800] = CORE_PLL_800,
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[SPD850] = CORE_PLL_850,
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[SPD1000] = CORE_PLL_1000,
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[SPD1250] = CORE_PLL_1250,
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[SPD1350] = CORE_PLL_1350,
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[SPD1400] = CORE_PLL_1400,
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[SPD1500] = CORE_PLL_1500,
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};
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/* DEV and ARM speed definitions as specified in DEVSPEED register */
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int speeds[DEVSPEED_NUMSPDS] = {
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SPD850,
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SPD1000,
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SPD1250,
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SPD1350,
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SPD1400,
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SPD1500,
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SPD1400,
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SPD1350,
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SPD1250,
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SPD1000,
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SPD850,
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SPD800,
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};
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s16 divn_val[16] = {
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0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
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};
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static struct pll_init_data pa_pll_config =
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PASS_PLL_1000;
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struct pll_init_data *get_pll_init_data(int pll)
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{
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int speed;
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struct pll_init_data *data;
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switch (pll) {
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case MAIN_PLL:
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speed = get_max_dev_speed(speeds);
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data = &core_pll_config[speed];
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break;
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case PASS_PLL:
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data = &pa_pll_config;
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break;
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default:
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data = NULL;
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}
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return data;
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}
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#if defined(CONFIG_MULTI_DTB_FIT)
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int board_fit_config_name_match(const char *name)
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{
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if (!strcmp(name, "keystone-k2e-evm"))
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return 0;
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return -1;
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}
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#endif
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#if defined(CONFIG_BOARD_EARLY_INIT_F)
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int board_early_init_f(void)
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{
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init_plls();
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return 0;
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}
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#endif
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#ifdef CONFIG_SPL_BUILD
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void spl_init_keystone_plls(void)
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{
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init_plls();
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}
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#endif
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