324 lines
9.9 KiB
C
Executable File
324 lines
9.9 KiB
C
Executable File
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#ifndef __USB_UPDATE_H
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#define __USB_UPDATE_H
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#include "scsi_op.h"
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#define BIT0 0x00000001L
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#define BIT1 0x00000002L
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#define BIT2 0x00000004L
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#define BIT3 0x00000008L
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#define BIT4 0x00000010L
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#define BIT5 0x00000020L
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#define BIT6 0x00000040L
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#define BIT7 0x00000080L
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#define BIT8 0x00000100L
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#define BIT9 0x00000200L
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#define BIT10 0x00000400L
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#define BIT11 0x00000800L
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#define BIT12 0x00001000L
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#define BIT13 0x00002000L
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#define BIT14 0x00004000L
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#define BIT15 0x00008000L
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#define BIT16 0x00010000L
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#define BIT17 0x00020000L
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#define BIT18 0x00040000L
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#define BIT19 0x00080000L
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#define BIT20 0x00100000L
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#define BIT21 0x00200000L
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#define BIT22 0x00400000L
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#define BIT23 0x00800000L
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typedef int (*MSDC_Verify_CB)(unsigned int pCmdBuf, unsigned int *pDataBuf, unsigned int *IN_size); ///< Callback for verify the Vendor Command is supported or not
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typedef int (*MSDC_VenDone_CB)(unsigned int pCmdBuf); ///< Callback for verify the Vendor Command is supported or not
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// KEY_ILLEGAL_REQUEST: Additional key
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#define ADDKEY_INVALID_CMD_OP_CODE 0x20
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#define ADDKEY_INVALID_FIELD_IN_CMD 0x24
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#define CBW_FLAG_IN 0x80
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#define CBW_FLAG_OUT 0x00
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// Endpoint or FIFO direction define
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#define DIRECTION_IN 0 ///1
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#define DIRECTION_OUT 1 ///0
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#define EP0 0x00
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#define EP1 0x01
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#define EP2 0x02
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#define EP3 0x03
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// FIFO number define
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#define FIFO0 0x0
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#define FIFO1 0x1
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#define FIFO2 0x2
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#define FIFO3 0x3
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#define FIFO4 0x4
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#define FIFO5 0x5
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#define FIFO6 0x6
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#define FIFO7 0x7
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#define FIFO8 0x8
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#define FIFO9 0x9
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#define OUT_EP EP2
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#define IN_EP EP1
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#define OUT_FIFO FIFO2
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#define IN_FIFO FIFO0
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typedef enum {
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MS13Case_1 = 0,
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MS13Case_2_3,
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MS13Case_4,
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MS13Case_5,
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MS13Case_6,
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MS13Case_7_8,
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MS13Case_9,
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MS13Case_10_13,
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MS13Case_11,
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MS13Case_12
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} MassStorage13Case;
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#define CBW_SIGNATE 0x43425355
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#define CSW_SIGNATE 0x53425355
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#define CSW_STATUS_CMD_PASS 0x00
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#define CSW_STATUS_CMD_FAIL 0x01
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#define CSW_STATUS_PHASE_ERROR 0x02
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// Request Sense data format
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#define SENSE_OFFSET_KEY 0x02
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#define SENSE_OFFSET_ADD 0x0C
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#define SENSE_OFFSET_ADD_QUALIFIER 0x0D
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// KEY_NO_SENSE: Additional key
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#define ADDKEY_NO_ADDITIONAL 0x00
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// all response data length
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#define DATA_LENGTH_INQUIRY 36
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#define DATA_LENGTH_REQUEST_SENSE 18
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#define DATA_LENGTH_MODE_SENSE 8
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// SCSI command operation code
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#define SCSI_OP_TEST_UNIT_READY 0x00
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#define SCSI_OP_REQUEST_SENSE 0x03
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#define SCSI_OP_INQUIRY 0x12
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#define SCSI_OP_MODE_SELECT 0x15
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#define SCSI_OP_MODE_SENSE 0x1A
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#define SCSI_OP_MEDIUM_REMOVAL 0x1E
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#define SCSI_OP_READ_FORMAT_CAPACITY 0x23 // unsupported
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#define SCSI_OP_READ_CAPACITY 0x25
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#define SCSI_OP_READ_10 0x28
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#define SCSI_OP_WRITE_10 0x2A
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#define SCSI_OP_VERIFY 0x2F
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#define CARD_INDEX_SRAM 7
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#define CARD_INDEX_FSM_SS 3
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#define CARD_TYPE_MAX_REPORT 1
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// KEY_NOT_READY: Additional key
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#define ADDKEY_LOGICAL_UNIT_NOT_READY 0x04
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#define ADDKEY_LOGICAL_UNIT_NOT_SUPPORT 0x25
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#define ADDKEY_MEDIUM_NOT_PRESENT 0x3A
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// Sense key
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#define KEY_NO_SENSE 0x00
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#define KEY_RECOVERED_ERROR 0x01
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#define KEY_NOT_READY 0x02
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#define KEY_MEDIUM_ERROR 0x03
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#define KEY_HARDWARE_ERROR 0x04
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#define KEY_ILLEGAL_REQUEST 0x05
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#define KEY_UNIT_ATTENTION 0x06
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#define KEY_DATA_PROTECT 0x07
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#define KEY_BLANK_CHECK 0x08
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#define KEY_VENDOR_SPECIFIC 0x09
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#define KEY_COPY_ABORTED 0x0A
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#define KEY_ABORTED_CMD 0x0B
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#define KEY_OBSOLETE 0x0C
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#define KEY_VOLUMN_OVERFLOW 0x0D
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#define KEY_MISCOMPARE 0x0E
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#define KEY_RESERVED 0x0F
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typedef struct // SCSI device response
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{
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unsigned int u8MemIndex; // current access memory type
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unsigned int u8Flags; // In or Out
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unsigned int u32IOAddr; // block addr in Card controller
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unsigned int u16DataResidue; // residue (block count for card content, or byte count for information)
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unsigned int u16TfSzCurrent; // current transfer length (block count for card content, or byte count for information)
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} SCSIDeviceResp;
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typedef struct SCSI_Sense_Data
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{
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unsigned int u8Key;
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unsigned int u8KeyAdd;
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} SCSISense;
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typedef enum {
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MS_STATE_IDLE = 0,
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MS_STATE_CBW = 1,
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MS_STATE_CB_DMA_IN = 2,
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MS_STATE_CB_DMA_OUT = 3,
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MS_STATE_CSW = 4,
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MS_STATE_STALL = 5,
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MS_STATE_BGD = 6
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} MassStorageState;
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typedef struct CommandBlockWrapper
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{
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unsigned int u32Signature;
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unsigned int u32Tag;
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unsigned int u32DataTransferLength;
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unsigned int CB0_cblen_lun_flag;
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unsigned int CB1_CB15[4];
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//unsigned char u8Flags;
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//unsigned char u8LUN;
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//unsigned char u8CBLength;
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//unsigned char u8CB[16];
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} CBW;
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typedef struct CommandStatusWrapper
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{
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unsigned int u32Signature;
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unsigned int u32Tag;
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unsigned int u32DataResidue;
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unsigned int u8Status;
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} CSW;
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// Host Controller (HC)
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typedef struct {
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INT32U cap; // 0x00: capability
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INT32U ports; // 0x04: Structural Parameter
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INT32U capp; // 0x08: capability Parameter
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INT32U reserved1; // 0X0c
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INT32U cmd; // 0x10: USB command
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INT32U status; // 0X14: status
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INT32U int_en; // 0X18: interrupt enable
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INT32U fm_idx; // 0X1c: frame Index
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INT32U reserved2; // 0x20
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INT32U periodic; // 0X24: periodic Frame List Base Address. must 4KB align.
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INT32U asynch; // 0X28: Current Asynchronous List Address, must 32B align.
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INT32U reserved3; // 0X2c
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INT32U port; // 0x30: port status and Control
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INT32U reserved4[3]; // 0X34 ~ 0X3c
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INT32U misc; // 0x40
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INT32U reserved5[15]; // 0x44 ~ 0x7C
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} HC;
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// OTG Controller (OTG)
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typedef struct {
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INT32U ctl_st; // 0x80: control/status
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INT32U int_st; // 0x84: interrupt status
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INT32U int_en; // 0x88: interrupt enable
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INT32U reserved[13]; // 0x8C ~ 0xBC
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} OTG;
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// Global Controller (GL)
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typedef struct {
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INT32U int_st; // 0xC0: interrupt status
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INT32U interrupt; // 0xC4: interrupt mask
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INT32U reserved[14]; // 0xC8 ~ 0xFC
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} GL;
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// Device Controller (DEV)
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typedef struct {
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INT32U main_ctl; // 0x100: device main control
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INT32U dev_adr; // 0x104: device address
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INT32U tst_ep; // 0x108: device test
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INT32U frm_no; // 0x10C: device SOF [13: 11] SOF micro frame number, [10: 0] SOF frame number
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INT32U sof_tmsk; // 0x110: device SOF mask timer [15: 0] SOF mask timer
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INT32U phy_tms; // 0x114: PHY test mode selector
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INT32U vnd_ctl; // 0x118: vendor specific IO control
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INT32U cx_cs; // 0x11C: CX configuration and status
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INT32U cx_cf; // 0x120: CX configuration and FIFO empty status
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INT32U idle_cnt; // 0x124: Device idel counter
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INT32U cx_dataport; // 0x128: device cx data register
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INT32U reserved1[1]; // 0x128 ~ 0x12C
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INT32U int_mgrp; // 0x130: mask of interrupt group
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INT32U int_mgrp0; // 0x134: mask of interrupt source group 0
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INT32U int_mgrp1; // 0x138: mask of interrupt source group 1
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INT32U int_mgrp2; // 0x13C: mask of interrupt source group 2
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INT32U int_grp; // 0x140: interrupt group
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INT32U int_grp0; // 0x144: interrupt group 0
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INT32U int_grp1; // 0x148: interrupt group 1
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INT32U int_grp2; // 0x14C: interrupt group 2
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INT32U rx0byte; // 0x150: receive zero-length data packet
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INT32U tx0byte; // 0x154: rtransfer zero-length data packet
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INT32U iso_seq_err; // 0x158: iso. sequential error/abort
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INT32U reserved2; // 0x15C
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INT32U ep_xpsz[2][8]; // 0x160: IN endpoint x MaxPacketSize Reg
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// 0x170: IN endpoint x MaxPacketSize Reg
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// 0x180: OUT endpoint x MaxPacketSize Reg
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// 0x190: OUT endpoint x MaxPacketSize Reg
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INT8U ep_map[8]; // 0x1A0: endpoint 1 ~ 8 map Reg
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INT8U fifo_map[4]; // 0x1A8: FIFO 0 ~ 3 map Reg
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INT8U fifo_cfg[4]; // 0x1AC: FIFO 0 ~ 3 configuration
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INT32U fifo_bc[4]; // 0x1B0: FIFO x instruction and byte count
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INT32U dma_fifo; // 0x1C0: dma target FIFO number
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INT32U reserved3; // 0x1C4
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INT32U dma_ctl; // 0x1C8: DMA controller parameter setting 1
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INT32U dma_addr; // 0x1CC: DMA controller parameter setting 2, address
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INT32U dma_data; // 0x1D0: DMA controller parameter setting 3, Cx data
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} DEV;
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// OTG Controller
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typedef struct {
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HC hc; // 0x00 ~ 0x7F
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OTG otg; // 0x80 ~ 0xBF
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GL gl; // 0xC0 ~ 0xFF
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DEV dev; // 0x100 ~ 0x1FF
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} OTG200;
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typedef enum
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{
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ACT_IDLE,
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ACT_DONE,
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ACT_STALL,
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ACT_DUMMY = 0x80000000
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} Action;
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typedef enum
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{
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CMD_VOID, // No command
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CMD_GET_DESCRIPTOR, // Get_Descriptor command
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CMD_SET_DESCRIPTOR, // Set_Descriptor command
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CommandType_dummy = 0x80000000
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} CommandType;
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typedef struct USB_s
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{
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// end pointer 0 information
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unsigned int u32UsbCmd[8/4];
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unsigned int bUsbChirpFinish;
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Action eUsbCxAction;
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unsigned int u16TxRxCounter;
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unsigned char * pu8Descriptor;
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unsigned int u8UsbConfigValue;
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unsigned int u8UsbInterfaceValue;
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unsigned int u8UsbInterfaceAlternateSetting;
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unsigned int bUsbEP0HaltSt;
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unsigned int bHighSpeed; // high speed
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CommandType eUsbCxCommand;
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// for display
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unsigned int u8LineCount;
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} USB_st;
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#endif /* __USB_OTG_H */
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