137 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			137 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: (GPL-2.0 OR MIT)
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| /*
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|  * Device Tree file for Marvell Armada 395 GP board
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|  *
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|  * Copyright (C) 2016 Marvell
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|  *
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|  * Grzegorz Jaszczyk <jaz@semihalf.com>
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|  */
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| 
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| /dts-v1/;
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| #include "armada-395.dtsi"
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| 
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| / {
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| 	model = "Marvell Armada 395 GP Board";
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| 	compatible = "marvell,a395-gp", "marvell,armada395",
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| 		     "marvell,armada390";
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| 
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| 	chosen {
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| 		stdout-path = "serial0:115200n8";
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| 	};
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| 
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| 	memory {
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| 		device_type = "memory";
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| 		reg = <0x00000000 0x40000000>; /* 1 GB */
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| 	};
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| 
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| 	soc {
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| 		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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| 			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
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| 
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| 		internal-regs {
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| 			i2c@11000 {
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| 				status = "okay";
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| 				clock-frequency = <100000>;
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| 
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| 				eeprom@57 {
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| 					compatible = "atmel,24c64";
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| 					reg = <0x57>;
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| 				};
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| 			};
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| 
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| 			serial@12000 {
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| 				/*
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| 				 * Exported on the micro USB connector CON17
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| 				 * through an FTDI
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| 				 */
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| 				status = "okay";
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| 			};
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| 
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| 			/* CON1 */
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| 			usb@58000 {
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| 				status = "okay";
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| 			};
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| 
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| 			/* CON2 */
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| 			sata@a8000 {
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| 				status = "okay";
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| 			};
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| 
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| 			/* CON18 */
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| 			sdhci@d8000 {
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| 				clock-frequency = <200000000>;
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| 				broken-cd;
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| 				wp-inverted;
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| 				bus-width = <8>;
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| 				status = "okay";
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| 				no-1-8-v;
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| 			};
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| 
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| 			/* CON4 */
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| 			usb3@f0000 {
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| 				status = "okay";
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| 			};
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| 		};
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| 
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| 		pcie {
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| 			status = "okay";
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| 
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| 			/*
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| 			 * The two PCIe units are accessible through
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| 			 * mini PCIe slot on the board.
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| 			 */
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| 
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| 			/* CON7 */
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| 			pcie@2,0 {
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| 				/* Port 1, Lane 0 */
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| 				status = "okay";
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| 			};
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| 
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| 			/* CON8 */
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| 			pcie@4,0 {
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| 				/* Port 3, Lane 0 */
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| 				status = "okay";
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| 			};
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| 		};
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| 	};
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| };
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| 
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| &nand_controller {
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| 	status = "okay";
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| 	pinctrl-0 = <&nand_pins>;
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| 	pinctrl-names = "default";
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| 
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| 	nand@0 {
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| 		reg = <0>;
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| 		label = "pxa3xx_nand-0";
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| 		nand-rb = <0>;
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| 		marvell,nand-keep-config;
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| 		nand-on-flash-bbt;
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| 		nand-ecc-strength = <4>;
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| 		nand-ecc-step-size = <512>;
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| 
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| 		partitions {
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| 			compatible = "fixed-partitions";
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| 			#address-cells = <1>;
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| 			#size-cells = <1>;
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| 
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| 			partition@0 {
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| 				label = "U-Boot";
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| 				reg = <0x00000000 0x00600000>;
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| 				read-only;
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| 			};
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| 
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| 			partition@800000 {
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| 				label = "uImage";
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| 				reg = <0x00600000 0x00400000>;
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| 				read-only;
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| 			};
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| 
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| 			partition@1000000 {
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| 				label = "Root";
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| 				reg = <0x00a00000 0x3f600000>;
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| 			};
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| 		};
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| 	};
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| };
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