76 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			76 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0+
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/*
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 * Copyright (C) 2011 Andes Technology Corporation
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 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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 */
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#include <asm/mach-types.h>
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#include <common.h>
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#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
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#include <netdev.h>
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#endif
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#include <linux/io.h>
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#include <faraday/ftsmc020.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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 * Miscellaneous platform dependent initializations
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 */
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int board_init(void)
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{
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	/*
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	 * refer to BOOT_PARAMETER_PA_BASE within
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	 * "linux/arch/nds32/include/asm/misc_spec.h"
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	 */
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	printf("Board: %s\n" , CONFIG_SYS_BOARD);
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	gd->bd->bi_arch_number = MACH_TYPE_ADPAE3XX;
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	gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
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	return 0;
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}
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int dram_init(void)
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{
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	unsigned long sdram_base = PHYS_SDRAM_0;
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	unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
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	unsigned long actual_size;
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	actual_size = get_ram_size((void *)sdram_base, expected_size);
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	gd->ram_size = actual_size;
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	if (expected_size != actual_size) {
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		printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
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				actual_size >> 20, expected_size >> 20);
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	}
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	return 0;
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}
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int dram_init_banksize(void)
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{
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	gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
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	gd->bd->bi_dram[0].size =  PHYS_SDRAM_0_SIZE;
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	gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
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	gd->bd->bi_dram[1].size =  PHYS_SDRAM_1_SIZE;
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	return 0;
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}
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#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
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int board_eth_init(bd_t *bd)
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{
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	return ftmac100_initialize(bd);
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}
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#endif
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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	if (banknum == 0) {	/* non-CFI boot flash */
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		info->portwidth = FLASH_CFI_8BIT;
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		info->chipwidth = FLASH_CFI_BY8;
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		info->interface = FLASH_CFI_X8;
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		return 1;
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	} else {
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		return 0;
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	}
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}
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