145 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			145 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
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|  *
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|  * This software is licensed under the terms of the GNU General Public
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|  * License version 2, as published by the Free Software Foundation, and
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|  * may be copied, distributed, and modified under those terms.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  */
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| 
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| #include <linux/clk.h>
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| #include <linux/clk-provider.h>
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| #include <linux/of_address.h>
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| #include <linux/platform_device.h>
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| 
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| #include "ccu_common.h"
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| #include "ccu_gate.h"
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| #include "ccu_reset.h"
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| 
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| #include "ccu-sun9i-a80-usb.h"
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| 
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| static SUNXI_CCU_GATE(bus_hci0_clk, "bus-hci0", "bus-usb", 0x0, BIT(1), 0);
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| static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc24M", 0x0, BIT(2), 0);
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| static SUNXI_CCU_GATE(bus_hci1_clk, "bus-hci1", "bus-usb", 0x0, BIT(3), 0);
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| static SUNXI_CCU_GATE(bus_hci2_clk, "bus-hci2", "bus-usb", 0x0, BIT(5), 0);
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| static SUNXI_CCU_GATE(usb_ohci2_clk, "usb-ohci2", "osc24M", 0x0, BIT(6), 0);
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| 
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| static SUNXI_CCU_GATE(usb0_phy_clk, "usb0-phy", "osc24M", 0x4, BIT(1), 0);
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| static SUNXI_CCU_GATE(usb1_hsic_clk, "usb1-hsic", "osc24M", 0x4, BIT(2), 0);
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| static SUNXI_CCU_GATE(usb1_phy_clk, "usb1-phy", "osc24M", 0x4, BIT(3), 0);
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| static SUNXI_CCU_GATE(usb2_hsic_clk, "usb2-hsic", "osc24M", 0x4, BIT(4), 0);
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| static SUNXI_CCU_GATE(usb2_phy_clk, "usb2-phy", "osc24M", 0x4, BIT(5), 0);
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| static SUNXI_CCU_GATE(usb_hsic_clk, "usb-hsic", "osc24M", 0x4, BIT(10), 0);
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| 
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| static struct ccu_common *sun9i_a80_usb_clks[] = {
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| 	&bus_hci0_clk.common,
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| 	&usb_ohci0_clk.common,
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| 	&bus_hci1_clk.common,
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| 	&bus_hci2_clk.common,
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| 	&usb_ohci2_clk.common,
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| 
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| 	&usb0_phy_clk.common,
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| 	&usb1_hsic_clk.common,
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| 	&usb1_phy_clk.common,
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| 	&usb2_hsic_clk.common,
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| 	&usb2_phy_clk.common,
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| 	&usb_hsic_clk.common,
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| };
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| 
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| static struct clk_hw_onecell_data sun9i_a80_usb_hw_clks = {
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| 	.hws	= {
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| 		[CLK_BUS_HCI0]	= &bus_hci0_clk.common.hw,
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| 		[CLK_USB_OHCI0]	= &usb_ohci0_clk.common.hw,
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| 		[CLK_BUS_HCI1]	= &bus_hci1_clk.common.hw,
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| 		[CLK_BUS_HCI2]	= &bus_hci2_clk.common.hw,
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| 		[CLK_USB_OHCI2]	= &usb_ohci2_clk.common.hw,
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| 
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| 		[CLK_USB0_PHY]	= &usb0_phy_clk.common.hw,
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| 		[CLK_USB1_HSIC]	= &usb1_hsic_clk.common.hw,
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| 		[CLK_USB1_PHY]	= &usb1_phy_clk.common.hw,
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| 		[CLK_USB2_HSIC]	= &usb2_hsic_clk.common.hw,
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| 		[CLK_USB2_PHY]	= &usb2_phy_clk.common.hw,
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| 		[CLK_USB_HSIC]	= &usb_hsic_clk.common.hw,
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| 	},
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| 	.num	= CLK_NUMBER,
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| };
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| 
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| static struct ccu_reset_map sun9i_a80_usb_resets[] = {
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| 	[RST_USB0_HCI]		= { 0x0, BIT(17) },
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| 	[RST_USB1_HCI]		= { 0x0, BIT(18) },
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| 	[RST_USB2_HCI]		= { 0x0, BIT(19) },
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| 
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| 	[RST_USB0_PHY]		= { 0x4, BIT(17) },
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| 	[RST_USB1_HSIC]		= { 0x4, BIT(18) },
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| 	[RST_USB1_PHY]		= { 0x4, BIT(19) },
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| 	[RST_USB2_HSIC]		= { 0x4, BIT(20) },
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| 	[RST_USB2_PHY]		= { 0x4, BIT(21) },
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| };
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| 
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| static const struct sunxi_ccu_desc sun9i_a80_usb_clk_desc = {
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| 	.ccu_clks	= sun9i_a80_usb_clks,
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| 	.num_ccu_clks	= ARRAY_SIZE(sun9i_a80_usb_clks),
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| 
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| 	.hw_clks	= &sun9i_a80_usb_hw_clks,
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| 
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| 	.resets		= sun9i_a80_usb_resets,
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| 	.num_resets	= ARRAY_SIZE(sun9i_a80_usb_resets),
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| };
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| 
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| static int sun9i_a80_usb_clk_probe(struct platform_device *pdev)
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| {
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| 	struct resource *res;
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| 	struct clk *bus_clk;
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| 	void __iomem *reg;
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| 	int ret;
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| 
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| 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| 	reg = devm_ioremap_resource(&pdev->dev, res);
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| 	if (IS_ERR(reg))
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| 		return PTR_ERR(reg);
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| 
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| 	bus_clk = devm_clk_get(&pdev->dev, "bus");
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| 	if (IS_ERR(bus_clk)) {
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| 		ret = PTR_ERR(bus_clk);
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| 		if (ret != -EPROBE_DEFER)
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| 			dev_err(&pdev->dev, "Couldn't get bus clk: %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	/* The bus clock needs to be enabled for us to access the registers */
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| 	ret = clk_prepare_enable(bus_clk);
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| 	if (ret) {
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| 		dev_err(&pdev->dev, "Couldn't enable bus clk: %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	ret = sunxi_ccu_probe(pdev->dev.of_node, reg,
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| 			      &sun9i_a80_usb_clk_desc);
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| 	if (ret)
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| 		goto err_disable_clk;
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| 
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| 	return 0;
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| 
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| err_disable_clk:
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| 	clk_disable_unprepare(bus_clk);
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| 	return ret;
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| }
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| 
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| static const struct of_device_id sun9i_a80_usb_clk_ids[] = {
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| 	{ .compatible = "allwinner,sun9i-a80-usb-clks" },
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| 	{ }
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| };
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| 
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| static struct platform_driver sun9i_a80_usb_clk_driver = {
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| 	.probe	= sun9i_a80_usb_clk_probe,
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| 	.driver	= {
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| 		.name	= "sun9i-a80-usb-clks",
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| 		.of_match_table	= sun9i_a80_usb_clk_ids,
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| 	},
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| };
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| builtin_platform_driver(sun9i_a80_usb_clk_driver);
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