211 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			211 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
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 *	Peter Barada <peter.barada@logicpd.com>
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 *
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 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
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 * reference boards.
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 */
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* High Level Configuration Options */
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#include <configs/ti_omap3_common.h>
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/*
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 * We are only ever GP parts and will utilize all of the "downloaded image"
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 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
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 * order to allow for BCH8 to fit in.
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 */
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#undef CONFIG_SPL_TEXT_BASE
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#define CONFIG_SPL_TEXT_BASE		0x40200000
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#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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/* Hardware drivers */
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/* I2C */
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#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM AT24C64      */
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/* Board NAND Info. */
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#ifdef CONFIG_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE	1	  /* Max number of */
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						  /* NAND devices */
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT	64
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#define CONFIG_SYS_NAND_PAGE_SIZE	2048
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#define CONFIG_SYS_NAND_OOBSIZE		64
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#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
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					 13, 14, 16, 17, 18, 19, 20, 21, 22, \
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					 23, 24, 25, 26, 27, 28, 30, 31, 32, \
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					 33, 34, 35, 36, 37, 38, 39, 40, 41, \
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					 42, 44, 45, 46, 47, 48, 49, 50, 51, \
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					 52, 53, 54, 55, 56}
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#define CONFIG_SYS_NAND_ECCSIZE		512
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#define CONFIG_SYS_NAND_ECCBYTES	13
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#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
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#define CONFIG_SYS_NAND_MAX_OOBFREE	2
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#define CONFIG_SYS_NAND_MAX_ECCPOS	56
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#endif
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/* Environment information */
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#define CONFIG_PREBOOT \
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	"setenv preboot;"						\
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	"saveenv;"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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	DEFAULT_LINUX_BOOT_ENV \
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	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"	\
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	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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	"mmcdev=0\0" \
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	"mmcroot=/dev/mmcblk0p2 rw\0" \
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	"mmcrootfstype=ext4 rootwait\0" \
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	"nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
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	"nandrootfstype=ubifs rootwait\0" \
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	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
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			"if run loadbootscript; then " \
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				"run bootscript; " \
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			"else " \
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				"run defaultboot;" \
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			"fi; " \
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		"else run defaultboot; fi\0" \
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	"defaultboot=run mmcramboot\0" \
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	"consoledevice=ttyS0\0" \
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	"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
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	"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
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	"rotation=0\0" \
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	"vrfb_arg=if itest ${rotation} -ne 0; then " \
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		"setenv bootargs ${bootargs} omapfb.vrfb=y " \
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		"omapfb.rotate=${rotation}; " \
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		"fi\0" \
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	"optargs=ignore_loglevel early_printk no_console_suspend\0" \
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	"common_bootargs=run setconsole; setenv bootargs " \
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		"${bootargs} "\
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		"console=${console} " \
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		"${mtdparts} "\
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		"${optargs}; " \
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		"run vrfb_arg\0" \
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	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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	"bootscript=echo 'Running bootscript from mmc ...'; " \
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		"source ${loadaddr}\0" \
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	"loadimage=mmc rescan; " \
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		"load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
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	"ramdisksize=64000\0" \
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	"ramdiskimage=rootfs.ext2.gz.uboot\0" \
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	"loadramdisk=mmc rescan; " \
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		"load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
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	"ramargs=setenv bootargs "\
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		"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
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	"mmcargs=setenv bootargs "\
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		"root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
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	"nandargs=setenv bootargs "\
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		"root=${nandroot} " \
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		"rootfstype=${nandrootfstype}\0" \
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	"nfsargs=setenv serverip ${tftpserver}; " \
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		"setenv bootargs root=/dev/nfs " \
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		"nfsroot=${nfsrootpath} " \
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		"ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
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	"nfsrootpath=/opt/nfs-exports/omap\0" \
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	"autoload=no\0" \
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	"fdtimage=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
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	"loadfdt=mmc rescan; " \
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		"load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
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	"mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \
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		"run mmcargs; " \
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		"run common_bootargs; " \
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		"run dump_bootargs; " \
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		"run loadimage; " \
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		"run loadfdt;\0 " \
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	"mmcbootz=setenv bootfile zImage; " \
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		"run mmcbootcommon; "\
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		"bootz ${loadaddr} - ${fdtaddr}\0" \
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	"mmcboot=setenv bootfile uImage; "\
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		"run mmcbootcommon; "\
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		"bootm ${loadaddr} - ${fdtaddr}\0" \
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	"mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \
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		"run ramargs; " \
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		"run common_bootargs; " \
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		"run dump_bootargs; " \
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		"run loadimage; " \
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		"run loadfdt; " \
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		"run loadramdisk\0" \
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	"mmcramboot=setenv bootfile uImage; " \
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		"run mmcrambootcommon; " \
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		"bootm ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
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	"mmcrambootz=setenv bootfile zImage; " \
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		"run mmcrambootcommon; " \
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		"bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
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	"tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
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		"run ramargs; " \
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		"run common_bootargs; " \
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		"run dump_bootargs; " \
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		"tftpboot ${loadaddr} ${zimage}; " \
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		"tftpboot ${rdaddr} ${ramdiskimage}; " \
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		"bootm ${loadaddr} ${rdaddr}\0" \
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	"tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
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		"dhcp;" \
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		"run nfsargs;" \
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		"run common_bootargs;" \
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		"run dump_bootargs;" \
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		"tftpboot $loadaddr zImage;" \
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		"bootz $loadaddr\0" \
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	"nandbootcommon=echo 'Booting kernel from NAND...';" \
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		"run nandargs;" \
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		"run common_bootargs;" \
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		"run dump_bootargs;" \
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		"nand read ${loadaddr} kernel;" \
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		"nand read ${fdtaddr} spl-os;\0" \
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	"nandbootz=run nandbootcommon; "\
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		"bootz ${loadaddr} - ${fdtaddr}\0"\
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	"nandboot=run nandbootcommon; "\
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		"bootm ${loadaddr} - ${fdtaddr}\0"\
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#define CONFIG_BOOTCOMMAND \
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	"run autoboot"
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/* Miscellaneous configurable options */
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
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#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
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					0x01F00000) /* 31MB */
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/* FLASH and environment organization */
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/* **** PISMO SUPPORT *** */
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#if defined(CONFIG_CMD_NAND)
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#define CONFIG_SYS_FLASH_BASE		0x10000000
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#endif
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#define CONFIG_SYS_MAX_FLASH_SECT	256
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#define CONFIG_SYS_MAX_FLASH_BANKS	1
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#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
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#define CONFIG_SYS_FLASH_SIZE		0x4000000
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/* Monitor at start of flash */
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#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
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#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
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#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
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#define CONFIG_ENV_OFFSET		0x260000
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#define CONFIG_ENV_ADDR			0x260000
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/* Defines for SPL */
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
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#endif
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#endif /* __CONFIG_H */
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