219 lines
5.7 KiB
ArmAsm
Executable File
219 lines
5.7 KiB
ArmAsm
Executable File
/*
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* Copyright (C) 2008 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef ALIGN
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#define ALIGN .align 4
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#endif
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#ifndef ENTRY
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#define ENTRY(name) \
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.globl name; \
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ALIGN; \
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name:
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#endif
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#ifndef WEAK
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#define WEAK(name) \
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.weak name; \
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name:
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#endif
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#ifndef END
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#define END(name) \
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.size name, .-name
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#endif
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#define ENDPROC(name) \
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.type name, %function; \
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END(name)
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#if defined(__ARM_NEON__)
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.fpu neon
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#endif
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ENTRY(bzero)
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mov r2, r1
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mov r1, #0
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// Fall through to memset...
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END(bzero)
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ENTRY(memset)
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.fnstart
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#if defined(__ARM_NEON__)
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#ifdef NEON_MEMSET_DIVIDER
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cmp r2, #NEON_MEMSET_DIVIDER
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bhi 11f
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#endif
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.save {r0}
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stmfd sp!, {r0}
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vdup.8 q0, r1
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#ifndef NEON_UNALIGNED_ACCESS
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/* do we have at least 16-bytes to write (needed for alignment below) */
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cmp r2, #16
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blo 3f
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/* align destination to 16 bytes for the write-buffer */
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rsb r3, r0, #0
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ands r3, r3, #0xF
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beq 2f
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/* write up to 15-bytes (count in r3) */
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sub r2, r2, r3
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movs ip, r3, lsl #31
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strmib r1, [r0], #1
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strcsb r1, [r0], #1
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strcsb r1, [r0], #1
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movs ip, r3, lsl #29
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bge 1f
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// writes 4 bytes, 32-bits aligned
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vst1.32 {d0[0]}, [r0, :32]!
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1: bcc 2f
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// writes 8 bytes, 64-bits aligned
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vst1.8 {d0}, [r0, :64]!
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2:
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#endif
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/* make sure we have at least 32 bytes to write */
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subs r2, r2, #32
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blo 2f
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vmov q1, q0
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1: /* The main loop writes 32 bytes at a time */
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subs r2, r2, #32
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#ifndef NEON_UNALIGNED_ACCESS
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vst1.8 {d0 - d3}, [r0, :128]!
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#else
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vst1.8 {d0 - d3}, [r0]!
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#endif
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bhs 1b
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2: /* less than 32 left */
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add r2, r2, #32
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tst r2, #0x10
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beq 3f
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// writes 16 bytes, 128-bits aligned
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#ifndef NEON_UNALIGNED_ACCESS
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vst1.8 {d0, d1}, [r0, :128]!
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#else
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vst1.8 {d0, d1}, [r0]!
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#endif
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3: /* write up to 15-bytes (count in r2) */
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movs ip, r2, lsl #29
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bcc 1f
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vst1.8 {d0}, [r0]!
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1: bge 2f
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vst1.32 {d0[0]}, [r0]!
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2: movs ip, r2, lsl #31
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strmib r1, [r0], #1
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strcsb r1, [r0], #1
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strcsb r1, [r0], #1
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ldmfd sp!, {r0}
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bx lr
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11:
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#endif
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/*
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* Optimized memset() for ARM.
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*
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* memset() returns its first argument.
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*/
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/* compute the offset to align the destination
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* offset = (4-(src&3))&3 = -src & 3
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*/
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.save {r0, r4-r7, lr}
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stmfd sp!, {r0, r4-r7, lr}
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rsb r3, r0, #0
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ands r3, r3, #3
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cmp r3, r2
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movhi r3, r2
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/* splat r1 */
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mov r1, r1, lsl #24
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orr r1, r1, r1, lsr #8
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orr r1, r1, r1, lsr #16
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movs r12, r3, lsl #31
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strcsb r1, [r0], #1 /* can't use strh (alignment unknown) */
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strcsb r1, [r0], #1
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strmib r1, [r0], #1
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subs r2, r2, r3
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ldmlsfd sp!, {r0, r4-r7, lr} /* return */
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bxls lr
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/* align the destination to a cache-line */
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mov r12, r1
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mov lr, r1
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mov r4, r1
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mov r5, r1
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mov r6, r1
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mov r7, r1
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rsb r3, r0, #0
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ands r3, r3, #0x1C
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beq 3f
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cmp r3, r2
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andhi r3, r2, #0x1C
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sub r2, r2, r3
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/* conditionally writes 0 to 7 words (length in r3) */
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movs r3, r3, lsl #28
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stmcsia r0!, {r1, lr}
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stmcsia r0!, {r1, lr}
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stmmiia r0!, {r1, lr}
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movs r3, r3, lsl #2
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strcs r1, [r0], #4
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3:
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subs r2, r2, #32
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mov r3, r1
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bmi 2f
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1: subs r2, r2, #32
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stmia r0!, {r1,r3,r4,r5,r6,r7,r12,lr}
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bhs 1b
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2: add r2, r2, #32
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/* conditionally stores 0 to 31 bytes */
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movs r2, r2, lsl #28
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stmcsia r0!, {r1,r3,r12,lr}
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stmmiia r0!, {r1, lr}
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movs r2, r2, lsl #2
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strcs r1, [r0], #4
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strmih r1, [r0], #2
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movs r2, r2, lsl #2
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strcsb r1, [r0]
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ldmfd sp!, {r0, r4-r7, lr}
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bx lr
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END(memset)
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