219 lines
6.6 KiB
C
219 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the phytec PCM-052 SoM.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/* Enable passing of ATAGs */
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#define CONFIG_CMDLINE_TAG
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* NAND support */
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
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#define CONFIG_JFFS2_NAND
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/* Dynamic MTD partition support */
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#endif
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 1
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/*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_FEC_MXC_PHYADDR 0
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/* QSPI Configs*/
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#ifdef CONFIG_FSL_QSPI
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#define FSL_QSPI_FLASH_SIZE (1 << 24)
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#define FSL_QSPI_FLASH_NUM 2
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#define CONFIG_SYS_FSL_QSPI_LE
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#endif
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC_I2C3
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#define CONFIG_SYS_I2C_MXC
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/* RTC (actually an RV-4162 but M41T62-compatible) */
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_RTC_BUS_NUM 2
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/* EEPROM (24FC256) */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_EEPROM_BUS 2
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#define CONFIG_LOADADDR 0x82000000
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/* We boot from the gfxRAM area of the OCRAM. */
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#define CONFIG_BOARD_SIZE_LIMIT 520192
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/* if no target-specific extra environment settings were defined by the
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target, define an empty one */
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#ifndef PCM052_EXTRA_ENV_SETTINGS
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#define PCM052_EXTRA_ENV_SETTINGS
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#endif
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/* if no target-specific boot command was defined by the target,
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define an empty one */
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#ifndef PCM052_BOOTCOMMAND
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#define PCM052_BOOTCOMMAND
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#endif
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/* if no target-specific extra environment settings were defined by the
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target, define an empty one */
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#ifndef PCM052_NET_INIT
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#define PCM052_NET_INIT
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#endif
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/* boot command, including the target-defined one if any */
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#define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
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/* Extra env settings (including the target-defined ones if any) */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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PCM052_EXTRA_ENV_SETTINGS \
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"autoload=no\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"blimg_file=u-boot.vyb\0" \
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"blimg_addr=0x81000000\0" \
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"kernel_file=zImage\0" \
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"kernel_addr=0x82000000\0" \
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"fdt_file=zImage.dtb\0" \
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"fdt_addr=0x81000000\0" \
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"ram_file=uRamdisk\0" \
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"ram_addr=0x83000000\0" \
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"filesys=rootfs.ubifs\0" \
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"sys_addr=0x81000000\0" \
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"tftploc=/path/to/tftp/directory/\0" \
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"nfs_root=/path/to/nfs/root\0" \
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"tftptimeout=1000\0" \
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"tftptimeoutcountmax=1000000\0" \
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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"bootargs_base=setenv bootargs rw " \
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" mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
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"console=ttyLP1,115200n8\0" \
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"bootargs_sd=setenv bootargs ${bootargs} " \
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"root=/dev/mmcblk0p2 rootwait\0" \
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"bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
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"nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
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"bootargs_nand=setenv bootargs ${bootargs} " \
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"ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
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"bootargs_ram=setenv bootargs ${bootargs} " \
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"root=/dev/ram rw initrd=${ram_addr}\0" \
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"bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
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"fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
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"fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
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"bootz ${kernel_addr} - ${fdt_addr}\0" \
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"bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
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"tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
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"tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
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"bootz ${kernel_addr} - ${fdt_addr}\0" \
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"bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
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"nand read ${fdt_addr} dtb; " \
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"nand read ${kernel_addr} kernel; " \
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"bootz ${kernel_addr} - ${fdt_addr}\0" \
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"bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
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"nand read ${fdt_addr} dtb; " \
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"nand read ${kernel_addr} kernel; " \
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"nand read ${ram_addr} root; " \
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"bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
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"update_bootloader_from_tftp=" PCM052_NET_INIT \
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"if tftp ${blimg_addr} "\
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"${tftpdir}${blimg_file}; then " \
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"mtdparts default; " \
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"nand erase.part bootloader; " \
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"nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
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"update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
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"${kernel_file}; " \
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"then mtdparts default; " \
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"nand erase.part kernel; " \
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"nand write ${kernel_addr} kernel ${filesize}; " \
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"if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
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"nand erase.part dtb; " \
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"nand write ${fdt_addr} dtb ${filesize}; fi\0" \
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"update_kernel_from_tftp=" PCM052_NET_INIT \
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"if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
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"then setenv fdtsize ${filesize}; " \
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"if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
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"mtdparts default; " \
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"nand erase.part dtb; " \
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"nand write ${fdt_addr} dtb ${fdtsize}; " \
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"nand erase.part kernel; " \
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"nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
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"update_rootfs_from_tftp=" PCM052_NET_INIT \
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"if tftp ${sys_addr} ${tftpdir}${filesys}; " \
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"then mtdparts default; " \
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"nand erase.part root; " \
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"ubi part root; " \
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"ubi create rootfs; " \
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"ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
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"update_ramdisk_from_tftp=" PCM052_NET_INIT \
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"if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
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"then mtdparts default; " \
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"nand erase.part root; " \
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"nand write ${ram_addr} root ${filesize}; fi\0"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_MEMTEST_START 0x80010000
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#define CONFIG_SYS_MEMTEST_END 0x87C00000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Physical memory map */
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#define PHYS_SDRAM (0x80000000)
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#define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* environment organization */
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#ifdef CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#endif
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#ifdef CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_OFFSET 0xA0000
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#define CONFIG_ENV_SIZE_REDUND (8 * 1024)
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#define CONFIG_ENV_OFFSET_REDUND 0xC0000
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#endif
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#endif
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