526 lines
18 KiB
C
526 lines
18 KiB
C
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#ifndef __NVT_MMC_INFO_H
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#define __NVT_MMC_INFO_H
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#include <asm/types.h>
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/*
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* EXT_CSD field definitions
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*/
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#define EXT_CSD_FFU_INSTALL (0x01)
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#define EXT_CSD_FFU_MODE (0x01)
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#define EXT_CSD_NORMAL_MODE (0x00)
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#define EXT_CSD_FFU (1<<0)
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#define EXT_CSD_UPDATE_DISABLE (1<<0)
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#define EXT_CSD_HPI_SUPP (1<<0)
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#define EXT_CSD_HPI_IMPL (1<<1)
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//#define EXT_CSD_CMD_SET_NORMAL (1<<0)
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#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
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#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
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#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
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#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
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#define EXT_CSD_BOOT_INFO_HS_MODE (1<<2)
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#define EXT_CSD_BOOT_INFO_DDR_DDR (1<<1)
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#define EXT_CSD_BOOT_INFO_ALT (1<<0)
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#define EXT_CSD_BOOT_CFG_ACK (1<<6)
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#define EXT_CSD_BOOT_CFG_EN (0x38)
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#define EXT_CSD_BOOT_CFG_ACC (0x07)
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#define EXT_CSD_RST_N_EN_MASK (0x03)
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#define EXT_CSD_HW_RESET_EN (0x01)
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#define EXT_CSD_HW_RESET_DIS (0x02)
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#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
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#define EXT_CSD_PART_CONFIG_ACC_NONE (0x0)
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#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
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#define EXT_CSD_PART_CONFIG_ACC_BOOT1 (0x2)
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#define EXT_CSD_PART_CONFIG_ACC_USER_AREA (0x7)
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#define EXT_CSD_PART_CONFIG_ACC_ACK (0x40)
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#define EXT_CSD_PARTITIONING_EN (1<<0)
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#define EXT_CSD_ENH_ATTRIBUTE_EN (1<<1)
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#define EXT_CSD_ENH_4 (1<<4)
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#define EXT_CSD_ENH_3 (1<<3)
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#define EXT_CSD_ENH_2 (1<<2)
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#define EXT_CSD_ENH_1 (1<<1)
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//#define EXT_CSD_ENH_USR (1<<0)
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#define EXT_CSD_REV_V5_1 8
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#define EXT_CSD_REV_V5_0 7
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#define EXT_CSD_REV_V4_5 6
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#define EXT_CSD_REV_V4_4_1 5
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#define EXT_CSD_REV_V4_3 3
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#define EXT_CSD_REV_V4_2 2
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#define EXT_CSD_REV_V4_1 1
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#define EXT_CSD_REV_V4_0 0
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char *secure_remova_type[] = {
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"information removed by an erase of the physical memory",
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"information removed by an overwriting the addressed locations with a character"
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"followed by an erase",
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"information removed by an overwriting the addressed locations with a character, its"
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"complement, then a random character",
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"information removed using a vendor defined"
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};
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char *mode_config[] = {
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"Normal Mode",
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"FFU Mode",
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"Vendor Specific Mode",
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"Reserved"
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};
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char *power_off_notification[] = {
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"NO_POWER_NOTIFICATION",
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"POWERED_ON",
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"POWER_OFF_SHORT",
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"POWER_OFF_LONG",
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"SLEEP_NOTIFICATION"
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};
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char *context_conf[] = {
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"Context is closed and is no longer active",
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"Context is configured and activated as a write-only context and according to the rest of the "
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"bits in this configuration register",
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"Context is configured and activated as a read-only context and according to the rest of the "
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"bits in this configuration register",
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"Context is configured and activated as a read/write context and according to the rest of the"
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"bits in this configuration register",
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"Context is not following Large Unit rules",
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"Context follows Large Unit rules",
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"MODE0 (normal)",
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"MODE1 (non-Large Unit, reliable mode or Large Unit unit-by-unit mode)",
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"MODE2 (Large Unit, one-unit-tail mode)",
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"Reserved"
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};
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char *ext_partition_attribute[] = {
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"Default (no extended attribute)",
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"System code",
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"Non-persistent",
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"Reserved"
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};
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char *exception_events_status[] = {
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"URGENT_BKOPS",
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"DYNCAP_NEEDED",
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"SYSPOOL_EXHAUSTED",
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"PACKED_FAILURE",
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"EXTENDED_SECURITY_FAILURE",
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"Reserved"
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};
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char *exception_events_ctrl[] = {
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"Reserved",
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"DYNCAP_EVENT_EN",
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"SYSPOOL_EVENT_EN",
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"PACKED_EVENT_EN",
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"EXTENDED_SECURITY_EN",
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"Reserved"
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};
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char *periodic_weakup[] = {
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"infinity (no wakeups).",
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"months",
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"weeks",
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"days",
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"hours",
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"minutes",
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"Reserved",
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"Reserved"
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};
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char *partition_attribute[] = {
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"Default.",
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"Set Enhanced attribute in User Data Area",
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"Default.",
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"Set Enhanced attribute in General Purpose partition 1",
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"Default.",
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"Set Enhanced attribute in General Purpose partition 2",
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"Default.",
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"Set Enhanced attribute in General Purpose partition 3",
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"Default.",
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"Set Enhanced attribute in General Purpose partition 4",
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"Reserved"
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};
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char *partition_support[] = {
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"obsolete.",
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"Device supports partitioning features",
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"obsolete",
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"Device can have enhanced technological features in partitions and user data area",
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"n/a.",
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"Device can have extended partitions attribute",
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"Reserved"
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};
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char *hpi_mgmt[] = {
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"HPI mechanism not activated by the host (default)",
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"HPI mechanism activated by the host",
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"Reserved"
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};
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char *rst_n_function[] = {
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"RST_n signal is temporarily disabled (default)",
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"RST_n signal is permanently enabled",
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"RST_n signal is permanently disabled",
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"Reserved"
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};
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char *bkops_en[] = {
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"Host does not support background operations handling and is not expected to write to "
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"BKOPS_START field.",
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"Host is indicating that it shall periodically write to BKOPS_START field to manually start"
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"background operations.",
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"Device shall not perform background operations while not servicing the host.",
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"Device may perform background operations while not servicing the host.",
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"Reserved"
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};
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char *wr_rel_param[] = {
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"obsolete",
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"All the WR_DATA_REL parameters in the WR_REL_SET registers are R/W.",
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"obsolete",
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"The device supports the enhanced definition of reliable write",
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"RPMB transfer size is either 256B (single 512B frame) or 512B (two 512B frame).",
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"RPMB transfer size is either 256B (single 512B frame), 512B (two 512B frame), or 8KB (Thirty two 512B frames).",
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"Reserved"
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};
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char *wr_rel_set[] = {
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"In the main user area, write operations have been optimized for performance and existing"
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"data could be at risk if a power failure occurs.",
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"In the main user area, the device protects previously written data if power failure occurs.",
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"In general purpose partition 1, the write operation has been optimized for performance and"
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"existing data in the partition could be at risk if a power failure occurs.",
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"In general purpose partition 1, the device protects previously written data if power failure occurs",
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"In general purpose partition 2, the write operation has been optimized for performance and"
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"existing data in the partition could be at risk if a power failure occurs.",
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"In general purpose partition 2, the device protects previously written data if power failure occurs.",
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"In general purpose partition 3, the write operation has been optimized for performance and"
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"existing data in the partition could be at risk if a power failure occurs.",
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"In general purpose partition 3, the device protects previously written data if power failure occurs",
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"In general purpose partition 4, the write operation has been optimized for performance and"
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"existing data in the partition could be at risk if a power failure occurs",
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"In general purpose partition 4, the device protects previously written data if power failure occurs",
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"Reserved Bit"
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};
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char *user_wp_status[] = {
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"Power-on write protection is not applied when CMD28 is issued",
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"Apply Power-On Period protection to the protection group indicated by CMD28.",
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"Permanent write protection is not applied when CMD28 is issued.",
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"Apply permanent write protection to the protection group indicated by CMD28.",
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"Power-on write protection can be applied to write protection groups.",
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"Disable the use of power-on period write protection for write protection groups",
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"Permanent write protection can be applied to write protection groups.",
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"Permanently disable the use of permanent write protection for write protection groups",
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"Host is permitted to set PERM_WRITE_PROTECT (CSD[13]).",
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"Disable the use of PERM_WRITE_PROTECT (CSD[13]).",
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"Password protection features are enabled.",
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"Password protection features (ERASE (Forcing erase), LOCK, UNLOCK, CLR_PWD,SET_PWD) are disabled permanently."
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};
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char *boot_wp_status[] = {
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"Boot Area 1 is not protected",
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"Boot Area 1 is Power on protected",
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"Boot Area 1 is Permanently Protected",
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"Reserved",
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"Boot Area 2 is not protected",
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"Boot Area 2 is Power on protected",
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"Boot Area 2 is Permanently Protected",
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"Reserved"
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"Reserved"
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};
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char *boot_bus_conditions[] = {
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"x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)",
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"x4 (sdr/ddr) bus width in boot operation mode",
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"x8 (sdr/ddr) bus width in boot operation mode",
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"Reserved",
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"Reset bus width to x1, single data rate and backward compatible timings after boot operation (default)",
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"Retain BOOT_BUS_WIDTH and BOOT_MODE values after boot operation.",
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"Use single data rate + backward compatible timings in boot operation (default)",
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"Use single data rate + High Speed timings in boot operation mode",
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"Use dual data rate in boot operation",
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"Reserved"
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};
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char *boot_config_prot[] = {
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"PWR_BOOT_CONFIG_PROT is not enabled (default)",
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"Disable the change of boot configuration register bits relating to boot mode operation",
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"Reserved",
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"PERM_BOOT_CONFIG_PROT is not enabled (default)",
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"Permanently disable the change of boot configuration register bits relating boot mode operation",
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"Reserved"
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};
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char *partition_config[] = {
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"No access to boot partition (default)",
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"R/W boot partition 1",
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"R/W boot partition 2",
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"R/W Replay Protected Memory Block (RPMB)",
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"Access to General Purpose partition 1",
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"Access to General Purpose partition 2",
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"Access to General Purpose partition 3",
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"Access to General Purpose partition 4",
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"Device not boot enabled (default)",
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"Boot partition 1 enabled for boot",
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"Boot partition 2 enabled for boot",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"User area enabled for boot",
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"No boot acknowledge sent (default)",
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"Boot acknowledge sent during boot operation Bit",
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"Reserved"
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};
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char *strobe_support[] = {
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"No support of Enhanced Strobe mode ",
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"device supports Enhanced Strobe mode "
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};
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char *hs_timing[] = {
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"Selecting backwards compatibility interface timing",
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"High Speed",
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"HS200",
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"HS400",
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"50 ohm.(x1). Default Driver Type. Supports up to 200 MHz operation.",
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"33 ohm.(x1.5). Supports up to 200 MHz operation.",
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"66 ohm.(x0.75). The weakest driver that supports up to 200 MHz operation.",
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"100 ohm.(x0.5). For low noise and low EMI systems."
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"Maximal operating frequency is decided by Host design.",
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"40 ohm.(x1.2)."
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};
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char *cmd_set_rev[] = {
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"v4.0",
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"Reserved"
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};
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char *ext_csd_rev[] = {
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"4.0",
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"4.1",
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"4.2",
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"4.3",
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"4.41",
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"4.5",
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"5.0",
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"5.1"
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};
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char *s_cmd_set[] = {
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"Standard MMC",
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"Allocated by MMCA",
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"Allocated by MMCA",
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"Allocated by MMCA",
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"Allocated by MMCA",
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"Reserved"
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};
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char *hpi_features[] = {
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"Obsolete",
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"HPI mechanism supported (default)",
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"HPI mechanism implementation based on CMD13",
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"HPI mechanism implementation based on CMD12 "
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};
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char *data_tag_support[] = {
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"System Data Tag mechanism not supported (default)",
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"System Data Tag mechanism supported"
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};
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char *bkops_support[] = {
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"Obsolete",
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"Background operations are supported"
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};
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char *csd_structure[] = {
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"CSD version No. 1.0 (Allocated by MMCA)",
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"CSD version No. 1.1 (Allocated by MMCA)",
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"CSD version No. 1.2 (Version 4.1-4.2 4.3-4.41-4.5-4.51-5.0-5.01-5.1)",
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"Reserved for future use"
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};
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char *device_type[] = {
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"HS eMMC @26MHz - at rated device voltage(s)",
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"HS eMMC @52MHz - at rated device voltage(s)",
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"HS Dual Data Rate eMMC @52MHz 1.8V or 3V I/O",
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"HS Dual Data Rate eMMC @52MHz 1.2V I/O",
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"HS200 Single Data Rate eMMC @200MHz 1.8V I/O",
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"HS200 Single Data Rate eMMC @200MHz 1.2V I/O",
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"HS400 Dual Data Rate e‧MMC at 200 MHz 1.8V I/O",
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"HS400 Dual Data Rate e‧MMC at 200 MHz 1.2V I/O"
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};
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char *driver_strength_type[] = {
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"50 ohm.(x1). Default Driver Type. Supports up to 200 MHz operation.",
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"33 ohm.(x1.5). Supports up to 200 MHz operation.",
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"66 ohm.(x0.75).The weakest driver that supports up to 200 MHz operation.",
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"100 ohm.(x0.5). For low noise and low EMI systems."
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"Maximal operating frequency is decided by Host design.",
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"40 ohm.(x1.2)."
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};
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char *boot_info[] = {
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"Device does not support alternative boot method (obsolete)",
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"Device supports alternative boot method.",
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"Device does not support dual data rate during boot.",
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"Device supports dual data rate during boot.",
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"Device does not support high speed timing during boot.",
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"Device supports high speed timing during boot."
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};
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char *sec_feature_support[] = {
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"Secure purge operations are not supported on the device",
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"Secure purge operations are supported.",
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"Device does not support the automatic erase operation"
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"on retired defective portions of the array.",
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"Device supports the automatic erase operation on retired"
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"defective portions of the array.",
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"Device does not support the secure and insecure trim operations",
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"Device supports the secure and insecure trim operations.",
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"Device does not support the sanitize operation.",
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"Device supports the sanitize operation."
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};
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char *min_sdr_perf[] = {
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"For Devices not reaching the 2.4MB/s value",
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"Class A: 2.4MB/s and is the next allowed value (16x150kB/s)",
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"Class B: 3.0MB/s and is the next allowed value (20x150kB/s)",
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"Class C: 4.5MB/s and is the next allowed value (30x150kB/s)",
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"Class D: 6.0MB/s and is the next allowed value (40x150kB/s)",
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"Class E: 9.0MB/s and is the next allowed value (60x150kB/s)",
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"Class E: 9.0MB/s and is the next allowed value (60x150kB/s)",
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"Class F: Equals 12.0MB/s and is the next allowed value (80x150kB/s)",
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"Class G: Equals 15.0MB/s and is the next allowed value (100x150kB/s)",
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"Class H: Equals 18.0MB/s and is the next allowed value (120x150kB/s)",
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"Class J: Equals 21.0MB/s and is the next allowed value (140x150kB/s) ",
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"Class K: Equals 24.0MB/s and is the next allowed value (160x150kB/s)",
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"Class M: Equals 30.0MB/s and is the next allowed value (200x150kB/s)",
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"Class O: Equals 36.0MB/s and is the next allowed value (240x150kB/s)",
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"Class R: Equals 42.0MB/s and is the next allowed value (280x150kB/s)",
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"Class T: Equals 48.0MB/s and is the last defined value (320x150kB/s)"
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};
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char *min_ddr_perf[] = {
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"For Devices not reaching the 4.8MB/s value",
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"Class A: Equals 4.8MB/s and is the next allowed value (16x300kB/s)",
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"Class B: Equals 6.0MB/s and is the next allowed value (20x300kB/s)",
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"Class C: Equals 9.0MB/s and is the next allowed value (30x300kB/s)",
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"Class D: Equals 12.0MB/s and is the next allowed value (40x300kB/s)",
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"Class E: Equals 18.0MB/s and is the last defined value (60x300kB/s)",
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"Class F: Equals 24.0MB/s and is the next allowed value (80x300kB/s)",
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"Class G: Equals 30.0MB/s and is the next allowed value (100x300kB/s)",
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"Class H: Equals 36.0MB/s and is the next allowed value (120x300kB/s)",
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"Class J: Equals 42.0MB/s and is the last defined value (140x300kB/s)",
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"Class K: Equals 48.0MB/s and is the next allowed value (160x300kB/s)",
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"Class M: Equals 60.0MB/s and is the next allowed value (200x300kB/s)",
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"Class O: Equals 72.0MB/s and is the next allowed value (24 0x300kB/s)",
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"Class R: Equals 84.0MB/s and is the next allowed value (280x300kB/s)",
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"Class T: Equals 96.0MB/s and is the last defined value (320x300kB/s)"
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};
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char *pwr_cl_ddr52_200_360[] = {
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"100mA : 200mA",
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"120mA : 220mA",
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"150mA : 250mA",
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"180mA : 280mA",
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"200mA : 300mA",
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"220mA : 320mA",
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"250mA : 350mA",
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"300mA : 400mA",
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"350mA : 450mA",
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"400mA : 500mA",
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"450mA : 550mA",
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"500mA : 600mA",
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"600mA : 700mA",
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"700mA : 800mA",
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"800mA : 900mA",
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">800mA : >900mA"
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};
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char *pwr_cl_ddr52_200_195[] = {
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"65mA : 130mA",
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"70mA : 140mA",
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"80mA : 160mA",
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"90mA : 180mA",
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"100mA : 200mA",
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"120mA : 220mA",
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"140mA : 240mA",
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"160mA : 260mA",
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"180mA : 280mA",
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"200mA : 300mA",
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"250mA : 350mA",
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"300mA : 400mA",
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"350mA : 450mA",
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"400mA : 500mA",
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"500mA : 600mA",
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">500mA : >600mA"
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};
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char *bkops_status[] = {
|
|
"No operations required",
|
|
"Operations outstanding (non critical)",
|
|
"Operations outstanding (performance being impacted)",
|
|
"Operations outstanding (critical)",
|
|
};
|
|
char *pre_eol_info[] = {
|
|
"Not Defined",
|
|
"Normal",
|
|
"Warning",
|
|
"Urgent",
|
|
"Reserved"
|
|
};
|
|
char *life_time_typeAorB[] = {
|
|
"Not defined ",
|
|
"0% - 10% device life time used",
|
|
"10% - 20% device life time used ",
|
|
"20% - 30% device life time used",
|
|
"30% - 40% device life time used",
|
|
"40% - 50% device life time used",
|
|
"50% - 60% device life time used",
|
|
"60% - 70% device life time used",
|
|
"70% - 80% device life time used",
|
|
"80% - 90% device life time used",
|
|
"90% - 100% device life time used",
|
|
"Exceeded its maximum estimated device life time",
|
|
"Reserved"
|
|
};
|
|
|
|
typedef struct _mmc_ext_info {
|
|
char **ext_info;
|
|
u32 ext_idx;
|
|
}mmc_ext_info_t;
|
|
|
|
mmc_ext_info_t mmc_ext_cxt[] = {
|
|
{secure_remova_type, 16},
|
|
{mode_config, 30},
|
|
{power_off_notification, 34},
|
|
{context_conf, 51},
|
|
{ext_partition_attribute, 52},
|
|
{ext_partition_attribute, 53},
|
|
{exception_events_status, 54},
|
|
{exception_events_ctrl, 56},
|
|
{periodic_weakup, 131},
|
|
{partition_attribute, 156},
|
|
{partition_support, 160},
|
|
{hpi_mgmt, 161},
|
|
{rst_n_function, 162},
|
|
{bkops_en, 163},
|
|
{wr_rel_param, 166},
|
|
{wr_rel_set, 167},
|
|
{user_wp_status, 171},
|
|
{boot_wp_status, 174},
|
|
{boot_bus_conditions, 177},
|
|
{boot_config_prot, 178},
|
|
{partition_config, 179},
|
|
{strobe_support, 184},
|
|
{hs_timing, 185},
|
|
{pwr_cl_ddr52_200_195, 187},
|
|
{cmd_set_rev, 189},
|
|
{ext_csd_rev, 192},
|
|
{csd_structure, 194},
|
|
{device_type, 196},
|
|
{driver_strength_type, 197},
|
|
{pwr_cl_ddr52_200_195, 200},
|
|
{pwr_cl_ddr52_200_195, 201},
|
|
{pwr_cl_ddr52_200_360, 202},
|
|
{pwr_cl_ddr52_200_360, 203},
|
|
{min_ddr_perf, 205},
|
|
{min_ddr_perf, 206},
|
|
{min_ddr_perf, 207},
|
|
{min_ddr_perf, 208},
|
|
{min_ddr_perf, 209},
|
|
{min_ddr_perf, 210},
|
|
{boot_info, 228},
|
|
{sec_feature_support, 231},
|
|
{min_ddr_perf,234 },
|
|
{min_ddr_perf,235 },
|
|
{pwr_cl_ddr52_200_195, 236},
|
|
{pwr_cl_ddr52_200_360, 237},
|
|
{pwr_cl_ddr52_200_195, 238},
|
|
{pwr_cl_ddr52_200_360, 239},
|
|
{bkops_status, 246},
|
|
{pre_eol_info, 267},
|
|
{life_time_typeAorB, 268},
|
|
{life_time_typeAorB, 269},
|
|
{data_tag_support, 499},
|
|
{bkops_support, 502},
|
|
{hpi_features, 503},
|
|
{s_cmd_set, 504}
|
|
};
|
|
char *mmc_ext_cmd[] = {
|
|
"mmc ext all - display all extcsd info of the current eMMC device",
|
|
"mmc ext life - display life time of the current eMMC device",
|
|
"mmc ext boot - display the boot configuration of the current eMMC device",
|
|
"mmc ext wr - display the write reliability parameter of the current eMMC device",
|
|
};
|
|
|
|
#endif
|