50 lines
2.0 KiB
Plaintext
50 lines
2.0 KiB
Plaintext
* Rockchip I2S controller
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The I2S bus (Inter-IC sound bus) is a serial link for digital
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audio data transfer between devices in the system.
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Required properties:
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- compatible: should be one of the following:
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- "rockchip,rk3066-i2s": for rk3066
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- "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30
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- "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036
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- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
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- "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228
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- "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
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- "rockchip,rk3328-i2s", "rockchip,rk3066-i2s": for rk3328
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- "rockchip,rk3366-i2s", "rockchip,rk3066-i2s": for rk3366
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- "rockchip,rk3368-i2s", "rockchip,rk3066-i2s": for rk3368
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- "rockchip,rk3399-i2s", "rockchip,rk3066-i2s": for rk3399
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: should contain the I2S interrupt.
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- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: should include "tx" and "rx".
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- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
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- clock-names: should contain the following:
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- "i2s_hclk": clock for I2S BUS
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- "i2s_clk" : clock for I2S controller
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- rockchip,playback-channels: max playback channels, if not set, 8 channels default.
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- rockchip,capture-channels: max capture channels, if not set, 2 channels default.
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Required properties for controller which support multi channels
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playback/capture:
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- rockchip,grf: the phandle of the syscon node for GRF register.
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Example for rk3288 I2S controller:
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i2s@ff890000 {
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compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
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reg = <0xff890000 0x10000>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&pdma1 0>, <&pdma1 1>;
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dma-names = "tx", "rx";
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clock-names = "i2s_hclk", "i2s_clk";
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clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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rockchip,playback-channels = <8>;
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rockchip,capture-channels = <2>;
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};
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