452 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			452 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 *  Driver for the Conexant CX25821 PCIe bridge
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 *
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 *  Copyright (C) 2009 Conexant Systems Inc.
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 *  Authors  <shu.lin@conexant.com>, <hiep.huynh@conexant.com>
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 *
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 *  This program is free software; you can redistribute it and/or modify
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 *  it under the terms of the GNU General Public License as published by
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 *  the Free Software Foundation; either version 2 of the License, or
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 *  (at your option) any later version.
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 *
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 *  This program is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 *
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 *  GNU General Public License for more details.
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 */
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#ifndef __MEDUSA_REGISTERS__
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#define __MEDUSA_REGISTERS__
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/* Serial Slave Registers */
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#define	HOST_REGISTER1				0x0000
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#define	HOST_REGISTER2				0x0001
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/* Chip Configuration Registers */
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#define	CHIP_CTRL				0x0100
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#define	AFE_AB_CTRL				0x0104
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#define	AFE_CD_CTRL				0x0108
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#define	AFE_EF_CTRL				0x010C
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#define	AFE_GH_CTRL				0x0110
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#define	DENC_AB_CTRL				0x0114
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#define	BYP_AB_CTRL				0x0118
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#define	MON_A_CTRL				0x011C
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#define	DISP_SEQ_A				0x0120
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#define	DISP_SEQ_B				0x0124
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#define	DISP_AB_CNT				0x0128
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#define	DISP_CD_CNT				0x012C
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#define	DISP_EF_CNT				0x0130
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#define	DISP_GH_CNT				0x0134
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#define	DISP_IJ_CNT				0x0138
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#define	PIN_OE_CTRL				0x013C
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#define	PIN_SPD_CTRL				0x0140
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#define	PIN_SPD_CTRL2				0x0144
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#define	IRQ_STAT_CTRL				0x0148
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#define	POWER_CTRL_AB				0x014C
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#define	POWER_CTRL_CD				0x0150
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#define	POWER_CTRL_EF				0x0154
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#define	POWER_CTRL_GH				0x0158
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#define	TUNE_CTRL				0x015C
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#define	BIAS_CTRL				0x0160
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#define	AFE_AB_DIAG_CTRL			0x0164
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#define	AFE_CD_DIAG_CTRL			0x0168
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#define	AFE_EF_DIAG_CTRL			0x016C
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#define	AFE_GH_DIAG_CTRL			0x0170
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#define	PLL_AB_DIAG_CTRL			0x0174
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#define	PLL_CD_DIAG_CTRL			0x0178
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#define	PLL_EF_DIAG_CTRL			0x017C
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#define	PLL_GH_DIAG_CTRL			0x0180
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#define	TEST_CTRL				0x0184
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#define	BIST_STAT				0x0188
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#define	BIST_STAT2				0x018C
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#define	BIST_VID_PLL_AB_STAT			0x0190
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#define	BIST_VID_PLL_CD_STAT			0x0194
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#define	BIST_VID_PLL_EF_STAT			0x0198
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#define	BIST_VID_PLL_GH_STAT			0x019C
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#define	DLL_DIAG_CTRL				0x01A0
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#define	DEV_CH_ID_CTRL				0x01A4
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#define	ABIST_CTRL_STATUS			0x01A8
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#define	ABIST_FREQ				0x01AC
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#define	ABIST_GOERT_SHIFT			0x01B0
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#define	ABIST_COEF12				0x01B4
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#define	ABIST_COEF34				0x01B8
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#define	ABIST_COEF56				0x01BC
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#define	ABIST_COEF7_SNR				0x01C0
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#define	ABIST_ADC_CAL				0x01C4
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#define	ABIST_BIN1_VGA0				0x01C8
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#define	ABIST_BIN2_VGA1				0x01CC
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#define	ABIST_BIN3_VGA2				0x01D0
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#define	ABIST_BIN4_VGA3				0x01D4
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#define	ABIST_BIN5_VGA4				0x01D8
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#define	ABIST_BIN6_VGA5				0x01DC
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#define	ABIST_BIN7_VGA6				0x01E0
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#define	ABIST_CLAMP_A				0x01E4
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#define	ABIST_CLAMP_B				0x01E8
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#define	ABIST_CLAMP_C				0x01EC
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#define	ABIST_CLAMP_D				0x01F0
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#define	ABIST_CLAMP_E				0x01F4
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#define	ABIST_CLAMP_F				0x01F8
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/* Digital Video Encoder A Registers */
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#define	DENC_A_REG_1				0x0200
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#define	DENC_A_REG_2				0x0204
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#define	DENC_A_REG_3				0x0208
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#define	DENC_A_REG_4				0x020C
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#define	DENC_A_REG_5				0x0210
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#define	DENC_A_REG_6				0x0214
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#define	DENC_A_REG_7				0x0218
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#define	DENC_A_REG_8				0x021C
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/* Digital Video Encoder B Registers */
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#define	DENC_B_REG_1				0x0300
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#define	DENC_B_REG_2				0x0304
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#define	DENC_B_REG_3				0x0308
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#define	DENC_B_REG_4				0x030C
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#define	DENC_B_REG_5				0x0310
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#define	DENC_B_REG_6				0x0314
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#define	DENC_B_REG_7				0x0318
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#define	DENC_B_REG_8				0x031C
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/* Video Decoder A Registers */
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#define	MODE_CTRL				0x1000
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#define	OUT_CTRL1				0x1004
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#define	OUT_CTRL_NS				0x1008
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#define	GEN_STAT				0x100C
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#define	INT_STAT_MASK				0x1010
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#define	LUMA_CTRL				0x1014
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#define	CHROMA_CTRL				0x1018
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#define	CRUSH_CTRL				0x101C
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#define	HORIZ_TIM_CTRL				0x1020
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#define	VERT_TIM_CTRL				0x1024
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#define	MISC_TIM_CTRL				0x1028
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#define	FIELD_COUNT				0x102C
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#define	HSCALE_CTRL				0x1030
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#define	VSCALE_CTRL				0x1034
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#define	MAN_VGA_CTRL				0x1038
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#define	MAN_AGC_CTRL				0x103C
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#define	DFE_CTRL1				0x1040
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#define	DFE_CTRL2				0x1044
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#define	DFE_CTRL3				0x1048
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#define	PLL_CTRL				0x104C
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#define	PLL_CTRL_FAST				0x1050
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#define	HTL_CTRL				0x1054
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#define	SRC_CFG					0x1058
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#define	SC_STEP_SIZE				0x105C
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#define	SC_CONVERGE_CTRL			0x1060
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#define	SC_LOOP_CTRL				0x1064
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#define	COMB_2D_HFS_CFG				0x1068
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#define	COMB_2D_HFD_CFG				0x106C
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#define	COMB_2D_LF_CFG				0x1070
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#define	COMB_2D_BLEND				0x1074
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#define	COMB_MISC_CTRL				0x1078
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#define	COMB_FLAT_THRESH_CTRL			0x107C
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#define	COMB_TEST				0x1080
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#define	BP_MISC_CTRL				0x1084
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#define	VCR_DET_CTRL				0x1088
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#define	NOISE_DET_CTRL				0x108C
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#define	COMB_FLAT_NOISE_CTRL			0x1090
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#define	VERSION					0x11F8
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#define	SOFT_RST_CTRL				0x11FC
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/* Video Decoder B Registers */
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#define	VDEC_B_MODE_CTRL			0x1200
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#define	VDEC_B_OUT_CTRL1			0x1204
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#define	VDEC_B_OUT_CTRL_NS			0x1208
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#define	VDEC_B_GEN_STAT				0x120C
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#define	VDEC_B_INT_STAT_MASK			0x1210
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#define	VDEC_B_LUMA_CTRL			0x1214
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#define	VDEC_B_CHROMA_CTRL			0x1218
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#define	VDEC_B_CRUSH_CTRL			0x121C
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#define	VDEC_B_HORIZ_TIM_CTRL			0x1220
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#define	VDEC_B_VERT_TIM_CTRL			0x1224
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#define	VDEC_B_MISC_TIM_CTRL			0x1228
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#define	VDEC_B_FIELD_COUNT			0x122C
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#define	VDEC_B_HSCALE_CTRL			0x1230
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#define	VDEC_B_VSCALE_CTRL			0x1234
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#define	VDEC_B_MAN_VGA_CTRL			0x1238
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#define	VDEC_B_MAN_AGC_CTRL			0x123C
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#define	VDEC_B_DFE_CTRL1			0x1240
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#define	VDEC_B_DFE_CTRL2			0x1244
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#define	VDEC_B_DFE_CTRL3			0x1248
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#define	VDEC_B_PLL_CTRL				0x124C
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#define	VDEC_B_PLL_CTRL_FAST			0x1250
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#define	VDEC_B_HTL_CTRL				0x1254
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#define	VDEC_B_SRC_CFG				0x1258
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#define	VDEC_B_SC_STEP_SIZE			0x125C
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#define	VDEC_B_SC_CONVERGE_CTRL			0x1260
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#define	VDEC_B_SC_LOOP_CTRL			0x1264
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#define	VDEC_B_COMB_2D_HFS_CFG			0x1268
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#define	VDEC_B_COMB_2D_HFD_CFG			0x126C
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#define	VDEC_B_COMB_2D_LF_CFG			0x1270
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#define	VDEC_B_COMB_2D_BLEND			0x1274
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#define	VDEC_B_COMB_MISC_CTRL			0x1278
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#define	VDEC_B_COMB_FLAT_THRESH_CTRL		0x127C
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#define	VDEC_B_COMB_TEST			0x1280
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#define	VDEC_B_BP_MISC_CTRL			0x1284
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#define	VDEC_B_VCR_DET_CTRL			0x1288
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#define	VDEC_B_NOISE_DET_CTRL			0x128C
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#define	VDEC_B_COMB_FLAT_NOISE_CTRL		0x1290
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#define	VDEC_B_VERSION				0x13F8
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#define	VDEC_B_SOFT_RST_CTRL			0x13FC
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/* Video Decoder C Registers */
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#define	VDEC_C_MODE_CTRL			0x1400
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#define	VDEC_C_OUT_CTRL1			0x1404
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#define	VDEC_C_OUT_CTRL_NS			0x1408
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#define	VDEC_C_GEN_STAT				0x140C
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#define	VDEC_C_INT_STAT_MASK			0x1410
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#define VDEC_C_LUMA_CTRL			0x1414
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#define VDEC_C_CHROMA_CTRL			0x1418
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#define	VDEC_C_CRUSH_CTRL			0x141C
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#define	VDEC_C_HORIZ_TIM_CTRL			0x1420
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#define	VDEC_C_VERT_TIM_CTRL			0x1424
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#define	VDEC_C_MISC_TIM_CTRL			0x1428
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#define	VDEC_C_FIELD_COUNT			0x142C
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#define	VDEC_C_HSCALE_CTRL			0x1430
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#define	VDEC_C_VSCALE_CTRL			0x1434
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#define	VDEC_C_MAN_VGA_CTRL			0x1438
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#define	VDEC_C_MAN_AGC_CTRL			0x143C
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#define	VDEC_C_DFE_CTRL1			0x1440
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#define	VDEC_C_DFE_CTRL2			0x1444
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#define	VDEC_C_DFE_CTRL3			0x1448
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#define	VDEC_C_PLL_CTRL				0x144C
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#define	VDEC_C_PLL_CTRL_FAST			0x1450
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#define	VDEC_C_HTL_CTRL				0x1454
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#define	VDEC_C_SRC_CFG				0x1458
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#define	VDEC_C_SC_STEP_SIZE			0x145C
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#define	VDEC_C_SC_CONVERGE_CTRL			0x1460
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#define	VDEC_C_SC_LOOP_CTRL			0x1464
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#define	VDEC_C_COMB_2D_HFS_CFG			0x1468
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#define	VDEC_C_COMB_2D_HFD_CFG			0x146C
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#define	VDEC_C_COMB_2D_LF_CFG			0x1470
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#define	VDEC_C_COMB_2D_BLEND			0x1474
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#define	VDEC_C_COMB_MISC_CTRL			0x1478
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#define	VDEC_C_COMB_FLAT_THRESH_CTRL		0x147C
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#define	VDEC_C_COMB_TEST			0x1480
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#define	VDEC_C_BP_MISC_CTRL			0x1484
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#define	VDEC_C_VCR_DET_CTRL			0x1488
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#define	VDEC_C_NOISE_DET_CTRL			0x148C
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#define	VDEC_C_COMB_FLAT_NOISE_CTRL		0x1490
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#define	VDEC_C_VERSION				0x15F8
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#define	VDEC_C_SOFT_RST_CTRL			0x15FC
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/* Video Decoder D Registers */
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#define VDEC_D_MODE_CTRL			0x1600
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#define VDEC_D_OUT_CTRL1			0x1604
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#define VDEC_D_OUT_CTRL_NS			0x1608
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#define VDEC_D_GEN_STAT				0x160C
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#define VDEC_D_INT_STAT_MASK			0x1610
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#define VDEC_D_LUMA_CTRL			0x1614
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#define VDEC_D_CHROMA_CTRL			0x1618
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#define VDEC_D_CRUSH_CTRL			0x161C
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#define VDEC_D_HORIZ_TIM_CTRL			0x1620
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#define VDEC_D_VERT_TIM_CTRL			0x1624
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#define VDEC_D_MISC_TIM_CTRL			0x1628
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#define VDEC_D_FIELD_COUNT			0x162C
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#define VDEC_D_HSCALE_CTRL			0x1630
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#define VDEC_D_VSCALE_CTRL			0x1634
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#define VDEC_D_MAN_VGA_CTRL			0x1638
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#define VDEC_D_MAN_AGC_CTRL			0x163C
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#define VDEC_D_DFE_CTRL1			0x1640
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#define VDEC_D_DFE_CTRL2			0x1644
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#define VDEC_D_DFE_CTRL3			0x1648
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#define VDEC_D_PLL_CTRL				0x164C
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#define VDEC_D_PLL_CTRL_FAST			0x1650
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#define VDEC_D_HTL_CTRL				0x1654
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#define VDEC_D_SRC_CFG				0x1658
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#define VDEC_D_SC_STEP_SIZE			0x165C
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#define VDEC_D_SC_CONVERGE_CTRL			0x1660
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#define VDEC_D_SC_LOOP_CTRL			0x1664
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#define VDEC_D_COMB_2D_HFS_CFG			0x1668
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#define VDEC_D_COMB_2D_HFD_CFG			0x166C
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#define VDEC_D_COMB_2D_LF_CFG			0x1670
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#define VDEC_D_COMB_2D_BLEND			0x1674
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#define VDEC_D_COMB_MISC_CTRL			0x1678
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#define VDEC_D_COMB_FLAT_THRESH_CTRL		0x167C
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#define VDEC_D_COMB_TEST			0x1680
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#define VDEC_D_BP_MISC_CTRL			0x1684
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#define VDEC_D_VCR_DET_CTRL			0x1688
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#define VDEC_D_NOISE_DET_CTRL			0x168C
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#define VDEC_D_COMB_FLAT_NOISE_CTRL		0x1690
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#define VDEC_D_VERSION				0x17F8
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#define VDEC_D_SOFT_RST_CTRL			0x17FC
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/* Video Decoder E Registers */
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#define	VDEC_E_MODE_CTRL			0x1800
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#define	VDEC_E_OUT_CTRL1			0x1804
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#define	VDEC_E_OUT_CTRL_NS			0x1808
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#define	VDEC_E_GEN_STAT				0x180C
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#define	VDEC_E_INT_STAT_MASK			0x1810
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#define	VDEC_E_LUMA_CTRL			0x1814
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#define	VDEC_E_CHROMA_CTRL			0x1818
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#define	VDEC_E_CRUSH_CTRL			0x181C
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#define	VDEC_E_HORIZ_TIM_CTRL			0x1820
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#define	VDEC_E_VERT_TIM_CTRL			0x1824
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#define	VDEC_E_MISC_TIM_CTRL			0x1828
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#define	VDEC_E_FIELD_COUNT			0x182C
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#define	VDEC_E_HSCALE_CTRL			0x1830
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#define	VDEC_E_VSCALE_CTRL			0x1834
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#define	VDEC_E_MAN_VGA_CTRL			0x1838
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#define	VDEC_E_MAN_AGC_CTRL			0x183C
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#define	VDEC_E_DFE_CTRL1			0x1840
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#define	VDEC_E_DFE_CTRL2			0x1844
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#define	VDEC_E_DFE_CTRL3			0x1848
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#define	VDEC_E_PLL_CTRL				0x184C
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#define	VDEC_E_PLL_CTRL_FAST			0x1850
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#define	VDEC_E_HTL_CTRL				0x1854
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#define	VDEC_E_SRC_CFG				0x1858
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#define	VDEC_E_SC_STEP_SIZE			0x185C
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#define	VDEC_E_SC_CONVERGE_CTRL			0x1860
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#define	VDEC_E_SC_LOOP_CTRL			0x1864
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#define	VDEC_E_COMB_2D_HFS_CFG			0x1868
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#define	VDEC_E_COMB_2D_HFD_CFG			0x186C
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#define	VDEC_E_COMB_2D_LF_CFG			0x1870
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#define	VDEC_E_COMB_2D_BLEND			0x1874
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#define	VDEC_E_COMB_MISC_CTRL			0x1878
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#define	VDEC_E_COMB_FLAT_THRESH_CTRL		0x187C
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#define	VDEC_E_COMB_TEST			0x1880
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#define	VDEC_E_BP_MISC_CTRL			0x1884
 | 
						|
#define	VDEC_E_VCR_DET_CTRL			0x1888
 | 
						|
#define	VDEC_E_NOISE_DET_CTRL			0x188C
 | 
						|
#define	VDEC_E_COMB_FLAT_NOISE_CTRL		0x1890
 | 
						|
#define	VDEC_E_VERSION				0x19F8
 | 
						|
#define	VDEC_E_SOFT_RST_CTRL			0x19FC
 | 
						|
 | 
						|
/* Video Decoder F Registers */
 | 
						|
#define	VDEC_F_MODE_CTRL			0x1A00
 | 
						|
#define	VDEC_F_OUT_CTRL1			0x1A04
 | 
						|
#define	VDEC_F_OUT_CTRL_NS			0x1A08
 | 
						|
#define	VDEC_F_GEN_STAT				0x1A0C
 | 
						|
#define	VDEC_F_INT_STAT_MASK			0x1A10
 | 
						|
#define	VDEC_F_LUMA_CTRL			0x1A14
 | 
						|
#define	VDEC_F_CHROMA_CTRL			0x1A18
 | 
						|
#define	VDEC_F_CRUSH_CTRL			0x1A1C
 | 
						|
#define	VDEC_F_HORIZ_TIM_CTRL			0x1A20
 | 
						|
#define	VDEC_F_VERT_TIM_CTRL			0x1A24
 | 
						|
#define	VDEC_F_MISC_TIM_CTRL			0x1A28
 | 
						|
#define	VDEC_F_FIELD_COUNT			0x1A2C
 | 
						|
#define	VDEC_F_HSCALE_CTRL			0x1A30
 | 
						|
#define	VDEC_F_VSCALE_CTRL			0x1A34
 | 
						|
#define	VDEC_F_MAN_VGA_CTRL			0x1A38
 | 
						|
#define	VDEC_F_MAN_AGC_CTRL			0x1A3C
 | 
						|
#define	VDEC_F_DFE_CTRL1			0x1A40
 | 
						|
#define	VDEC_F_DFE_CTRL2			0x1A44
 | 
						|
#define	VDEC_F_DFE_CTRL3			0x1A48
 | 
						|
#define	VDEC_F_PLL_CTRL				0x1A4C
 | 
						|
#define	VDEC_F_PLL_CTRL_FAST			0x1A50
 | 
						|
#define	VDEC_F_HTL_CTRL				0x1A54
 | 
						|
#define	VDEC_F_SRC_CFG				0x1A58
 | 
						|
#define	VDEC_F_SC_STEP_SIZE			0x1A5C
 | 
						|
#define	VDEC_F_SC_CONVERGE_CTRL			0x1A60
 | 
						|
#define	VDEC_F_SC_LOOP_CTRL			0x1A64
 | 
						|
#define	VDEC_F_COMB_2D_HFS_CFG			0x1A68
 | 
						|
#define	VDEC_F_COMB_2D_HFD_CFG			0x1A6C
 | 
						|
#define	VDEC_F_COMB_2D_LF_CFG			0x1A70
 | 
						|
#define	VDEC_F_COMB_2D_BLEND			0x1A74
 | 
						|
#define	VDEC_F_COMB_MISC_CTRL			0x1A78
 | 
						|
#define	VDEC_F_COMB_FLAT_THRESH_CTRL		0x1A7C
 | 
						|
#define	VDEC_F_COMB_TEST			0x1A80
 | 
						|
#define	VDEC_F_BP_MISC_CTRL			0x1A84
 | 
						|
#define	VDEC_F_VCR_DET_CTRL			0x1A88
 | 
						|
#define	VDEC_F_NOISE_DET_CTRL			0x1A8C
 | 
						|
#define	VDEC_F_COMB_FLAT_NOISE_CTRL		0x1A90
 | 
						|
#define	VDEC_F_VERSION				0x1BF8
 | 
						|
#define	VDEC_F_SOFT_RST_CTRL			0x1BFC
 | 
						|
 | 
						|
/* Video Decoder G Registers */
 | 
						|
#define	VDEC_G_MODE_CTRL			0x1C00
 | 
						|
#define	VDEC_G_OUT_CTRL1			0x1C04
 | 
						|
#define	VDEC_G_OUT_CTRL_NS			0x1C08
 | 
						|
#define	VDEC_G_GEN_STAT				0x1C0C
 | 
						|
#define	VDEC_G_INT_STAT_MASK			0x1C10
 | 
						|
#define	VDEC_G_LUMA_CTRL			0x1C14
 | 
						|
#define	VDEC_G_CHROMA_CTRL			0x1C18
 | 
						|
#define	VDEC_G_CRUSH_CTRL			0x1C1C
 | 
						|
#define	VDEC_G_HORIZ_TIM_CTRL			0x1C20
 | 
						|
#define	VDEC_G_VERT_TIM_CTRL			0x1C24
 | 
						|
#define	VDEC_G_MISC_TIM_CTRL			0x1C28
 | 
						|
#define	VDEC_G_FIELD_COUNT			0x1C2C
 | 
						|
#define	VDEC_G_HSCALE_CTRL			0x1C30
 | 
						|
#define	VDEC_G_VSCALE_CTRL			0x1C34
 | 
						|
#define	VDEC_G_MAN_VGA_CTRL			0x1C38
 | 
						|
#define	VDEC_G_MAN_AGC_CTRL			0x1C3C
 | 
						|
#define	VDEC_G_DFE_CTRL1			0x1C40
 | 
						|
#define	VDEC_G_DFE_CTRL2			0x1C44
 | 
						|
#define	VDEC_G_DFE_CTRL3			0x1C48
 | 
						|
#define	VDEC_G_PLL_CTRL				0x1C4C
 | 
						|
#define	VDEC_G_PLL_CTRL_FAST			0x1C50
 | 
						|
#define	VDEC_G_HTL_CTRL				0x1C54
 | 
						|
#define	VDEC_G_SRC_CFG				0x1C58
 | 
						|
#define	VDEC_G_SC_STEP_SIZE			0x1C5C
 | 
						|
#define	VDEC_G_SC_CONVERGE_CTRL			0x1C60
 | 
						|
#define	VDEC_G_SC_LOOP_CTRL			0x1C64
 | 
						|
#define	VDEC_G_COMB_2D_HFS_CFG			0x1C68
 | 
						|
#define	VDEC_G_COMB_2D_HFD_CFG			0x1C6C
 | 
						|
#define	VDEC_G_COMB_2D_LF_CFG			0x1C70
 | 
						|
#define	VDEC_G_COMB_2D_BLEND			0x1C74
 | 
						|
#define	VDEC_G_COMB_MISC_CTRL			0x1C78
 | 
						|
#define	VDEC_G_COMB_FLAT_THRESH_CTRL		0x1C7C
 | 
						|
#define	VDEC_G_COMB_TEST			0x1C80
 | 
						|
#define	VDEC_G_BP_MISC_CTRL			0x1C84
 | 
						|
#define	VDEC_G_VCR_DET_CTRL			0x1C88
 | 
						|
#define	VDEC_G_NOISE_DET_CTRL			0x1C8C
 | 
						|
#define	VDEC_G_COMB_FLAT_NOISE_CTRL		0x1C90
 | 
						|
#define	VDEC_G_VERSION				0x1DF8
 | 
						|
#define	VDEC_G_SOFT_RST_CTRL			0x1DFC
 | 
						|
 | 
						|
/* Video Decoder H Registers  */
 | 
						|
#define	VDEC_H_MODE_CTRL			0x1E00
 | 
						|
#define	VDEC_H_OUT_CTRL1			0x1E04
 | 
						|
#define	VDEC_H_OUT_CTRL_NS			0x1E08
 | 
						|
#define	VDEC_H_GEN_STAT				0x1E0C
 | 
						|
#define	VDEC_H_INT_STAT_MASK			0x1E1E
 | 
						|
#define	VDEC_H_LUMA_CTRL			0x1E14
 | 
						|
#define	VDEC_H_CHROMA_CTRL			0x1E18
 | 
						|
#define	VDEC_H_CRUSH_CTRL			0x1E1C
 | 
						|
#define	VDEC_H_HORIZ_TIM_CTRL			0x1E20
 | 
						|
#define	VDEC_H_VERT_TIM_CTRL			0x1E24
 | 
						|
#define	VDEC_H_MISC_TIM_CTRL			0x1E28
 | 
						|
#define	VDEC_H_FIELD_COUNT			0x1E2C
 | 
						|
#define	VDEC_H_HSCALE_CTRL			0x1E30
 | 
						|
#define	VDEC_H_VSCALE_CTRL			0x1E34
 | 
						|
#define	VDEC_H_MAN_VGA_CTRL			0x1E38
 | 
						|
#define	VDEC_H_MAN_AGC_CTRL			0x1E3C
 | 
						|
#define	VDEC_H_DFE_CTRL1			0x1E40
 | 
						|
#define	VDEC_H_DFE_CTRL2			0x1E44
 | 
						|
#define	VDEC_H_DFE_CTRL3			0x1E48
 | 
						|
#define	VDEC_H_PLL_CTRL				0x1E4C
 | 
						|
#define	VDEC_H_PLL_CTRL_FAST			0x1E50
 | 
						|
#define	VDEC_H_HTL_CTRL				0x1E54
 | 
						|
#define	VDEC_H_SRC_CFG				0x1E58
 | 
						|
#define	VDEC_H_SC_STEP_SIZE			0x1E5C
 | 
						|
#define	VDEC_H_SC_CONVERGE_CTRL			0x1E60
 | 
						|
#define	VDEC_H_SC_LOOP_CTRL			0x1E64
 | 
						|
#define	VDEC_H_COMB_2D_HFS_CFG			0x1E68
 | 
						|
#define	VDEC_H_COMB_2D_HFD_CFG			0x1E6C
 | 
						|
#define	VDEC_H_COMB_2D_LF_CFG			0x1E70
 | 
						|
#define	VDEC_H_COMB_2D_BLEND			0x1E74
 | 
						|
#define	VDEC_H_COMB_MISC_CTRL			0x1E78
 | 
						|
#define	VDEC_H_COMB_FLAT_THRESH_CTRL		0x1E7C
 | 
						|
#define	VDEC_H_COMB_TEST			0x1E80
 | 
						|
#define	VDEC_H_BP_MISC_CTRL			0x1E84
 | 
						|
#define	VDEC_H_VCR_DET_CTRL			0x1E88
 | 
						|
#define	VDEC_H_NOISE_DET_CTRL			0x1E8C
 | 
						|
#define	VDEC_H_COMB_FLAT_NOISE_CTRL		0x1E90
 | 
						|
#define	VDEC_H_VERSION				0x1FF8
 | 
						|
#define	VDEC_H_SOFT_RST_CTRL			0x1FFC
 | 
						|
 | 
						|
/*****************************************************************************/
 | 
						|
/* LUMA_CTRL register fields */
 | 
						|
#define VDEC_A_BRITE_CTRL			0x1014
 | 
						|
#define VDEC_A_CNTRST_CTRL			0x1015
 | 
						|
#define VDEC_A_PEAK_SEL				0x1016
 | 
						|
 | 
						|
/*****************************************************************************/
 | 
						|
/* CHROMA_CTRL register fields */
 | 
						|
#define VDEC_A_USAT_CTRL			0x1018
 | 
						|
#define VDEC_A_VSAT_CTRL			0x1019
 | 
						|
#define VDEC_A_HUE_CTRL				0x101A
 | 
						|
 | 
						|
#endif
 |