142 lines
2.5 KiB
Plaintext
142 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
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*/
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/ {
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cluster0_opp: opp-table0 {
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compatible = "operating-points-v2";
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opp-shared;
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opp00 {
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opp-hz = /bits/ 64 <408000000>;
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opp-microvolt = <800000>;
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clock-latency-ns = <40000>;
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};
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opp01 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <825000>;
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};
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opp02 {
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opp-hz = /bits/ 64 <816000000>;
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opp-microvolt = <850000>;
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};
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opp03 {
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opp-hz = /bits/ 64 <1008000000>;
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opp-microvolt = <900000>;
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};
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opp04 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <975000>;
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};
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opp05 {
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opp-hz = /bits/ 64 <1416000000>;
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opp-microvolt = <1100000>;
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};
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opp06 {
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opp-hz = /bits/ 64 <1512000000>;
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opp-microvolt = <1150000>;
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};
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};
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cluster1_opp: opp-table1 {
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compatible = "operating-points-v2";
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opp-shared;
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opp00 {
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opp-hz = /bits/ 64 <408000000>;
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opp-microvolt = <800000>;
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clock-latency-ns = <40000>;
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};
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opp01 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <800000>;
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};
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opp02 {
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opp-hz = /bits/ 64 <816000000>;
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opp-microvolt = <825000>;
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};
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opp03 {
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opp-hz = /bits/ 64 <1008000000>;
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opp-microvolt = <850000>;
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};
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opp04 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <900000>;
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};
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opp05 {
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opp-hz = /bits/ 64 <1416000000>;
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opp-microvolt = <975000>;
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};
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opp06 {
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opp-hz = /bits/ 64 <1608000000>;
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opp-microvolt = <1050000>;
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};
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opp07 {
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opp-hz = /bits/ 64 <1800000000>;
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opp-microvolt = <1150000>;
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};
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opp08 {
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opp-hz = /bits/ 64 <2016000000>;
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opp-microvolt = <1250000>;
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};
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};
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gpu_opp_table: opp-table2 {
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compatible = "operating-points-v2";
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opp00 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <800000>;
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};
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opp01 {
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opp-hz = /bits/ 64 <297000000>;
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opp-microvolt = <800000>;
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};
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opp02 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <825000>;
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};
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opp03 {
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opp-hz = /bits/ 64 <500000000>;
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opp-microvolt = <850000>;
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};
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opp04 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <925000>;
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};
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opp05 {
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opp-hz = /bits/ 64 <800000000>;
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opp-microvolt = <1075000>;
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};
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};
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};
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&cpu_l0 {
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operating-points-v2 = <&cluster0_opp>;
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};
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&cpu_l1 {
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operating-points-v2 = <&cluster0_opp>;
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};
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&cpu_l2 {
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operating-points-v2 = <&cluster0_opp>;
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};
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&cpu_l3 {
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operating-points-v2 = <&cluster0_opp>;
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};
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&cpu_b0 {
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operating-points-v2 = <&cluster1_opp>;
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};
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&cpu_b1 {
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operating-points-v2 = <&cluster1_opp>;
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};
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&gpu {
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operating-points-v2 = <&gpu_opp_table>;
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};
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