522 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			522 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/input/input.h>
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#include "tegra30.dtsi"
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/*
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 * Toradex Colibri T30 Module Device Tree
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 * Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E; IT: V1.1A
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 */
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/ {
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	model = "Toradex Colibri T30";
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	compatible = "toradex,colibri_t30", "nvidia,tegra30";
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	memory@80000000 {
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		reg = <0x80000000 0x40000000>;
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	};
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	host1x@50000000 {
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		hdmi@54280000 {
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			vdd-supply = <&avdd_hdmi_3v3_reg>;
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			pll-supply = <&avdd_hdmi_pll_1v8_reg>;
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			nvidia,hpd-gpio =
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				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
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			nvidia,ddc-i2c-bus = <&hdmiddc>;
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		};
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	};
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	pinmux@70000868 {
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		pinctrl-names = "default";
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		pinctrl-0 = <&state_default>;
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		state_default: pinmux {
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			/* Analogue Audio (On-module) */
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			clk1_out_pw4 {
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				nvidia,pins = "clk1_out_pw4";
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				nvidia,function = "extperiph1";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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			};
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			dap3_fs_pp0 {
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				nvidia,pins =	"dap3_fs_pp0",
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						"dap3_sclk_pp3",
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						"dap3_din_pp1",
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						"dap3_dout_pp2";
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				nvidia,function = "i2s2";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			/* Colibri BL_ON */
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			pv2 {
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				nvidia,pins = "pv2";
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				nvidia,function = "rsvd4";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			/* Colibri Backlight PWM<A> */
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			sdmmc3_dat3_pb4 {
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				nvidia,pins = "sdmmc3_dat3_pb4";
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				nvidia,function = "pwm0";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			/* Colibri CAN_INT */
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			kb_row8_ps0 {
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				nvidia,pins = "kb_row8_ps0";
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				nvidia,function = "kbc";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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			};
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			/*
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			 * Colibri L_BIAS, LCD_M1 is muxed with LCD_DE
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			 * todays display need DE, disable LCD_M1
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			 */
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			lcd_m1_pw1 {
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				nvidia,pins = "lcd_m1_pw1";
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				nvidia,function = "rsvd3";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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			};
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			/* Colibri MMC */
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			kb_row10_ps2 {
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				nvidia,pins = "kb_row10_ps2";
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				nvidia,function = "sdmmc2";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			kb_row11_ps3 {
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				nvidia,pins = "kb_row11_ps3",
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					      "kb_row12_ps4",
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					      "kb_row13_ps5",
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					      "kb_row14_ps6",
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					      "kb_row15_ps7";
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				nvidia,function = "sdmmc2";
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				nvidia,pull = <TEGRA_PIN_PULL_UP>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			/* Colibri SSP */
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			ulpi_clk_py0 {
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				nvidia,pins = "ulpi_clk_py0",
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					      "ulpi_dir_py1",
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					      "ulpi_nxt_py2",
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					      "ulpi_stp_py3";
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				nvidia,function = "spi1";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			sdmmc3_dat6_pd3 {
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				nvidia,pins = "sdmmc3_dat6_pd3",
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					      "sdmmc3_dat7_pd4";
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				nvidia,function = "spdif";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_ENABLE>;
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			};
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			/* Colibri UART_A */
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			ulpi_data0 {
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				nvidia,pins = "ulpi_data0_po1",
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					      "ulpi_data1_po2",
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					      "ulpi_data2_po3",
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					      "ulpi_data3_po4",
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					      "ulpi_data4_po5",
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					      "ulpi_data5_po6",
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					      "ulpi_data6_po7",
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					      "ulpi_data7_po0";
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				nvidia,function = "uarta";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			/* Colibri UART_B */
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			gmi_a16_pj7 {
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				nvidia,pins = "gmi_a16_pj7",
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					      "gmi_a17_pb0",
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					      "gmi_a18_pb1",
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					      "gmi_a19_pk7";
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				nvidia,function = "uartd";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			/* Colibri UART_C */
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			uart2_rxd {
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				nvidia,pins = "uart2_rxd_pc3",
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					      "uart2_txd_pc2";
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				nvidia,function = "uartb";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			/* eMMC */
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			sdmmc4_clk_pcc4 {
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				nvidia,pins = "sdmmc4_clk_pcc4",
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					      "sdmmc4_rst_n_pcc3";
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				nvidia,function = "sdmmc4";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			sdmmc4_dat0_paa0 {
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				nvidia,pins = "sdmmc4_dat0_paa0",
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					      "sdmmc4_dat1_paa1",
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					      "sdmmc4_dat2_paa2",
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					      "sdmmc4_dat3_paa3",
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					      "sdmmc4_dat4_paa4",
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					      "sdmmc4_dat5_paa5",
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					      "sdmmc4_dat6_paa6",
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					      "sdmmc4_dat7_paa7";
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				nvidia,function = "sdmmc4";
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				nvidia,pull = <TEGRA_PIN_PULL_UP>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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			};
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			/* Power I2C (On-module) */
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			pwr_i2c_scl_pz6 {
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				nvidia,pins = "pwr_i2c_scl_pz6",
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					      "pwr_i2c_sda_pz7";
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				nvidia,function = "i2cpwr";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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				nvidia,lock = <TEGRA_PIN_DISABLE>;
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				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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			};
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			/*
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			 * THERMD_ALERT#, unlatched I2C address pin of LM95245
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			 * temperature sensor therefore requires disabling for
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			 * now
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			 */
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			lcd_dc1_pd2 {
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				nvidia,pins = "lcd_dc1_pd2";
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				nvidia,function = "rsvd3";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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			};
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			/* TOUCH_PEN_INT# */
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			pv0 {
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				nvidia,pins = "pv0";
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				nvidia,function = "rsvd1";
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				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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				nvidia,tristate = <TEGRA_PIN_DISABLE>;
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				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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			};
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		};
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	};
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	hdmiddc: i2c@7000c700 {
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		clock-frequency = <10000>;
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	};
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	/*
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	 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
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	 * touch screen controller
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	 */
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	i2c@7000d000 {
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		status = "okay";
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		clock-frequency = <100000>;
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		/* SGTL5000 audio codec */
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		sgtl5000: codec@a {
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			compatible = "fsl,sgtl5000";
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			reg = <0x0a>;
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			VDDA-supply = <&sys_3v3_reg>;
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			VDDIO-supply = <&sys_3v3_reg>;
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			clocks = <&tegra_car TEGRA30_CLK_EXTERN1>;
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		};
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		pmic: tps65911@2d {
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			compatible = "ti,tps65911";
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			reg = <0x2d>;
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			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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			#interrupt-cells = <2>;
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			interrupt-controller;
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			ti,system-power-controller;
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			#gpio-cells = <2>;
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			gpio-controller;
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			vcc1-supply = <&sys_3v3_reg>;
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			vcc2-supply = <&sys_3v3_reg>;
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			vcc3-supply = <&vio_reg>;
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			vcc4-supply = <&sys_3v3_reg>;
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			vcc5-supply = <&sys_3v3_reg>;
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			vcc6-supply = <&vio_reg>;
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			vcc7-supply = <&charge_pump_5v0_reg>;
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			vccio-supply = <&sys_3v3_reg>;
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			regulators {
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				/* SW1: +V1.35_VDDIO_DDR */
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				vdd1_reg: vdd1 {
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					regulator-name = "vddio_ddr_1v35";
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					regulator-min-microvolt = <1350000>;
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					regulator-max-microvolt = <1350000>;
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					regulator-always-on;
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				};
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				/* SW2: unused */
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				/* SW CTRL: +V1.0_VDD_CPU */
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				vddctrl_reg: vddctrl {
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					regulator-name = "vdd_cpu,vdd_sys";
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					regulator-min-microvolt = <1150000>;
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					regulator-max-microvolt = <1150000>;
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					regulator-always-on;
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				};
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				/* SWIO: +V1.8 */
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				vio_reg: vio {
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					regulator-name = "vdd_1v8_gen";
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					regulator-min-microvolt = <1800000>;
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					regulator-max-microvolt = <1800000>;
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					regulator-always-on;
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				};
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				/* LDO1: unused */
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				/*
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				 * EN_+V3.3 switching via FET:
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				 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
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				 * see also 3v3 fixed supply
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				 */
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				ldo2_reg: ldo2 {
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					regulator-name = "en_3v3";
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					regulator-min-microvolt = <3300000>;
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					regulator-max-microvolt = <3300000>;
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					regulator-always-on;
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				};
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				/* LDO3: unused */
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				/* +V1.2_VDD_RTC */
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				ldo4_reg: ldo4 {
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					regulator-name = "vdd_rtc";
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					regulator-min-microvolt = <1200000>;
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					regulator-max-microvolt = <1200000>;
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					regulator-always-on;
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				};
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				/*
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				 * +V2.8_AVDD_VDAC:
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				 * only required for analog RGB
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				 */
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				ldo5_reg: ldo5 {
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					regulator-name = "avdd_vdac";
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					regulator-min-microvolt = <2800000>;
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					regulator-max-microvolt = <2800000>;
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					regulator-always-on;
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				};
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				/*
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				 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
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				 * but LDO6 can't set voltage in 50mV
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				 * granularity
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				 */
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				ldo6_reg: ldo6 {
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					regulator-name = "avdd_plle";
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					regulator-min-microvolt = <1100000>;
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					regulator-max-microvolt = <1100000>;
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				};
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				/* +V1.2_AVDD_PLL */
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				ldo7_reg: ldo7 {
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					regulator-name = "avdd_pll";
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					regulator-min-microvolt = <1200000>;
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					regulator-max-microvolt = <1200000>;
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					regulator-always-on;
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				};
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				/* +V1.0_VDD_DDR_HS */
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				ldo8_reg: ldo8 {
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					regulator-name = "vdd_ddr_hs";
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					regulator-min-microvolt = <1000000>;
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					regulator-max-microvolt = <1000000>;
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					regulator-always-on;
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				};
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			};
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		};
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		/* STMPE811 touch screen controller */
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		stmpe811@41 {
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			compatible = "st,stmpe811";
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			reg = <0x41>;
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			interrupts = <TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
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			interrupt-parent = <&gpio>;
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			interrupt-controller;
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			id = <0>;
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			blocks = <0x5>;
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			irq-trigger = <0x1>;
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			stmpe_touchscreen {
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				compatible = "st,stmpe-ts";
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				/* 3.25 MHz ADC clock speed */
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				st,adc-freq = <1>;
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				/* 8 sample average control */
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				st,ave-ctrl = <3>;
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				/* 7 length fractional part in z */
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				st,fraction-z = <7>;
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				/*
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				 * 50 mA typical 80 mA max touchscreen drivers
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				 * current limit value
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				 */
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				st,i-drive = <1>;
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				/* 12-bit ADC */
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				st,mod-12b = <1>;
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				/* internal ADC reference */
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				st,ref-sel = <0>;
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				/* ADC converstion time: 80 clocks */
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				st,sample-time = <4>;
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				/* 1 ms panel driver settling time */
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				st,settling = <3>;
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				/* 5 ms touch detect interrupt delay */
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				st,touch-det-delay = <5>;
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			};
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		};
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		/*
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		 * LM95245 temperature sensor
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		 * Note: OVERT_N directly connected to PMIC PWRDN
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		 */
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		temp-sensor@4c {
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			compatible = "national,lm95245";
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			reg = <0x4c>;
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		};
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		/* SW: +V1.2_VDD_CORE */
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		tps62362@60 {
 | 
						|
			compatible = "ti,tps62362";
 | 
						|
			reg = <0x60>;
 | 
						|
 | 
						|
			regulator-name = "tps62362-vout";
 | 
						|
			regulator-min-microvolt = <900000>;
 | 
						|
			regulator-max-microvolt = <1400000>;
 | 
						|
			regulator-boot-on;
 | 
						|
			regulator-always-on;
 | 
						|
			ti,vsel0-state-low;
 | 
						|
			/* VSEL1: EN_CORE_DVFS_N low for DVFS */
 | 
						|
			ti,vsel1-state-low;
 | 
						|
		};
 | 
						|
	};
 | 
						|
 | 
						|
	pmc@7000e400 {
 | 
						|
		nvidia,invert-interrupt;
 | 
						|
		nvidia,suspend-mode = <1>;
 | 
						|
		nvidia,cpu-pwr-good-time = <5000>;
 | 
						|
		nvidia,cpu-pwr-off-time = <5000>;
 | 
						|
		nvidia,core-pwr-good-time = <3845 3845>;
 | 
						|
		nvidia,core-pwr-off-time = <0>;
 | 
						|
		nvidia,core-power-req-active-high;
 | 
						|
		nvidia,sys-clock-req-active-high;
 | 
						|
	};
 | 
						|
 | 
						|
	ahub@70080000 {
 | 
						|
		i2s@70080500 {
 | 
						|
			status = "okay";
 | 
						|
		};
 | 
						|
	};
 | 
						|
 | 
						|
	/* eMMC */
 | 
						|
	sdhci@78000600 {
 | 
						|
		status = "okay";
 | 
						|
		bus-width = <8>;
 | 
						|
		non-removable;
 | 
						|
	};
 | 
						|
 | 
						|
	/* EHCI instance 1: USB2_DP/N -> AX88772B */
 | 
						|
	usb@7d004000 {
 | 
						|
		status = "okay";
 | 
						|
	};
 | 
						|
 | 
						|
	usb-phy@7d004000 {
 | 
						|
		status = "okay";
 | 
						|
		nvidia,is-wired = <1>;
 | 
						|
	};
 | 
						|
 | 
						|
	clocks {
 | 
						|
		compatible = "simple-bus";
 | 
						|
		#address-cells = <1>;
 | 
						|
		#size-cells = <0>;
 | 
						|
 | 
						|
		clk32k_in: clk@0 {
 | 
						|
			compatible = "fixed-clock";
 | 
						|
			reg = <0>;
 | 
						|
			#clock-cells = <0>;
 | 
						|
			clock-frequency = <32768>;
 | 
						|
		};
 | 
						|
	};
 | 
						|
 | 
						|
	regulators {
 | 
						|
		compatible = "simple-bus";
 | 
						|
		#address-cells = <1>;
 | 
						|
		#size-cells = <0>;
 | 
						|
 | 
						|
		avdd_hdmi_pll_1v8_reg: regulator@100 {
 | 
						|
			compatible = "regulator-fixed";
 | 
						|
			reg = <100>;
 | 
						|
			regulator-name = "+V1.8_AVDD_HDMI_PLL";
 | 
						|
			regulator-min-microvolt = <1800000>;
 | 
						|
			regulator-max-microvolt = <1800000>;
 | 
						|
			enable-active-high;
 | 
						|
			gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
 | 
						|
			vin-supply = <&vio_reg>;
 | 
						|
		};
 | 
						|
 | 
						|
		sys_3v3_reg: regulator@101 {
 | 
						|
			compatible = "regulator-fixed";
 | 
						|
			reg = <101>;
 | 
						|
			regulator-name = "3v3";
 | 
						|
			regulator-min-microvolt = <3300000>;
 | 
						|
			regulator-max-microvolt = <3300000>;
 | 
						|
			regulator-always-on;
 | 
						|
		};
 | 
						|
 | 
						|
		avdd_hdmi_3v3_reg: regulator@102 {
 | 
						|
			compatible = "regulator-fixed";
 | 
						|
			reg = <102>;
 | 
						|
			regulator-name = "+V3.3_AVDD_HDMI";
 | 
						|
			regulator-min-microvolt = <3300000>;
 | 
						|
			regulator-max-microvolt = <3300000>;
 | 
						|
			enable-active-high;
 | 
						|
			gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
 | 
						|
			vin-supply = <&sys_3v3_reg>;
 | 
						|
		};
 | 
						|
 | 
						|
		charge_pump_5v0_reg: regulator@103 {
 | 
						|
			compatible = "regulator-fixed";
 | 
						|
			reg = <103>;
 | 
						|
			regulator-name = "5v0";
 | 
						|
			regulator-min-microvolt = <5000000>;
 | 
						|
			regulator-max-microvolt = <5000000>;
 | 
						|
			regulator-always-on;
 | 
						|
		};
 | 
						|
	};
 | 
						|
 | 
						|
	sound {
 | 
						|
		compatible = "toradex,tegra-audio-sgtl5000-colibri_t30",
 | 
						|
			     "nvidia,tegra-audio-sgtl5000";
 | 
						|
		nvidia,model = "Toradex Colibri T30";
 | 
						|
		nvidia,audio-routing =
 | 
						|
			"Headphone Jack", "HP_OUT",
 | 
						|
			"LINE_IN", "Line In Jack",
 | 
						|
			"MIC_IN", "Mic Jack";
 | 
						|
		nvidia,i2s-controller = <&tegra_i2s2>;
 | 
						|
		nvidia,audio-codec = <&sgtl5000>;
 | 
						|
		clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
 | 
						|
			 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
 | 
						|
			 <&tegra_car TEGRA30_CLK_EXTERN1>;
 | 
						|
		clock-names = "pll_a", "pll_a_out0", "mclk";
 | 
						|
	};
 | 
						|
};
 |