495 lines
12 KiB
ArmAsm
495 lines
12 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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* Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
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*/
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#include <asm-offsets.h>
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#include <config.h>
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#include "version.h"
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#include <asm/cache.h>
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#define _START _start
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#define _FAULT _fault
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#define SAVE_ALL \
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move.w #0x2700,%sr; /* disable intrs */ \
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subl #60,%sp; /* space for 15 regs */ \
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moveml %d0-%d7/%a0-%a6,%sp@;
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#define RESTORE_ALL \
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moveml %sp@,%d0-%d7/%a0-%a6; \
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addl #60,%sp; /* space for 15 regs */ \
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rte;
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#if defined(CONFIG_CF_SBF)
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#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
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CONFIG_SYS_INIT_RAM_ADDR)
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#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
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CONFIG_SYS_INIT_RAM_ADDR)
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#endif
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.text
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/*
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* Vector table. This is used for initial platform startup.
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* These vectors are to catch any un-intended traps.
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*/
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_vectors:
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#if defined(CONFIG_CF_SBF)
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INITSP: .long 0 /* Initial SP */
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INITPC: .long ASM_DRAMINIT /* Initial PC */
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#else
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INITSP: .long 0 /* Initial SP */
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INITPC: .long _START /* Initial PC */
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#endif
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vector02_0F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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/* Reserved */
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vector10_17:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector18_1F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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#if !defined(CONFIG_CF_SBF)
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/* TRAP #0 - #15 */
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vector20_2F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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/* Reserved */
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vector30_3F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector64_127:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector128_191:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector192_255:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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#endif
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#if defined(CONFIG_CF_SBF)
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/* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
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asm_sbf_img_hdr:
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.long 0x00000000 /* checksum, not yet implemented */
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.long 0x00020000 /* image length */
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.long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
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asm_dram_init:
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move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
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movec %d0, %RAMBAR1 /* init Rambar */
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move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
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clr.l %sp@-
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/* Must disable global address */
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move.l #0xFC008000, %a1
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move.l #(CONFIG_SYS_CS0_BASE), (%a1)
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move.l #0xFC008008, %a1
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move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
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move.l #0xFC008004, %a1
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move.l #(CONFIG_SYS_CS0_MASK), (%a1)
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/*
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* Dram Initialization
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* a1, a2, and d0
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*/
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move.l #0xFC0A4074, %a1
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move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
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nop
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/* SDRAM Chip 0 and 1 */
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move.l #0xFC0B8110, %a1
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move.l #0xFC0B8114, %a2
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/* calculate the size */
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move.l #0x13, %d1
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move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
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#ifdef CONFIG_SYS_SDRAM_BASE1
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lsr.l #1, %d2
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#endif
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dramsz_loop:
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lsr.l #1, %d2
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add.l #1, %d1
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cmp.l #1, %d2
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bne dramsz_loop
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/* SDRAM Chip 0 and 1 */
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move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
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or.l %d1, (%a1)
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#ifdef CONFIG_SYS_SDRAM_BASE1
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move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
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or.l %d1, (%a2)
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#endif
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nop
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/* dram cfg1 and cfg2 */
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move.l #0xFC0B8008, %a1
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move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
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nop
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move.l #0xFC0B800C, %a2
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move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
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nop
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move.l #0xFC0B8000, %a1 /* Mode */
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move.l #0xFC0B8004, %a2 /* Ctrl */
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/* Issue PALL */
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move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
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nop
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/* Issue LEMR */
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move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
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nop
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move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
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nop
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move.l #1000, %d0
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wait1000:
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nop
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subq.l #1, %d0
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bne wait1000
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/* Issue PALL */
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move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
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nop
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/* Perform two refresh cycles */
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move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
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nop
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move.l %d0, (%a2)
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move.l %d0, (%a2)
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nop
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move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
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and.l #0x7FFFFFFF, %d0
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or.l #0x10000c00, %d0
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move.l %d0, (%a2)
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nop
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/*
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* DSPI Initialization
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* a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
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* a1 - dspi status
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* a2 - dtfr
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* a3 - drfr
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* a4 - Dst addr
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*/
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/* Enable pins for DSPI mode - chip-selects are enabled later */
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move.l #0xFC0A4036, %a0
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move.b #0x3F, %d0
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move.b %d0, (%a0)
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/* DSPI CS */
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#ifdef CONFIG_SYS_DSPI_CS0
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move.b (%a0), %d0
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or.l #0xC0, %d0
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move.b %d0, (%a0)
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#endif
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#ifdef CONFIG_SYS_DSPI_CS2
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move.l #0xFC0A4037, %a0
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move.b (%a0), %d0
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or.l #0x10, %d0
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move.b %d0, (%a0)
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#endif
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nop
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/* Configure DSPI module */
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move.l #0xFC05C000, %a0
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move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
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move.l #0xFC05C00C, %a0
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move.l #0x3E000011, (%a0)
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move.l #0xFC05C034, %a2 /* dtfr */
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move.l #0xFC05C03B, %a3 /* drfr */
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move.l #(ASM_SBF_IMG_HDR + 4), %a1
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move.l (%a1)+, %d5
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move.l (%a1), %a4
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move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
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move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
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move.l #0xFC05C02C, %a1 /* dspi status */
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/* Issue commands and address */
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move.l #0x8004000B, %d2 /* Fast Read Cmd */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.l #0x80040000, %d2 /* Address byte 2 */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.l #0x80040000, %d2 /* Address byte 1 */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.l #0x80040000, %d2 /* Address byte 0 */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.l #0x80040000, %d2 /* Dummy Wr and Rd */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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/* Transfer serial boot header to sram */
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asm_dspi_rd_loop1:
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move.l #0x80040000, %d2
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.b %d1, (%a0) /* read, copy to dst */
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add.l #1, %a0 /* inc dst by 1 */
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sub.l #1, %d4 /* dec cnt by 1 */
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bne asm_dspi_rd_loop1
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/* Transfer u-boot from serial flash to memory */
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asm_dspi_rd_loop2:
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move.l #0x80040000, %d2
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.b %d1, (%a4) /* read, copy to dst */
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add.l #1, %a4 /* inc dst by 1 */
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sub.l #1, %d5 /* dec cnt by 1 */
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bne asm_dspi_rd_loop2
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move.l #0x00040000, %d2 /* Terminate */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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/* jump to memory and execute */
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move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
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move.l %a0, (%a1)
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jmp (%a0)
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asm_dspi_wr_status:
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move.l (%a1), %d0 /* status */
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and.l #0x0000F000, %d0
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cmp.l #0x00003000, %d0
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bgt asm_dspi_wr_status
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move.l %d2, (%a2)
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rts
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asm_dspi_rd_status:
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move.l (%a1), %d0 /* status */
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and.l #0x000000F0, %d0
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lsr.l #4, %d0
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cmp.l #0, %d0
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beq asm_dspi_rd_status
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move.b (%a3), %d1
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rts
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#endif /* CONFIG_CF_SBF */
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.text
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. = 0x400
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.globl _start
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_start:
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nop
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nop
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move.w #0x2700,%sr /* Mask off Interrupt */
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/* Set vector base register at the beginning of the Flash */
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#if defined(CONFIG_CF_SBF)
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move.l #CONFIG_SYS_TEXT_BASE, %d0
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movec %d0, %VBR
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#else
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move.l #CONFIG_SYS_FLASH_BASE, %d0
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movec %d0, %VBR
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move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
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movec %d0, %RAMBAR1
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#endif
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/* invalidate and disable cache */
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move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
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movec %d0, %CACR /* Invalidate cache */
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move.l #0, %d0
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movec %d0, %ACR0
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movec %d0, %ACR1
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/* initialize general use internal ram */
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move.l #0, %d0
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move.l #(ICACHE_STATUS), %a1 /* icache */
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move.l #(DCACHE_STATUS), %a2 /* icache */
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move.l %d0, (%a1)
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move.l %d0, (%a2)
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/* put relocation table address to a5 */
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move.l #__got_start, %a5
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/* setup stack initially on top of internal static ram */
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move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
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/*
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* if configured, malloc_f arena will be reserved first,
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* then (and always) gd struct space will be reserved
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*/
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move.l %sp, -(%sp)
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bsr board_init_f_alloc_reserve
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/* update stack and frame-pointers */
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move.l %d0, %sp
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move.l %sp, %fp
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/* initialize reserved area */
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move.l %d0, -(%sp)
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bsr board_init_f_init_reserve
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/* run low-level CPU init code (from flash) */
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bsr cpu_init_f
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clr.l %sp@-
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/* run low-level board init code (from flash) */
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bsr board_init_f
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/* board_init_f() does not return */
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/******************************************************************************/
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/*
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* void relocate_code (addr_sp, gd, addr_moni)
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*
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* This "function" does not return, instead it continues in RAM
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* after relocating the monitor code.
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*
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* r3 = dest
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* r4 = src
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* r5 = length in bytes
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* r6 = cachelinesize
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*/
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.globl relocate_code
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relocate_code:
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link.w %a6,#0
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move.l 8(%a6), %sp /* set new stack pointer */
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move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
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move.l 16(%a6), %a0 /* Save copy of Destination Address */
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move.l #CONFIG_SYS_MONITOR_BASE, %a1
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move.l #__init_end, %a2
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move.l %a0, %a3
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/* copy the code to RAM */
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1:
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move.l (%a1)+, (%a3)+
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cmp.l %a1,%a2
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bgt.s 1b
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/*
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* We are done. Do not return, instead branch to second part of board
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* initialization, now running from RAM.
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*/
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move.l %a0, %a1
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add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
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jmp (%a1)
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in_ram:
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clear_bss:
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/*
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* Now clear BSS segment
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*/
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move.l %a0, %a1
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add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
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move.l %a0, %d1
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add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
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6:
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clr.l (%a1)+
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cmp.l %a1,%d1
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bgt.s 6b
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/*
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* fix got table in RAM
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*/
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move.l %a0, %a1
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add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
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move.l %a1,%a5 /* fix got pointer register a5 */
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move.l %a0, %a2
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add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
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7:
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move.l (%a1),%d1
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sub.l #_start,%d1
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add.l %a0,%d1
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move.l %d1,(%a1)+
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cmp.l %a2, %a1
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bne 7b
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/* calculate relative jump to board_init_r in ram */
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move.l %a0, %a1
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add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
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/* set parameters for board_init_r */
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move.l %a0,-(%sp) /* dest_addr */
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move.l %d0,-(%sp) /* gd */
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jsr (%a1)
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/******************************************************************************/
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/* exception code */
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.globl _fault
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_fault:
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bra _fault
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.globl _exc_handler
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_exc_handler:
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SAVE_ALL
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movel %sp,%sp@-
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bsr exc_handler
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addql #4,%sp
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RESTORE_ALL
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.globl _int_handler
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_int_handler:
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SAVE_ALL
|
|
movel %sp,%sp@-
|
|
bsr int_handler
|
|
addql #4,%sp
|
|
RESTORE_ALL
|
|
|
|
/******************************************************************************/
|
|
|
|
.globl version_string
|
|
version_string:
|
|
.ascii U_BOOT_VERSION_STRING, "\0"
|
|
.align 4
|