104 lines
2.9 KiB
C
104 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*/
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#ifndef __PFE_ETH_H__
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#define __PFE_ETH_H__
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#include <linux/sizes.h>
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#include <asm/io.h>
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#include <miiphy.h>
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#include <malloc.h>
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#include "pfe_driver.h"
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#define BMU2_DDR_BASEADDR 0
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#define BMU2_BUF_COUNT (3 * SZ_1K)
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#define BMU2_DDR_SIZE (DDR_BUF_SIZE * BMU2_BUF_COUNT)
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#define HIF_RX_PKT_DDR_BASEADDR (BMU2_DDR_BASEADDR + BMU2_DDR_SIZE)
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#define HIF_RX_PKT_DDR_SIZE (HIF_RX_DESC_NT * DDR_BUF_SIZE)
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#define HIF_TX_PKT_DDR_BASEADDR (HIF_RX_PKT_DDR_BASEADDR + HIF_RX_PKT_DDR_SIZE)
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#define HIF_TX_PKT_DDR_SIZE (HIF_TX_DESC_NT * DDR_BUF_SIZE)
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#define HIF_DESC_BASEADDR (HIF_TX_PKT_DDR_BASEADDR + HIF_TX_PKT_DDR_SIZE)
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#define HIF_RX_DESC_SIZE (16 * HIF_RX_DESC_NT)
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#define HIF_TX_DESC_SIZE (16 * HIF_TX_DESC_NT)
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#define UTIL_CODE_BASEADDR 0x780000
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#define UTIL_CODE_SIZE (128 * SZ_1K)
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#define UTIL_DDR_DATA_BASEADDR (UTIL_CODE_BASEADDR + UTIL_CODE_SIZE)
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#define UTIL_DDR_DATA_SIZE (64 * SZ_1K)
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#define CLASS_DDR_DATA_BASEADDR (UTIL_DDR_DATA_BASEADDR + UTIL_DDR_DATA_SIZE)
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#define CLASS_DDR_DATA_SIZE (32 * SZ_1K)
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#define TMU_DDR_DATA_BASEADDR (CLASS_DDR_DATA_BASEADDR + CLASS_DDR_DATA_SIZE)
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#define TMU_DDR_DATA_SIZE (32 * SZ_1K)
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#define TMU_LLM_BASEADDR (TMU_DDR_DATA_BASEADDR + TMU_DDR_DATA_SIZE)
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#define TMU_LLM_QUEUE_LEN (16 * 256)
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/* Must be power of two and at least 16 * 8 = 128 bytes */
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#define TMU_LLM_SIZE (4 * 16 * TMU_LLM_QUEUE_LEN)
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/* (4 TMU's x 16 queues x queue_len) */
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#define ROUTE_TABLE_BASEADDR 0x800000
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#define ROUTE_TABLE_HASH_BITS_MAX 15 /* 32K entries */
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#define ROUTE_TABLE_HASH_BITS 8 /* 256 entries */
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#define ROUTE_TABLE_SIZE (BIT(ROUTE_TABLE_HASH_BITS_MAX) \
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* CLASS_ROUTE_SIZE)
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#define PFE_TOTAL_DATA_SIZE (ROUTE_TABLE_BASEADDR + ROUTE_TABLE_SIZE)
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#if PFE_TOTAL_DATA_SIZE > (12 * SZ_1M)
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#error DDR mapping above 12MiB
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#endif
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/* LMEM Mapping */
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#define BMU1_LMEM_BASEADDR 0
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#define BMU1_BUF_COUNT 256
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#define BMU1_LMEM_SIZE (LMEM_BUF_SIZE * BMU1_BUF_COUNT)
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struct gemac_s {
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void *gemac_base;
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void *egpi_base;
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/* GEMAC config */
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int gemac_mode;
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int gemac_speed;
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int gemac_duplex;
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int flags;
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/* phy iface */
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int phy_address;
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int phy_mode;
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struct mii_dev *bus;
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};
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struct pfe_mdio_info {
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void *reg_base;
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char *name;
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};
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struct pfe_eth_dev {
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int gemac_port;
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struct gemac_s *gem;
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struct pfe_ddr_address pfe_addr;
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struct udevice *dev;
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#ifdef CONFIG_PHYLIB
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struct phy_device *phydev;
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#endif
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};
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int pfe_remove(struct pfe_ddr_address *pfe_addr);
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struct mii_dev *pfe_mdio_init(struct pfe_mdio_info *mdio_info);
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void pfe_set_mdio(int dev_id, struct mii_dev *bus);
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void pfe_set_phy_address_mode(int dev_id, int phy_id, int phy_mode);
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int gemac_initialize(bd_t *bis, int dev_id, char *devname);
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int pfe_init(struct pfe_ddr_address *pfe_addr);
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int pfe_eth_board_init(struct udevice *dev);
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#endif /* __PFE_ETH_H__ */
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