145 lines
3.9 KiB
C
145 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2011-2014 Freescale Semiconductor, Inc.
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*/
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/*
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* Corenet DS style board configuration file
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*/
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#ifndef __QEMU_PPCE500_H
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#define __QEMU_PPCE500_H
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#define CONFIG_SYS_MPC85XX_NO_RESETVEC
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#define CONFIG_SYS_RAMBOOT
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#define CONFIG_PCI1 1 /* PCI controller 1 */
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#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENABLE_36BIT_PHYS
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#define CONFIG_ADDR_MAP
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#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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/* Needed to fill the ccsrbar pointer */
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/* Virtual address to CCSRBAR */
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#define CONFIG_SYS_CCSRBAR 0xe0000000
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/* Physical address should be a function call */
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#ifndef __ASSEMBLY__
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extern unsigned long long get_phys_ccsrbar_addr_early(void);
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#define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
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#define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
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#else
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#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
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#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
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#endif
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/* Virtual address range for PCI region maps */
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#define CONFIG_SYS_PCI_MAP_START 0x80000000
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#define CONFIG_SYS_PCI_MAP_END 0xe8000000
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/* Virtual address to a temporary map if we need it (max 128MB) */
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#define CONFIG_SYS_TMPVIRT 0xe8000000
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/*
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* DDR Setup
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*/
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#define CONFIG_VERY_BIG_RAM
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#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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#define CONFIG_CHIP_SELECTS_PER_CTRL 0
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#define CONFIG_SYS_CLK_FREQ 33000000
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#define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_HWCONFIG
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#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
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#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
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#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
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/* The assembler doesn't like typecast */
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#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
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((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
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CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
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#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
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#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
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#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
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/*
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* General PCI
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* Memory space is mapped 1-1, but I/O space must start from 0.
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*/
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#ifdef CONFIG_PCI
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#define CONFIG_PCI_INDIRECT_BRIDGE
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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#endif /* CONFIG_PCI */
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#define CONFIG_LBA48
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/*
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* Environment
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*/
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_LOADS_ECHO /* echo on for serial download */
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/*
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* Command line configuration.
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*/
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 64 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
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/*
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* Environment Configuration
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*/
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#define CONFIG_ROOTPATH "/opt/nfsroot"
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#define CONFIG_BOOTFILE "uImage"
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#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
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/* default location for tftp and bootm */
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#define CONFIG_LOADADDR 1000000
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#define CONFIG_BOOTCOMMAND \
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"test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
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#endif /* __QEMU_PPCE500_H */
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