78 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			78 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * arch/sh/kernel/cpu/sh2/clock-sh7619.c
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|  *
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|  * SH7619 support for the clock framework
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|  *
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|  *  Copyright (C) 2006  Yoshinori Sato
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|  *
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|  * Based on clock-sh4.c
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|  *  Copyright (C) 2005  Paul Mundt
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  */
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| #include <linux/init.h>
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| #include <linux/kernel.h>
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| #include <linux/io.h>
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| #include <asm/clock.h>
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| #include <asm/freq.h>
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| #include <asm/processor.h>
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| 
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| static const int pll1rate[] = {1,2};
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| static const int pfc_divisors[] = {1,2,0,4};
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| static unsigned int pll2_mult;
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| 
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| static void master_clk_init(struct clk *clk)
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| {
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| 	clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
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| }
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| 
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| static struct sh_clk_ops sh7619_master_clk_ops = {
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| 	.init		= master_clk_init,
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| };
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| 
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| static unsigned long module_clk_recalc(struct clk *clk)
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| {
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| 	int idx = (__raw_readw(FREQCR) & 0x0007);
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| 	return clk->parent->rate / pfc_divisors[idx];
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| }
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| 
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| static struct sh_clk_ops sh7619_module_clk_ops = {
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| 	.recalc		= module_clk_recalc,
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| };
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| 
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| static unsigned long bus_clk_recalc(struct clk *clk)
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| {
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| 	return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
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| }
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| 
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| static struct sh_clk_ops sh7619_bus_clk_ops = {
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| 	.recalc		= bus_clk_recalc,
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| };
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| 
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| static struct sh_clk_ops sh7619_cpu_clk_ops = {
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| 	.recalc		= followparent_recalc,
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| };
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| 
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| static struct sh_clk_ops *sh7619_clk_ops[] = {
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| 	&sh7619_master_clk_ops,
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| 	&sh7619_module_clk_ops,
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| 	&sh7619_bus_clk_ops,
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| 	&sh7619_cpu_clk_ops,
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| };
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| 
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| void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
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| {
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| 	if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||
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| 	    test_mode_pin(MODE_PIN2 | MODE_PIN1))
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| 		pll2_mult = 2;
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| 	else if (test_mode_pin(MODE_PIN0) || test_mode_pin(MODE_PIN1))
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| 		pll2_mult = 4;
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| 
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| 	BUG_ON(!pll2_mult);
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| 
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| 	if (idx < ARRAY_SIZE(sh7619_clk_ops))
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| 		*ops = sh7619_clk_ops[idx];
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| }
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