249 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			249 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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 * Menlosystems M53Menlo configuration
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 * Copyright (C) 2012-2017 Marek Vasut <marex@denx.de>
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 * Copyright (C) 2014-2017 Olaf Mandel <o.mandel@menlosystems.com>
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 */
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#ifndef __M53MENLO_CONFIG_H__
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#define __M53MENLO_CONFIG_H__
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#include <asm/arch/imx-regs.h>
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_FSL_CLK
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#define CONFIG_TIMESTAMP		/* Print image info with timestamp */
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/*
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 * Memory configurations
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 */
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#define PHYS_SDRAM_1			CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
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#define PHYS_SDRAM_2			CSD1_BASE_ADDR
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#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
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#define PHYS_SDRAM_SIZE			(gd->ram_size)
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#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
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#define CONFIG_SYS_MEMTEST_START	0x70000000
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#define CONFIG_SYS_MEMTEST_END		0x8ff00000
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#define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/*
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 * U-Boot general configurations
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 */
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#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
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#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
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#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
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						/* Boot argument buffer size */
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/*
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 * Serial Driver
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 */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE		UART1_BASE
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/*
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 * MMC Driver
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 */
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_SYS_FSL_ESDHC_ADDR	0
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#define CONFIG_SYS_FSL_ESDHC_NUM	1
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#endif
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/*
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 * NAND
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 */
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#define CONFIG_ENV_SIZE			(16 * 1024)
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE	1
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#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
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#define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
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#define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/* Environment is in NAND */
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#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
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#define CONFIG_ENV_SECT_SIZE		(128 * 1024)
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#define CONFIG_ENV_RANGE		(4 * CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_OFFSET		(8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
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#define CONFIG_ENV_OFFSET_REDUND	\
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		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
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#endif
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/*
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 * Ethernet on SOC (FEC)
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 */
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#ifdef CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE			FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR		0x0
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#define CONFIG_MII
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#define CONFIG_DISCOVER_PHY
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#define CONFIG_FEC_XCV_TYPE		RMII
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#define CONFIG_ETHPRIME			"FEC0"
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#endif
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/*
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 * I2C
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 */
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
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#define CONFIG_SYS_RTC_BUS_NUM		1 /* I2C2 */
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#endif
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/*
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 * RTC
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 */
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#ifdef CONFIG_CMD_DATE
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#define CONFIG_SYS_I2C_RTC_ADDR		0x68
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#define CONFIG_SYS_M41T11_BASE_YEAR	2000
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#endif
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/*
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 * USB
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 */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX5
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#define CONFIG_MXC_USB_PORT		1
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#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS		0
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#endif
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/*
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 * SATA
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 */
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_SYS_SATA_MAX_DEVICE	1
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#define CONFIG_DWC_AHSATA_PORT_ID	0
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#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_BASE_ADDR
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#define CONFIG_LBA48
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#endif
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/*
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 * LCD
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 */
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_GZIP
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASHIMAGE_GUARD
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	(2 << 20)
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#endif
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/* LVDS display */
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#define CONFIG_SYS_LDB_CLOCK			33260000
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#define CONFIG_IMX_VIDEO_SKIP
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#define CONFIG_SPLASH_SOURCE
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/* IIM Fuses */
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#define CONFIG_FSL_IIM
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/* Watchdog */
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#define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
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/*
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 * Boot Linux
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 */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTFILE		"boot/fitImage"
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#define CONFIG_LOADADDR		0x70800000
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#define CONFIG_BOOTCOMMAND	"run mmc_mmc"
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#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
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/*
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 * NAND SPL
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 */
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#define CONFIG_SPL_TARGET		"u-boot-with-nand-spl.imx"
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#define CONFIG_SPL_TEXT_BASE		0x70008000
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#define CONFIG_SPL_PAD_TO		0x8000
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#define CONFIG_SPL_STACK		0x70004000
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#define CONFIG_SYS_NAND_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
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#define CONFIG_SYS_NAND_PAGE_SIZE	2048
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#define CONFIG_SYS_NAND_OOBSIZE		64
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#define CONFIG_SYS_NAND_PAGE_COUNT	64
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#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
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/*
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 * Extra Environments
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 */
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#define CONFIG_PREBOOT		"run try_bootscript"
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#define CONFIG_HOSTNAME		"m53menlo"
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#define CONFIG_EXTRA_ENV_SETTINGS					\
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	"consdev=ttymxc0\0"						\
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	"baudrate=115200\0"						\
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	"bootscript=boot.scr\0"						\
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	"mmcdev=0\0"							\
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	"mmcpart=1\0"							\
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	"rootpath=/srv/\0"						\
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	"kernel_addr_r=0x72000000\0"					\
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	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"				\
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	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"			\
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	"netdev=eth0\0"							\
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	"splashsource=mmc_fs\0"						\
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	"splashfile=boot/usplash.bmp.gz\0"				\
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	"splashimage=0x88000000\0"					\
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	"splashpos=m,m\0"						\
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	"addcons="							\
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		"setenv bootargs ${bootargs} "				\
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		"console=${consdev},${baudrate}\0"			\
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	"addip="							\
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		"setenv bootargs ${bootargs} "				\
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		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
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		":${hostname}:${netdev}:off\0"				\
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	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
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	"addmisc="							\
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		"setenv bootargs ${bootargs} ${miscargs}\0"		\
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	"addargs=run addcons addmisc addmtd\0"				\
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	"mmcload="							\
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		"mmc rescan ; load mmc ${mmcdev}:${mmcpart} "		\
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		"${kernel_addr_r} ${bootfile}\0"			\
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	"miscargs=nohlt panic=1\0"					\
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	"mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw "	\
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		"rootwait\0"						\
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	"mmc_mmc="							\
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		"run mmcload mmcargs addargs ; "			\
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		"bootm ${kernel_addr_r}\0"				\
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	"netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0"	\
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	"net_nfs="							\
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		"run netload nfsargs addip addargs ; "			\
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		"bootm ${kernel_addr_r}\0"				\
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	"nfsargs="							\
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		"setenv bootargs root=/dev/nfs rw "			\
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		"nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0"	\
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	"try_bootscript="						\
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		"mmc rescan;"						\
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		"if test -e mmc 0:1 ${bootscript} ; then "		\
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		"if load mmc 0:1 ${kernel_addr_r} ${bootscript};"	\
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		"then ; "						\
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			"echo Running bootscript... ; "			\
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			"source ${kernel_addr_r} ; "			\
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		"fi ; "							\
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		"fi\0"
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#endif	/* __M53MENLO_CONFIG_H__ */
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