174 lines
3.6 KiB
C
174 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2015 Freescale Semiconductor
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*
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* Freescale LS1043ARDB board-specific CPLD controlling supports.
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/io.h>
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#include "cpld.h"
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u8 cpld_read(unsigned int reg)
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{
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void *p = (void *)CONFIG_SYS_CPLD_BASE;
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return in_8(p + reg);
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}
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void cpld_write(unsigned int reg, u8 value)
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{
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void *p = (void *)CONFIG_SYS_CPLD_BASE;
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out_8(p + reg, value);
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}
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/* Set the boot bank to the alternate bank */
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void cpld_set_altbank(void)
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{
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u16 reg = CPLD_CFG_RCW_SRC_NOR;
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u8 reg4 = CPLD_READ(soft_mux_on);
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u8 reg5 = (u8)(reg >> 1);
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u8 reg6 = (u8)(reg & 1);
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u8 reg7 = CPLD_READ(vbank);
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cpld_rev_bit(®5);
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CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
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CPLD_WRITE(cfg_rcw_src1, reg5);
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CPLD_WRITE(cfg_rcw_src2, reg6);
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reg7 = (reg7 & ~CPLD_BANK_SEL_MASK) | CPLD_BANK_SEL_ALTBANK;
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CPLD_WRITE(vbank, reg7);
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CPLD_WRITE(system_rst, 1);
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}
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/* Set the boot bank to the default bank */
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void cpld_set_defbank(void)
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{
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u16 reg = CPLD_CFG_RCW_SRC_NOR;
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u8 reg4 = CPLD_READ(soft_mux_on);
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u8 reg5 = (u8)(reg >> 1);
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u8 reg6 = (u8)(reg & 1);
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cpld_rev_bit(®5);
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CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
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CPLD_WRITE(cfg_rcw_src1, reg5);
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CPLD_WRITE(cfg_rcw_src2, reg6);
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CPLD_WRITE(vbank, 0);
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CPLD_WRITE(system_rst, 1);
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}
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void cpld_set_nand(void)
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{
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u16 reg = CPLD_CFG_RCW_SRC_NAND;
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u8 reg5 = (u8)(reg >> 1);
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u8 reg6 = (u8)(reg & 1);
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cpld_rev_bit(®5);
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CPLD_WRITE(soft_mux_on, 1);
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CPLD_WRITE(cfg_rcw_src1, reg5);
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CPLD_WRITE(cfg_rcw_src2, reg6);
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CPLD_WRITE(system_rst, 1);
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}
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void cpld_set_sd(void)
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{
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u16 reg = CPLD_CFG_RCW_SRC_SD;
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u8 reg5 = (u8)(reg >> 1);
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u8 reg6 = (u8)(reg & 1);
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cpld_rev_bit(®5);
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CPLD_WRITE(soft_mux_on, 1);
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CPLD_WRITE(cfg_rcw_src1, reg5);
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CPLD_WRITE(cfg_rcw_src2, reg6);
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CPLD_WRITE(system_rst, 1);
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}
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#ifdef DEBUG
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static void cpld_dump_regs(void)
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{
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printf("cpld_ver = %x\n", CPLD_READ(cpld_ver));
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printf("cpld_ver_sub = %x\n", CPLD_READ(cpld_ver_sub));
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printf("pcba_ver = %x\n", CPLD_READ(pcba_ver));
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printf("soft_mux_on = %x\n", CPLD_READ(soft_mux_on));
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printf("cfg_rcw_src1 = %x\n", CPLD_READ(cfg_rcw_src1));
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printf("cfg_rcw_src2 = %x\n", CPLD_READ(cfg_rcw_src2));
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printf("vbank = %x\n", CPLD_READ(vbank));
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printf("sysclk_sel = %x\n", CPLD_READ(sysclk_sel));
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printf("uart_sel = %x\n", CPLD_READ(uart_sel));
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printf("sd1refclk_sel = %x\n", CPLD_READ(sd1refclk_sel));
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printf("tdmclk_mux_sel = %x\n", CPLD_READ(tdmclk_mux_sel));
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printf("sdhc_spics_sel = %x\n", CPLD_READ(sdhc_spics_sel));
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printf("status_led = %x\n", CPLD_READ(status_led));
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putc('\n');
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}
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#endif
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void cpld_rev_bit(unsigned char *value)
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{
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u8 rev_val, val;
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int i;
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val = *value;
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rev_val = val & 1;
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for (i = 1; i <= 7; i++) {
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val >>= 1;
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rev_val <<= 1;
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rev_val |= val & 1;
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}
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*value = rev_val;
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}
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int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int rc = 0;
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if (argc <= 1)
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return cmd_usage(cmdtp);
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if (strcmp(argv[1], "reset") == 0) {
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if (strcmp(argv[2], "altbank") == 0)
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cpld_set_altbank();
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else if (strcmp(argv[2], "nand") == 0)
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cpld_set_nand();
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else if (strcmp(argv[2], "sd") == 0)
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cpld_set_sd();
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else
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cpld_set_defbank();
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#ifdef DEBUG
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} else if (strcmp(argv[1], "dump") == 0) {
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cpld_dump_regs();
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#endif
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} else {
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rc = cmd_usage(cmdtp);
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}
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return rc;
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}
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U_BOOT_CMD(
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cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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"Reset the board or alternate bank",
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"reset: reset to default bank\n"
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"cpld reset altbank: reset to alternate bank\n"
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"cpld reset nand: reset to boot from NAND flash\n"
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"cpld reset sd: reset to boot from SD card\n"
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#ifdef DEBUG
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"cpld dump - display the CPLD registers\n"
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#endif
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);
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