71 lines
2.7 KiB
C
Executable File
71 lines
2.7 KiB
C
Executable File
/* NVT board configuration */
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#define CONFIG_MEM_SIZE _BOARD_DRAM_SIZE_
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/* kernel image and all-in-one image size */
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#define CONFIG_NVT_UIMAGE_SIZE (SZ_1M * 25)
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#define CONFIG_NVT_ALL_IN_ONE_IMG_SIZE (SZ_1M * 100)
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/* temp buffer for all-in-one T.bin boot requirement */
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#define CONFIG_UBOOT_SDRAM_BASE _BOARD_UBOOT_ADDR_
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#define CONFIG_UBOOT_SDRAM_SIZE _BOARD_UBOOT_SIZE_
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#define CONFIG_LINUX_SDRAM_BASE _BOARD_LINUXTMP_ADDR_
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#define CONFIG_LINUX_SDRAM_SIZE _BOARD_LINUXTMP_SIZE_
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#if (CONFIG_UBOOT_SDRAM_BASE > CONFIG_LINUX_SDRAM_BASE)
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#define CONFIG_LINUX_SDRAM_START (CONFIG_UBOOT_SDRAM_BASE - CONFIG_NVT_UIMAGE_SIZE)
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#else
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#define CONFIG_LINUX_SDRAM_START (CONFIG_LINUX_SDRAM_BASE + CONFIG_LINUX_SDRAM_SIZE - CONFIG_NVT_UIMAGE_SIZE)
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#endif
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#define CONFIG_NVT_RUNFW_SDRAM_BASE (CONFIG_LINUX_SDRAM_START - CONFIG_NVT_ALL_IN_ONE_IMG_SIZE)
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#define CONFIG_RAMDISK_SDRAM_SIZE (SZ_1M * 30) /* To define maximum ramdisk size */
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#define CONFIG_SMEM_SDRAM_BASE _BOARD_SHMEM_ADDR_
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#define CONFIG_SMEM_SDRAM_SIZE _BOARD_SHMEM_SIZE_
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#define CONFIG_FDT_SDRAM_BASE _BOARD_FDT_ADDR_
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#define CONFIG_FDT_SDRAM_SIZE _BOARD_FDT_SIZE_
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#if defined(CONFIG_NVT_SPI_NAND) || defined(CONFIG_NVT_SPI_NOR_NAND)
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#if (_EMBMEM_BLK_SIZE_ == 0x40000)
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#define CONFIG_MODELEXT_FLASH_BASE 0x80000
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#else
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#define CONFIG_MODELEXT_FLASH_BASE 0x40000
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#endif
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#elif defined(CONFIG_NVT_IVOT_EMMC)
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#define CONFIG_MODELEXT_FLASH_BASE (0x40000/512)
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#else
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#define CONFIG_MODELEXT_FLASH_BASE 0x10000
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#endif
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/* FLASH FileSystem */
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#if defined(CONFIG_NVT_SPI_NAND) || defined(CONFIG_NVT_SPI_NONE) || defined(CONFIG_NVT_SPI_NOR_NAND)
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#endif
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#define CONFIG_SYS_L2_PL310
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#define CONFIG_SYS_PL310_BASE 0xF9C20000
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#ifndef CONFIG_SYS_CACHELINE_SIZE
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#endif
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#ifdef CONFIG_NVT_FPGA_EMULATION
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#define CONFIG_SYS_CPU_CLK 24000000
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#define CONFIG_SYS_HZ_CLOCK CONFIG_SYS_CPU_CLK
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#define CONFIG_SYS_TIMER_CLK (CONFIG_SYS_CPU_CLK/8/1000000) /* Unit: MHZ */
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#else /* !CONFIG_NVT_FPGA_EMULATION */
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#define CONFIG_SYS_CPU_CLK 960000000
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#define CONFIG_SYS_HZ_CLOCK CONFIG_SYS_CPU_CLK
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#define CONFIG_SYS_TIMER_CLK (CONFIG_SYS_CPU_CLK/8/1000000) /* Unit: MHZ */
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#endif /* CONFIG_NVT_FPGA_EMULATION */
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/*
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* Serial driver init.
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*
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*/
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_NS16550_REG_SIZE -1
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#define CONFIG_SYS_NS16550_COM1 0xFE200000
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/* #define CONFIG_SYS_NS16550_COM2 0xf0300000 */
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/* #define CONFIG_SYS_NS16550_COM3 0xf0310000 */
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#define CONFIG_SYS_NS16550_CLK 48000000 /* COM1: M, other COM port 48M */
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#define CONFIG_SYS_NS16550_HSCLK 48000000
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