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1.升级时Transcode空闲更大内存

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payton 2023-07-21 22:07:28 +08:00
parent 6f575adb09
commit 59a91eb1b5
1 changed files with 24 additions and 3 deletions
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27
code/application/source/cardv/SrcCode/UIApp/Transcode/UIAppTranscode_Exe.c
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@ -26,7 +26,9 @@
#include "FileSysTsk.h" #include "FileSysTsk.h"
#include "vf_gfx.h" #include "vf_gfx.h"
#include "hd_videoenc.h" #include "hd_videoenc.h"
#if HUNTING_CAMERA_MCU == ENABLE
#include "sf_common.h"
#endif
#define DBGINFO_BUFSIZE() (0x200) #define DBGINFO_BUFSIZE() (0x200)
#define VDO_YUV_BUFSIZE(w, h, pxlfmt) (ALIGN_CEIL_4((w) * HD_VIDEO_PXLFMT_BPP(pxlfmt) / 8) * (h)) #define VDO_YUV_BUFSIZE(w, h, pxlfmt) (ALIGN_CEIL_4((w) * HD_VIDEO_PXLFMT_BPP(pxlfmt) / 8) * (h))
@ -105,14 +107,33 @@ static HD_RESULT _TranscodeExe_CommPool_Init(void)
/* src image yuv buffer */ /* src image yuv buffer */
mem_cfg.pool_info[id].type = HD_COMMON_MEM_COMMON_POOL; mem_cfg.pool_info[id].type = HD_COMMON_MEM_COMMON_POOL;
mem_cfg.pool_info[id].blk_size = DBGINFO_BUFSIZE() + _TranscodeExe_Get_Max_Cap_Buf_Size(); mem_cfg.pool_info[id].blk_size = DBGINFO_BUFSIZE() + _TranscodeExe_Get_Max_Cap_Buf_Size();
mem_cfg.pool_info[id].blk_cnt = 0; #if HUNTING_CAMERA_MCU == ENABLE
if(sf_get_fw_update())
{
mem_cfg.pool_info[id].blk_cnt = 0;
}else {
mem_cfg.pool_info[id].blk_cnt = 1;
}
#else
mem_cfg.pool_info[id].blk_cnt = 1;
#endif
mem_cfg.pool_info[id].ddr_id = DDR_ID0; mem_cfg.pool_info[id].ddr_id = DDR_ID0;
/* target size yuv buffer */ /* target size yuv buffer */
id++; id++;
mem_cfg.pool_info[id].type = HD_COMMON_MEM_COMMON_POOL; mem_cfg.pool_info[id].type = HD_COMMON_MEM_COMMON_POOL;
mem_cfg.pool_info[id].blk_size = DBGINFO_BUFSIZE() + _TranscodeExe_Get_Target_Buf_Size(); mem_cfg.pool_info[id].blk_size = DBGINFO_BUFSIZE() + _TranscodeExe_Get_Target_Buf_Size();
mem_cfg.pool_info[id].blk_cnt = 0; #if HUNTING_CAMERA_MCU == ENABLE
if(sf_get_fw_update())
{
mem_cfg.pool_info[id].blk_cnt = 0;
}else {
mem_cfg.pool_info[id].blk_cnt = 1;
}
#else
mem_cfg.pool_info[id].blk_cnt = 1;
#endif
mem_cfg.pool_info[id].ddr_id = DDR_ID0; mem_cfg.pool_info[id].ddr_id = DDR_ID0;
ret = vendor_common_mem_relayout(&mem_cfg); ret = vendor_common_mem_relayout(&mem_cfg);
if (ret != HD_OK) { if (ret != HD_OK) {